3 Commits

Author	SHA1	Message	Date
mmajoral	de2043ca00	cleaned the acquisition code that runs in the Zynq SoC, cleaned some tracking files that run in the Zynq SoC as well.	2017-05-08 17:03:27 +02:00
mmajoral	28058000de	set up the receiver to work with the FPGA	2017-05-05 17:08:49 +02:00
Javier Arribas	2ee29af3bd	Adding FPGA accelerators support in gnss-sdr configuration options	2017-05-05 16:37:29 +02:00