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https://github.com/gnss-sdr/gnss-sdr
synced 2025-01-30 02:44:50 +00:00
Fixes for gcc
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db738c7ea9
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@ -68,7 +68,7 @@ static inline void volk_gnsssdr_8ic_conjugate_8ic_u_avx(lv_8sc_t* cVector, const
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tmp128hi = _mm256_extractf128_si256(_mm256_castps_si256(tmp),1);
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tmp128hi = _mm256_extractf128_si256(_mm256_castps_si256(tmp),1);
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tmp128hi = _mm_add_epi8(tmp128hi, conjugator2);
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tmp128hi = _mm_add_epi8(tmp128hi, conjugator2);
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//tmp = _mm256_set_m128i(tmp128hi , tmp128lo); //not defined in some versions of immintrin.h
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//tmp = _mm256_set_m128i(tmp128hi , tmp128lo); //not defined in some versions of immintrin.h
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tmp = _mm256_insertf128_si256(_mm256_castsi128_si256(tmp128lo),(tmp128hi),1);
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tmp = _mm256_castsi256_ps(_mm256_insertf128_si256(_mm256_castsi128_si256(tmp128lo),(tmp128hi),1));
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_mm256_storeu_ps((float*)c, tmp);
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_mm256_storeu_ps((float*)c, tmp);
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a += 16;
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a += 16;
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@ -208,7 +208,7 @@ static inline void volk_gnsssdr_8ic_conjugate_8ic_a_avx(lv_8sc_t* cVector, const
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tmp128hi = _mm256_extractf128_si256(_mm256_castps_si256(tmp),1);
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tmp128hi = _mm256_extractf128_si256(_mm256_castps_si256(tmp),1);
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tmp128hi = _mm_add_epi8(tmp128hi, conjugator2);
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tmp128hi = _mm_add_epi8(tmp128hi, conjugator2);
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//tmp = _mm256_set_m128i(tmp128hi , tmp128lo); //not defined in some versions of immintrin.h
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//tmp = _mm256_set_m128i(tmp128hi , tmp128lo); //not defined in some versions of immintrin.h
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tmp = _mm256_insertf128_si256(_mm256_castsi128_si256(tmp128lo),(tmp128hi),1);
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tmp = _mm256_castsi256_ps(_mm256_insertf128_si256(_mm256_castsi128_si256(tmp128lo),(tmp128hi),1));
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_mm256_store_ps((float*)c, tmp);
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_mm256_store_ps((float*)c, tmp);
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a += 16;
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a += 16;
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@ -108,7 +108,7 @@ static inline void volk_gnsssdr_s32f_x2_update_local_carrier_32fc_u_avx(lv_32fc_
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__m256 phase_rad_array, x, s, c, swap_sign_bit_sin, sign_bit_cos, poly_mask, z, tmp, y, y2, ysin1, ysin2;
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__m256 phase_rad_array, x, s, c, swap_sign_bit_sin, sign_bit_cos, poly_mask, z, tmp, y, y2, ysin1, ysin2;
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__m256 xmm1, xmm2, xmm3, sign_bit_sin;
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__m256 xmm1, xmm2, xmm3, sign_bit_sin;
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__m256i imm0, imm2, imm4;
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__m256i imm0, imm2, imm4, tmp256i;
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__m128i imm0_1, imm0_2, imm2_1, imm2_2, imm4_1, imm4_2;
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__m128i imm0_1, imm0_2, imm2_1, imm2_2, imm4_1, imm4_2;
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__VOLK_ATTR_ALIGNED(32) float sin_value[8];
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__VOLK_ATTR_ALIGNED(32) float sin_value[8];
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__VOLK_ATTR_ALIGNED(32) float cos_value[8];
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__VOLK_ATTR_ALIGNED(32) float cos_value[8];
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@ -132,9 +132,9 @@ static inline void volk_gnsssdr_s32f_x2_update_local_carrier_32fc_u_avx(lv_32fc_
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/* we use SSE2 routines to perform the integer ops */
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/* we use SSE2 routines to perform the integer ops */
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//COPY_IMM_TO_XMM(_mm256_cvttps_epi32(y),imm2_1,imm2_2);
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//COPY_IMM_TO_XMM(_mm256_cvttps_epi32(y),imm2_1,imm2_2);
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y = _mm256_cvttps_epi32(y);
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tmp256i = _mm256_cvttps_epi32(y);
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imm2_1 = _mm256_extractf128_ps (y, 0);
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imm2_1 = _mm256_extractf128_si256 (tmp256i, 0);
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imm2_2 = _mm256_extractf128_ps (y, 1);
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imm2_2 = _mm256_extractf128_si256 (tmp256i, 1);
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imm2_1 = _mm_add_epi32(imm2_1, _pi32avx_1);
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imm2_1 = _mm_add_epi32(imm2_1, _pi32avx_1);
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imm2_2 = _mm_add_epi32(imm2_2, _pi32avx_1);
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imm2_2 = _mm_add_epi32(imm2_2, _pi32avx_1);
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@ -264,7 +264,7 @@ static inline void volk_gnsssdr_s32f_x2_update_local_carrier_32fc_u_avx(lv_32fc_
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if (num_points%8!=0)
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if (num_points%8!=0)
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{
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{
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__VOLK_ATTR_ALIGNED(32) float phase_rad_store[8];
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__VOLK_ATTR_ALIGNED(32) float phase_rad_store[8];
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_mm256_storeu_si256 ((__m256i*)phase_rad_store, phase_rad_array);
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_mm256_storeu_ps ((float*)phase_rad_store, phase_rad_array);
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float phase_rad = phase_rad_store[0];
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float phase_rad = phase_rad_store[0];
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@ -424,7 +424,7 @@ static inline void volk_gnsssdr_s32f_x2_update_local_carrier_32fc_u_sse2(lv_32fc
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if (num_points%4!=0)
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if (num_points%4!=0)
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{
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{
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__VOLK_ATTR_ALIGNED(16) float phase_rad_store[4];
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__VOLK_ATTR_ALIGNED(16) float phase_rad_store[4];
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_mm_storeu_si128 ((__m128i*)phase_rad_store, phase_rad_array);
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_mm_storeu_ps ((float*)phase_rad_store, phase_rad_array);
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float phase_rad = phase_rad_store[0];
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float phase_rad = phase_rad_store[0];
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@ -510,7 +510,7 @@ static inline void volk_gnsssdr_s32f_x2_update_local_carrier_32fc_a_avx(lv_32fc_
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__m256 phase_rad_array, x, s, c, swap_sign_bit_sin, sign_bit_cos, poly_mask, z, tmp, y, y2, ysin1, ysin2;
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__m256 phase_rad_array, x, s, c, swap_sign_bit_sin, sign_bit_cos, poly_mask, z, tmp, y, y2, ysin1, ysin2;
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__m256 xmm1, xmm2, xmm3, sign_bit_sin;
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__m256 xmm1, xmm2, xmm3, sign_bit_sin;
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__m256i imm0, imm2, imm4;
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__m256i imm0, imm2, imm4, tmp256i;
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__m128i imm0_1, imm0_2, imm2_1, imm2_2, imm4_1, imm4_2;
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__m128i imm0_1, imm0_2, imm2_1, imm2_2, imm4_1, imm4_2;
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__VOLK_ATTR_ALIGNED(32) float sin_value[8];
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__VOLK_ATTR_ALIGNED(32) float sin_value[8];
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__VOLK_ATTR_ALIGNED(32) float cos_value[8];
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__VOLK_ATTR_ALIGNED(32) float cos_value[8];
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@ -534,9 +534,9 @@ static inline void volk_gnsssdr_s32f_x2_update_local_carrier_32fc_a_avx(lv_32fc_
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/* we use SSE2 routines to perform the integer ops */
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/* we use SSE2 routines to perform the integer ops */
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//COPY_IMM_TO_XMM(_mm256_cvttps_epi32(y),imm2_1,imm2_2);
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//COPY_IMM_TO_XMM(_mm256_cvttps_epi32(y),imm2_1,imm2_2);
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y = _mm256_cvttps_epi32(y);
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tmp256i = _mm256_cvttps_epi32(y);
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imm2_1 = _mm256_extractf128_ps (y, 0);
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imm2_1 = _mm256_extractf128_si256 (tmp256i, 0);
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imm2_2 = _mm256_extractf128_ps (y, 1);
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imm2_2 = _mm256_extractf128_si256 (tmp256i, 1);
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imm2_1 = _mm_add_epi32(imm2_1, _pi32avx_1);
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imm2_1 = _mm_add_epi32(imm2_1, _pi32avx_1);
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imm2_2 = _mm_add_epi32(imm2_2, _pi32avx_1);
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imm2_2 = _mm_add_epi32(imm2_2, _pi32avx_1);
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@ -825,7 +825,7 @@ static inline void volk_gnsssdr_s32f_x2_update_local_carrier_32fc_a_sse2(lv_32fc
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if (num_points%4!=0)
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if (num_points%4!=0)
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{
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{
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__VOLK_ATTR_ALIGNED(16) float phase_rad_store[4];
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__VOLK_ATTR_ALIGNED(16) float phase_rad_store[4];
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_mm_store_si128 ((__m128i*)phase_rad_store, phase_rad_array);
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_mm_store_ps ((float*)phase_rad_store, phase_rad_array);
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float phase_rad = phase_rad_store[0];
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float phase_rad = phase_rad_store[0];
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