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mirror of https://github.com/gnss-sdr/gnss-sdr synced 2025-01-16 04:05:46 +00:00

declared the 64-bit variables as long long ints instead of long ints in the FPGA related files.

Variables declared as long ints are interpreted as 32-bit variables in the ARM architecture and 64-bit variables in the X86-64 architecture.
This commit is contained in:
Marc Majoral 2018-08-10 16:42:53 +02:00
parent b1524a3afe
commit f14ad930d5
8 changed files with 32 additions and 29 deletions

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@ -223,7 +223,7 @@ void pcps_acquisition_fpga::set_active(bool active)
// no CFAR algorithm in the FPGA
<< ", use_CFAR_algorithm_flag: false";
unsigned long int initial_sample;
unsigned long long int initial_sample;
float input_power_all = 0.0;
float input_power_computed = 0.0;
@ -325,11 +325,11 @@ void pcps_acquisition_fpga::set_active(bool active)
if (d_test_statistics > d_threshold)
{
d_active = false;
printf("##### d_test_statistics = %f\n", d_test_statistics);
printf("##### debug_d_max_absolute =%f\n",debug_d_max_absolute);
printf("##### debug_d_input_power_absolute =%f\n",debug_d_input_power_absolute);
printf("##### initial_sample = %lu\n",initial_sample);
printf("##### debug_doppler_index = %d\n",debug_doppler_index);
// printf("##### d_test_statistics = %f\n", d_test_statistics);
// printf("##### debug_d_max_absolute =%f\n",debug_d_max_absolute);
// printf("##### debug_d_input_power_absolute =%f\n",debug_d_input_power_absolute);
// printf("##### initial_sample = %llu\n",initial_sample);
// printf("##### debug_doppler_index = %d\n",debug_doppler_index);
send_positive_acquisition();
d_state = 0; // Positive acquisition
}

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@ -115,7 +115,7 @@ private:
unsigned int d_doppler_step;
unsigned int d_fft_size;
unsigned int d_num_doppler_bins;
unsigned long int d_sample_counter;
unsigned long long int d_sample_counter;
Gnss_Synchro* d_gnss_synchro;
std::shared_ptr<fpga_acquisition> acquisition_fpga;

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@ -369,18 +369,20 @@ void fpga_acquisition::set_phase_step(unsigned int doppler_index)
void fpga_acquisition::read_acquisition_results(uint32_t *max_index,
float *max_magnitude, unsigned long int *initial_sample, float *power_sum, unsigned *doppler_index)
float *max_magnitude, unsigned long long int *initial_sample, float *power_sum, unsigned *doppler_index)
{
unsigned long int initial_sample_tmp;
unsigned long long int initial_sample_tmp = 0;
unsigned readval = 0;
unsigned long int readval_long = 0;
unsigned long long int readval_long = 0;
unsigned long long int readval_long_shifted = 0;
readval = d_map_base[1];
initial_sample_tmp = readval;
//*initial_sample = readval;
//printf("read initial sample dmap 1 = %d\n", readval);
readval_long = d_map_base[2];
initial_sample_tmp = initial_sample_tmp + (readval_long * (2^32));
readval_long_shifted = readval_long << 32; // 2^32
initial_sample_tmp = initial_sample_tmp + readval_long_shifted; // 2^32
//printf("----------------------------------------------------------------> acq initial sample TOTAL = %llu\n", initial_sample_tmp);
*initial_sample = initial_sample_tmp;
readval = d_map_base[6];
*max_magnitude = static_cast<float>(readval);

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@ -61,7 +61,7 @@ public:
void run_acquisition(void);
void set_phase_step(unsigned int doppler_index);
void read_acquisition_results(uint32_t *max_index, float *max_magnitude,
unsigned long int *initial_sample, float *power_sum, unsigned *doppler_index);
unsigned long long int *initial_sample, float *power_sum, unsigned *doppler_index);
void block_samples();
void unblock_samples();

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@ -1251,15 +1251,15 @@ int dll_pll_veml_tracking_fpga::general_work (int noutput_items __attribute__((u
{
d_pull_in = 0;
multicorrelator_fpga->lock_channel();
unsigned long int counter_value = multicorrelator_fpga->read_sample_counter();
//printf("333333 counter_value = %d\n", counter_value);
unsigned long long int counter_value = multicorrelator_fpga->read_sample_counter();
//printf("333333 counter_value = %llu\n", counter_value);
//printf("333333 current_synchro_data.Acq_samplestamp_samples = %d\n", current_synchro_data.Acq_samplestamp_samples);
//printf("333333 current_synchro_data.Acq_delay_samples = %f\n", current_synchro_data.Acq_delay_samples);
//printf("333333 d_correlation_length_samples = %d\n", d_correlation_length_samples);
unsigned num_frames = ceil((counter_value - current_synchro_data.Acq_samplestamp_samples - current_synchro_data.Acq_delay_samples)/d_correlation_length_samples);
//printf("333333 num_frames = %d\n", num_frames);
unsigned long int absolute_samples_offset = current_synchro_data.Acq_delay_samples + current_synchro_data.Acq_samplestamp_samples + num_frames*d_correlation_length_samples;
//printf("333333 absolute_samples_offset = %d\n", absolute_samples_offset);
unsigned long long int absolute_samples_offset = current_synchro_data.Acq_delay_samples + current_synchro_data.Acq_samplestamp_samples + num_frames*d_correlation_length_samples;
//printf("333333 absolute_samples_offset = %llu\n", absolute_samples_offset);
multicorrelator_fpga->set_initial_sample(absolute_samples_offset);
d_absolute_samples_offset = absolute_samples_offset;
d_sample_counter = absolute_samples_offset;

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@ -213,9 +213,9 @@ private:
// PRN period in samples
int d_current_prn_length_samples;
// processing samples counters
unsigned long int d_sample_counter;
unsigned long int d_acq_sample_stamp;
unsigned long int d_absolute_samples_offset;
unsigned long long int d_sample_counter;
unsigned long long int d_acq_sample_stamp;
unsigned long long int d_absolute_samples_offset;
// CN0 estimation and lock detector
int d_cn0_estimation_counter;
@ -232,7 +232,7 @@ private:
// extra
int d_correlation_length_samples;
int d_next_prn_length_samples;
unsigned long int d_sample_counter_next;
unsigned long long int d_sample_counter_next;
unsigned int d_pull_in = 0;

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@ -84,17 +84,18 @@
#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000
#define TEST_REGISTER_TRACK_WRITEVAL 0x55AA
unsigned long int fpga_multicorrelator_8sc::read_sample_counter()
unsigned long long int fpga_multicorrelator_8sc::read_sample_counter()
{
unsigned long int sample_counter_tmp, sample_counter_msw_tmp;
unsigned long long int sample_counter_tmp, sample_counter_msw_tmp;
sample_counter_tmp = d_map_base[d_SAMPLE_COUNTER_REG_ADDR_LSW];
sample_counter_msw_tmp = d_map_base[d_SAMPLE_COUNTER_REG_ADDR_MSW];
sample_counter_tmp = sample_counter_tmp + (sample_counter_msw_tmp * (2^32));
sample_counter_msw_tmp = sample_counter_msw_tmp << 32;
sample_counter_tmp = sample_counter_tmp + sample_counter_msw_tmp; // 2^32
//return d_map_base[d_SAMPLE_COUNTER_REG_ADDR];
return sample_counter_tmp;
}
void fpga_multicorrelator_8sc::set_initial_sample(unsigned long int samples_offset)
void fpga_multicorrelator_8sc::set_initial_sample(unsigned long long int samples_offset)
{
d_initial_sample_counter = samples_offset;
//printf("www writing d map base %d = d_initial_sample_counter = %d\n", d_INITIAL_COUNTER_VALUE_REG_ADDR, d_initial_sample_counter);

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@ -68,8 +68,8 @@ public:
float rem_code_phase_chips, float code_phase_step_chips,
int signal_length_samples);bool free();
void set_channel(unsigned int channel);
void set_initial_sample(unsigned long int samples_offset);
unsigned long int read_sample_counter();
void set_initial_sample(unsigned long long int samples_offset);
unsigned long long int read_sample_counter();
void lock_channel(void);
void unlock_channel(void);
//void read_sample_counters(int *sample_counter, int *secondary_sample_counter, int *counter_corr_0_in, int *counter_corr_0_out); // debug
@ -103,7 +103,7 @@ private:
unsigned d_code_phase_step_chips_num;
int d_rem_carr_phase_rad_int;
int d_phase_step_rad_int;
unsigned long int d_initial_sample_counter;
unsigned long long int d_initial_sample_counter;
// driver
std::string d_device_name;