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https://github.com/gnss-sdr/gnss-sdr
synced 2024-12-15 20:50:33 +00:00
implemented double acquisition for the FPGA
This commit is contained in:
parent
39e9c28024
commit
ea86546d99
@ -161,6 +161,10 @@ GalileoE1PcpsAmbiguousAcquisitionFpga::GalileoE1PcpsAmbiguousAcquisitionFpga(
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acq_parameters.all_fft_codes = d_all_fft_codes_;
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acq_parameters.all_fft_codes = d_all_fft_codes_;
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acq_parameters.num_doppler_bins_step2 = configuration_->property(role + ".second_nbins", 4);
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acq_parameters.doppler_step2 = configuration_->property(role + ".second_doppler_step", 125.0);
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acq_parameters.make_2_steps = configuration_->property(role + ".make_two_steps", false);
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// reference for the FPGA FFT-IFFT attenuation factor
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// reference for the FPGA FFT-IFFT attenuation factor
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acq_parameters.total_block_exp = configuration_->property(role + ".total_block_exp", 14);
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acq_parameters.total_block_exp = configuration_->property(role + ".total_block_exp", 14);
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@ -162,6 +162,10 @@ GalileoE5aPcpsAcquisitionFpga::GalileoE5aPcpsAcquisitionFpga(ConfigurationInterf
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// reference for the FPGA FFT-IFFT attenuation factor
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// reference for the FPGA FFT-IFFT attenuation factor
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acq_parameters.total_block_exp = configuration_->property(role + ".total_block_exp", 14);
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acq_parameters.total_block_exp = configuration_->property(role + ".total_block_exp", 14);
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acq_parameters.num_doppler_bins_step2 = configuration_->property(role + ".second_nbins", 4);
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acq_parameters.doppler_step2 = configuration_->property(role + ".second_doppler_step", 125.0);
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acq_parameters.make_2_steps = configuration_->property(role + ".make_two_steps", false);
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acquisition_fpga_ = pcps_make_acquisition_fpga(acq_parameters);
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acquisition_fpga_ = pcps_make_acquisition_fpga(acq_parameters);
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DLOG(INFO) << "acquisition(" << acquisition_fpga_->unique_id() << ")";
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DLOG(INFO) << "acquisition(" << acquisition_fpga_->unique_id() << ")";
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@ -143,6 +143,10 @@ GpsL1CaPcpsAcquisitionFpga::GpsL1CaPcpsAcquisitionFpga(
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// reference for the FPGA FFT-IFFT attenuation factor
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// reference for the FPGA FFT-IFFT attenuation factor
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acq_parameters.total_block_exp = configuration_->property(role + ".total_block_exp", 14);
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acq_parameters.total_block_exp = configuration_->property(role + ".total_block_exp", 14);
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acq_parameters.num_doppler_bins_step2 = configuration_->property(role + ".second_nbins", 4);
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acq_parameters.doppler_step2 = configuration_->property(role + ".second_doppler_step", 125.0);
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acq_parameters.make_2_steps = configuration_->property(role + ".make_two_steps", false);
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acquisition_fpga_ = pcps_make_acquisition_fpga(acq_parameters);
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acquisition_fpga_ = pcps_make_acquisition_fpga(acq_parameters);
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DLOG(INFO) << "acquisition(" << acquisition_fpga_->unique_id() << ")";
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DLOG(INFO) << "acquisition(" << acquisition_fpga_->unique_id() << ")";
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@ -142,6 +142,10 @@ GpsL5iPcpsAcquisitionFpga::GpsL5iPcpsAcquisitionFpga(
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// reference for the FPGA FFT-IFFT attenuation factor
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// reference for the FPGA FFT-IFFT attenuation factor
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acq_parameters.total_block_exp = configuration_->property(role + ".total_block_exp", 14);
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acq_parameters.total_block_exp = configuration_->property(role + ".total_block_exp", 14);
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acq_parameters.num_doppler_bins_step2 = configuration_->property(role + ".second_nbins", 4);
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acq_parameters.doppler_step2 = configuration_->property(role + ".second_doppler_step", 125.0);
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acq_parameters.make_2_steps = configuration_->property(role + ".make_two_steps", false);
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acquisition_fpga_ = pcps_make_acquisition_fpga(acq_parameters);
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acquisition_fpga_ = pcps_make_acquisition_fpga(acq_parameters);
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DLOG(INFO) << "acquisition(" << acquisition_fpga_->unique_id() << ")";
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DLOG(INFO) << "acquisition(" << acquisition_fpga_->unique_id() << ")";
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@ -75,6 +75,13 @@ pcps_acquisition_fpga::pcps_acquisition_fpga(pcpsconf_fpga_t conf_) : gr::block(
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d_total_block_exp = acq_parameters.total_block_exp;
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d_total_block_exp = acq_parameters.total_block_exp;
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d_make_2_steps = acq_parameters.make_2_steps;
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d_num_doppler_bins_step2 = acq_parameters.num_doppler_bins_step2;
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d_doppler_step2 = acq_parameters.doppler_step2;
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d_doppler_center_step_two = 0.0;
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d_doppler_max = acq_parameters.doppler_max;
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acquisition_fpga = std::make_shared<fpga_acquisition>(acq_parameters.device_name, acq_parameters.code_length, acq_parameters.doppler_max, d_fft_size,
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acquisition_fpga = std::make_shared<fpga_acquisition>(acq_parameters.device_name, acq_parameters.code_length, acq_parameters.doppler_max, d_fft_size,
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acq_parameters.fs_in, acq_parameters.sampled_ms, acq_parameters.select_queue_Fpga, acq_parameters.all_fft_codes, acq_parameters.excludelimit);
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acq_parameters.fs_in, acq_parameters.sampled_ms, acq_parameters.select_queue_Fpga, acq_parameters.all_fft_codes, acq_parameters.excludelimit);
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}
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}
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@ -104,7 +111,7 @@ void pcps_acquisition_fpga::init()
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d_mag = 0.0;
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d_mag = 0.0;
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d_input_power = 0.0;
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d_input_power = 0.0;
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d_num_doppler_bins = static_cast<uint32_t>(std::ceil(static_cast<double>(static_cast<int32_t>(acq_parameters.doppler_max) - static_cast<int32_t>(-acq_parameters.doppler_max)) / static_cast<double>(d_doppler_step))) + 1;
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d_num_doppler_bins = static_cast<uint32_t>(std::ceil(static_cast<double>(static_cast<int32_t>(d_doppler_max) - static_cast<int32_t>(-d_doppler_max)) / static_cast<double>(d_doppler_step))) + 1;
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acquisition_fpga->init();
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acquisition_fpga->init();
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}
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}
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@ -167,34 +174,17 @@ void pcps_acquisition_fpga::send_negative_acquisition()
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this->message_port_pub(pmt::mp("events"), pmt::from_long(2));
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this->message_port_pub(pmt::mp("events"), pmt::from_long(2));
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}
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}
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void pcps_acquisition_fpga::acquisition_core(uint32_t num_doppler_bins, uint32_t doppler_step, uint32_t doppler_min)
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void pcps_acquisition_fpga::set_active(bool active)
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d_active = active;
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// initialize acquisition algorithm
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uint32_t indext = 0U;
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uint32_t indext = 0U;
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float firstpeak = 0.0;
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float firstpeak = 0.0;
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float secondpeak = 0.0;
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float secondpeak = 0.0;
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uint32_t total_block_exp;
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uint32_t total_block_exp;
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uint64_t initial_sample;
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d_input_power = 0.0;
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d_mag = 0.0;
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int32_t doppler;
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int32_t doppler;
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DLOG(INFO) << "Channel: " << d_channel
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<< " , doing acquisition of satellite: " << d_gnss_synchro->System << " " << d_gnss_synchro->PRN
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<< " ,sample stamp: " << d_sample_counter << ", threshold: "
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<< d_threshold << ", doppler_max: " << acq_parameters.doppler_max
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<< ", doppler_step: " << d_doppler_step
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// no CFAR algorithm in the FPGA
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<< ", use_CFAR_algorithm_flag: false";
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uint64_t initial_sample;
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acquisition_fpga->configure_acquisition();
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acquisition_fpga->configure_acquisition();
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acquisition_fpga->set_doppler_sweep(d_num_doppler_bins);
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acquisition_fpga->set_doppler_sweep(num_doppler_bins, doppler_step, doppler_min);
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acquisition_fpga->write_local_code();
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acquisition_fpga->write_local_code();
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acquisition_fpga->set_block_exp(d_total_block_exp);
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acquisition_fpga->set_block_exp(d_total_block_exp);
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acquisition_fpga->run_acquisition();
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acquisition_fpga->run_acquisition();
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@ -207,7 +197,8 @@ void pcps_acquisition_fpga::set_active(bool active)
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d_total_block_exp = total_block_exp;
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d_total_block_exp = total_block_exp;
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}
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}
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doppler = -static_cast<int32_t>(acq_parameters.doppler_max) + d_doppler_step * (d_doppler_index - 1);
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//doppler = -static_cast<int32_t>(d_doppler_max) + d_doppler_step * (d_doppler_index - 1);
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doppler = static_cast<int32_t>(doppler_min) + doppler_step * (d_doppler_index - 1);
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if (secondpeak > 0)
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if (secondpeak > 0)
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{
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{
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@ -239,6 +230,48 @@ void pcps_acquisition_fpga::set_active(bool active)
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d_gnss_synchro->Acq_delay_samples = static_cast<double>(indext);
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d_gnss_synchro->Acq_delay_samples = static_cast<double>(indext);
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d_gnss_synchro->Acq_samplestamp_samples = d_sample_counter; // delay due to the downsampling filter in the acquisition
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d_gnss_synchro->Acq_samplestamp_samples = d_sample_counter; // delay due to the downsampling filter in the acquisition
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}
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}
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}
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void pcps_acquisition_fpga::set_active(bool active)
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{
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d_active = active;
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d_input_power = 0.0;
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d_mag = 0.0;
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DLOG(INFO) << "Channel: " << d_channel
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<< " , doing acquisition of satellite: " << d_gnss_synchro->System << " " << d_gnss_synchro->PRN
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<< " ,sample stamp: " << d_sample_counter << ", threshold: "
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<< d_threshold << ", doppler_max: " << d_doppler_max
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<< ", doppler_step: " << d_doppler_step
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// no CFAR algorithm in the FPGA
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<< ", use_CFAR_algorithm_flag: false";
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acquisition_core(d_num_doppler_bins, d_doppler_step, -d_doppler_max);
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if (!d_make_2_steps)
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{
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if (d_test_statistics > d_threshold)
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{
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d_active = false;
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send_positive_acquisition();
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d_state = 0; // Positive acquisition
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}
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else
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{
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d_state = 0;
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d_active = false;
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send_negative_acquisition();
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}
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}
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else
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{
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if (d_test_statistics > d_threshold)
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{
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d_doppler_center_step_two = static_cast<float>(d_gnss_synchro->Acq_doppler_hz);
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acquisition_core(d_num_doppler_bins_step2, d_doppler_step2, d_doppler_center_step_two - static_cast<float>(floor(d_num_doppler_bins_step2 / 2.0)) * d_doppler_step2);
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if (d_test_statistics > d_threshold)
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if (d_test_statistics > d_threshold)
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{
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{
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@ -252,6 +285,36 @@ void pcps_acquisition_fpga::set_active(bool active)
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d_active = false;
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d_active = false;
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send_negative_acquisition();
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send_negative_acquisition();
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}
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}
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}
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else
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{
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d_state = 0;
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d_active = false;
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send_negative_acquisition();
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}
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}
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// if (d_test_statistics > d_threshold)
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// {
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// // if (!d_make_2_steps)
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// // {
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// d_active = false;
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// send_positive_acquisition();
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// d_state = 0; // Positive acquisition
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// // }
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// // else
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// // {
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// // d_doppler_center_step_two = static_cast<float>(d_gnss_synchro->Acq_doppler_hz);
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// // acquisition_core(d_num_doppler_bins_step2, d_doppler_step2, d_doppler_center_step_two - static_cast<float>(floor(d_num_doppler_bins_step2 / 2.0)) * d_doppler_step2);
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// // }
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// }
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// else
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// {
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// d_state = 0;
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// d_active = false;
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// send_negative_acquisition();
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// }
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}
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}
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@ -64,6 +64,9 @@ typedef struct
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float downsampling_factor;
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float downsampling_factor;
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uint32_t total_block_exp;
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uint32_t total_block_exp;
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uint32_t excludelimit;
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uint32_t excludelimit;
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bool make_2_steps;
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uint32_t num_doppler_bins_step2;
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float doppler_step2;
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} pcpsconf_fpga_t;
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} pcpsconf_fpga_t;
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class pcps_acquisition_fpga;
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class pcps_acquisition_fpga;
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@ -94,6 +97,8 @@ private:
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float first_vs_second_peak_statistic(uint32_t& indext, int32_t& doppler, uint32_t num_doppler_bins, int32_t doppler_max, int32_t doppler_step);
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float first_vs_second_peak_statistic(uint32_t& indext, int32_t& doppler, uint32_t num_doppler_bins, int32_t doppler_max, int32_t doppler_step);
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void acquisition_core(uint32_t num_doppler_bins, uint32_t doppler_step, uint32_t doppler_max);
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pcpsconf_fpga_t acq_parameters;
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pcpsconf_fpga_t acq_parameters;
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bool d_active;
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bool d_active;
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float d_threshold;
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float d_threshold;
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@ -104,6 +109,7 @@ private:
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int32_t d_state;
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int32_t d_state;
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uint32_t d_channel;
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uint32_t d_channel;
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uint32_t d_doppler_step;
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uint32_t d_doppler_step;
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uint32_t d_doppler_max;
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uint32_t d_fft_size;
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uint32_t d_fft_size;
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uint32_t d_num_doppler_bins;
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uint32_t d_num_doppler_bins;
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uint64_t d_sample_counter;
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uint64_t d_sample_counter;
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uint32_t d_total_block_exp;
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uint32_t d_total_block_exp;
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bool d_make_2_steps;
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uint32_t d_num_doppler_bins_step2;
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float d_doppler_step2;
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float d_doppler_center_step_two;
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public:
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public:
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~pcps_acquisition_fpga();
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~pcps_acquisition_fpga();
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*/
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*/
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inline void set_doppler_max(uint32_t doppler_max)
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inline void set_doppler_max(uint32_t doppler_max)
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{
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{
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acq_parameters.doppler_max = doppler_max;
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d_doppler_max = doppler_max;
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acquisition_fpga->set_doppler_max(doppler_max);
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acquisition_fpga->set_doppler_max(doppler_max);
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}
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}
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@ -216,12 +216,13 @@ void fpga_acquisition::set_block_exp(uint32_t total_block_exp)
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d_map_base[11] = total_block_exp;
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d_map_base[11] = total_block_exp;
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}
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}
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void fpga_acquisition::set_doppler_sweep(uint32_t num_sweeps)
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void fpga_acquisition::set_doppler_sweep(uint32_t num_sweeps, uint32_t doppler_step, uint32_t doppler_min)
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{
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{
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float phase_step_rad_real;
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float phase_step_rad_real;
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float phase_step_rad_int_temp;
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float phase_step_rad_int_temp;
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int32_t phase_step_rad_int;
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int32_t phase_step_rad_int;
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int32_t doppler = static_cast<int32_t>(-d_doppler_max);
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//int32_t doppler = static_cast<int32_t>(-d_doppler_max);
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int32_t doppler = static_cast<int32_t>(doppler_min);
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float phase_step_rad = GPS_TWO_PI * (doppler) / static_cast<float>(d_fs_in);
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float phase_step_rad = GPS_TWO_PI * (doppler) / static_cast<float>(d_fs_in);
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// The doppler step can never be outside the range -pi to +pi, otherwise there would be aliasing
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// The doppler step can never be outside the range -pi to +pi, otherwise there would be aliasing
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// The FPGA expects phase_step_rad between -1 (-pi) to +1 (+pi)
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// The FPGA expects phase_step_rad between -1 (-pi) to +1 (+pi)
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@ -239,7 +240,8 @@ void fpga_acquisition::set_doppler_sweep(uint32_t num_sweeps)
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d_map_base[3] = phase_step_rad_int;
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d_map_base[3] = phase_step_rad_int;
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// repeat the calculation with the doppler step
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// repeat the calculation with the doppler step
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doppler = static_cast<int32_t>(d_doppler_step);
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//doppler = static_cast<int32_t>(d_doppler_step);
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doppler = static_cast<int32_t>(doppler_step);
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phase_step_rad = GPS_TWO_PI * (doppler) / static_cast<float>(d_fs_in);
|
phase_step_rad = GPS_TWO_PI * (doppler) / static_cast<float>(d_fs_in);
|
||||||
phase_step_rad_real = phase_step_rad / (GPS_TWO_PI / 2);
|
phase_step_rad_real = phase_step_rad / (GPS_TWO_PI / 2);
|
||||||
if (phase_step_rad_real >= 1.0)
|
if (phase_step_rad_real >= 1.0)
|
||||||
@ -264,30 +266,6 @@ void fpga_acquisition::configure_acquisition()
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void fpga_acquisition::set_phase_step(uint32_t doppler_index)
|
|
||||||
{
|
|
||||||
float phase_step_rad_real;
|
|
||||||
float phase_step_rad_int_temp;
|
|
||||||
int32_t phase_step_rad_int;
|
|
||||||
int32_t doppler = -static_cast<int32_t>(d_doppler_max) + d_doppler_step * doppler_index;
|
|
||||||
float phase_step_rad = GPS_TWO_PI * (doppler) / static_cast<float>(d_fs_in);
|
|
||||||
// The doppler step can never be outside the range -pi to +pi, otherwise there would be aliasing
|
|
||||||
// The FPGA expects phase_step_rad between -1 (-pi) to +1 (+pi)
|
|
||||||
// The FPGA also expects the phase to be negative since it produces cos(x) -j*sin(x)
|
|
||||||
// while the gnss-sdr software (volk_gnsssdr_s32f_sincos_32fc) generates cos(x) + j*sin(x)
|
|
||||||
phase_step_rad_real = phase_step_rad / (GPS_TWO_PI / 2);
|
|
||||||
// avoid saturation of the fixed point representation in the fpga
|
|
||||||
// (only the positive value can saturate due to the 2's complement representation)
|
|
||||||
if (phase_step_rad_real >= 1.0)
|
|
||||||
{
|
|
||||||
phase_step_rad_real = MAX_PHASE_STEP_RAD;
|
|
||||||
}
|
|
||||||
phase_step_rad_int_temp = phase_step_rad_real * POW_2_2; // * 2^2
|
|
||||||
phase_step_rad_int = static_cast<int32_t>(phase_step_rad_int_temp * (POW_2_29)); // * 2^29 (in total it makes x2^31 in two steps to avoid the warnings
|
|
||||||
d_map_base[3] = phase_step_rad_int;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void fpga_acquisition::read_acquisition_results(uint32_t *max_index,
|
void fpga_acquisition::read_acquisition_results(uint32_t *max_index,
|
||||||
float *firstpeak, float *secondpeak, uint64_t *initial_sample, float *power_sum, uint32_t *doppler_index, uint32_t *total_blk_exp)
|
float *firstpeak, float *secondpeak, uint64_t *initial_sample, float *power_sum, uint32_t *doppler_index, uint32_t *total_blk_exp)
|
||||||
{
|
{
|
||||||
|
@ -60,9 +60,9 @@ public:
|
|||||||
bool init();
|
bool init();
|
||||||
bool set_local_code(uint32_t PRN);
|
bool set_local_code(uint32_t PRN);
|
||||||
bool free();
|
bool free();
|
||||||
void set_doppler_sweep(uint32_t num_sweeps);
|
void set_doppler_sweep(uint32_t num_sweeps, uint32_t doppler_step, uint32_t doppler_max);
|
||||||
void run_acquisition(void);
|
void run_acquisition(void);
|
||||||
void set_phase_step(uint32_t doppler_index);
|
|
||||||
void read_acquisition_results(uint32_t *max_index, float *firstpeak, float *secondpeak, uint64_t *initial_sample, float *power_sum, uint32_t *doppler_index, uint32_t *total_blk_exp);
|
void read_acquisition_results(uint32_t *max_index, float *firstpeak, float *secondpeak, uint64_t *initial_sample, float *power_sum, uint32_t *doppler_index, uint32_t *total_blk_exp);
|
||||||
|
|
||||||
void block_samples();
|
void block_samples();
|
||||||
|
@ -1323,6 +1323,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
|
|||||||
d_state = 2;
|
d_state = 2;
|
||||||
|
|
||||||
DLOG(INFO) << "Number of samples between Acquisition and Tracking = " << acq_trk_diff_samples << " ( " << acq_trk_diff_seconds << " s)";
|
DLOG(INFO) << "Number of samples between Acquisition and Tracking = " << acq_trk_diff_samples << " ( " << acq_trk_diff_seconds << " s)";
|
||||||
|
std::cout << "Number of samples between Acquisition and Tracking = " << acq_trk_diff_samples << " ( " << acq_trk_diff_seconds << " s)" << std::endl;
|
||||||
DLOG(INFO) << "PULL-IN Doppler [Hz] = " << d_carrier_doppler_hz
|
DLOG(INFO) << "PULL-IN Doppler [Hz] = " << d_carrier_doppler_hz
|
||||||
<< ". PULL-IN Code Phase [samples] = " << d_acq_code_phase_samples;
|
<< ". PULL-IN Code Phase [samples] = " << d_acq_code_phase_samples;
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user