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https://github.com/gnss-sdr/gnss-sdr
synced 2025-10-25 20:47:39 +00:00
Fix defects detected by Coverity Scan
This commit is contained in:
@@ -3,7 +3,6 @@
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* \brief Adapts a DLL+PLL VEML (Very Early Minus Late) tracking loop block
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* to a TrackingInterface for Galileo E1 signals for the FPGA
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* \author Marc Majoral, 2019. mmajoral(at)cttc.cat
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* \author Luis Esteve, 2012. luis(at)epsilon-formacion.com
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*
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* Code DLL + carrier PLL according to the algorithms described in:
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* K.Borre, D.M.Akos, N.Bertelsen, P.Rinder, and S.H.Jensen,
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@@ -45,10 +44,6 @@
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using google::LogMessage;
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void GalileoE1DllPllVemlTrackingFpga::stop_tracking()
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{
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}
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GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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ConfigurationInterface* configuration, const std::string& role,
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unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)
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@@ -136,6 +131,7 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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d_ca_codes = static_cast<int32_t*>(volk_gnsssdr_malloc(static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * code_samples_per_chip * GALILEO_E1_NUMBER_OF_CODES * sizeof(int32_t), volk_gnsssdr_get_alignment()));
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float* ca_codes_f;
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float* data_codes_f = nullptr;
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d_data_codes = nullptr;
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if (d_track_pilot)
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{
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@@ -200,6 +196,11 @@ GalileoE1DllPllVemlTrackingFpga::~GalileoE1DllPllVemlTrackingFpga()
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}
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void GalileoE1DllPllVemlTrackingFpga::stop_tracking()
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{
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}
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void GalileoE1DllPllVemlTrackingFpga::start_tracking()
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{
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tracking_fpga_sc->start_tracking();
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@@ -71,7 +71,7 @@ public:
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inline size_t item_size() override
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{
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return item_size_;
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return sizeof(int);
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}
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void connect(gr::top_block_sptr top_block) override;
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@@ -101,7 +101,6 @@ public:
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private:
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dll_pll_veml_tracking_fpga_sptr tracking_fpga_sc;
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size_t item_size_;
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uint32_t channel_;
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std::string role_;
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uint32_t in_streams_;
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@@ -114,6 +114,7 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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double carrier_lock_th = configuration->property(role + ".carrier_lock_th", 0.85);
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if (FLAGS_carrier_lock_th != 0.85) carrier_lock_th = FLAGS_carrier_lock_th;
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trk_param_fpga.carrier_lock_th = carrier_lock_th;
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d_data_codes = nullptr;
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// FPGA configuration parameters
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std::string default_device_name = "/dev/uio";
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@@ -136,7 +137,6 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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d_data_codes = static_cast<int32_t *>(volk_gnsssdr_malloc((static_cast<uint32_t>(code_length_chips)) * code_samples_per_chip * GALILEO_E5A_NUMBER_OF_CODES * sizeof(int32_t), volk_gnsssdr_get_alignment()));
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}
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for (uint32_t PRN = 1; PRN <= GALILEO_E5A_NUMBER_OF_CODES; PRN++)
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{
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galileo_e5_a_code_gen_complex_primary(aux_code, PRN, const_cast<char *>(sig_));
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@@ -70,7 +70,7 @@ public:
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inline size_t item_size() override
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{
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return item_size_;
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return sizeof(int)
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}
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void connect(gr::top_block_sptr top_block) override;
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@@ -98,7 +98,6 @@ public:
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private:
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dll_pll_veml_tracking_fpga_sptr tracking_fpga_sc;
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size_t item_size_;
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uint32_t channel_;
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std::string role_;
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uint32_t in_streams_;
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@@ -70,7 +70,7 @@ public:
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inline size_t item_size() override
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{
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return item_size_;
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return sizeof(int);
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}
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void connect(gr::top_block_sptr top_block) override;
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@@ -97,7 +97,6 @@ public:
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private:
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dll_pll_veml_tracking_fpga_sptr tracking_fpga_sc;
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size_t item_size_;
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uint32_t channel_;
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std::string role_;
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uint32_t in_streams_;
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@@ -66,6 +66,18 @@
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#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000
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#define TEST_REGISTER_TRACK_WRITEVAL 0x55AA
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#ifndef TEMP_FAILURE_RETRY
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#define TEMP_FAILURE_RETRY(exp) \
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({ \
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decltype(exp) _rc; \
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do \
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{ \
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_rc = (exp); \
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} \
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while (_rc == -1 && errno == EINTR); \
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_rc; \
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})
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#endif
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Fpga_Multicorrelator_8sc::Fpga_Multicorrelator_8sc(int32_t n_correlators,
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std::string device_name, uint32_t device_base, int32_t *ca_codes, int32_t *data_codes, uint32_t code_length_chips, bool track_pilot,
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@@ -95,6 +107,7 @@ Fpga_Multicorrelator_8sc::Fpga_Multicorrelator_8sc(int32_t n_correlators,
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}
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d_shifts_chips = nullptr;
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d_prompt_data_shift = nullptr;
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d_Prompt_Data = nullptr;
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d_corr_out = nullptr;
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d_code_length_chips = 0;
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d_rem_code_phase_chips = 0;
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@@ -105,7 +118,8 @@ Fpga_Multicorrelator_8sc::Fpga_Multicorrelator_8sc(int32_t n_correlators,
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d_phase_step_rad_int = 0;
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d_initial_sample_counter = 0;
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d_channel = 0;
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d_correlator_length_samples = 0,
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d_correlator_length_samples = 0;
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d_code_phase_step_chips_num = 0;
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d_code_length_chips = code_length_chips;
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d_ca_codes = ca_codes;
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d_data_codes = data_codes;
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@@ -119,6 +133,14 @@ Fpga_Multicorrelator_8sc::Fpga_Multicorrelator_8sc(int32_t n_correlators,
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Fpga_Multicorrelator_8sc::~Fpga_Multicorrelator_8sc()
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{
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close_device();
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if (d_initial_index != nullptr)
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{
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volk_gnsssdr_free(d_initial_index);
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}
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if (d_initial_interp_counter != nullptr)
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{
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volk_gnsssdr_free(d_initial_interp_counter);
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}
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}
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@@ -98,7 +98,7 @@ private:
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float *d_shifts_chips;
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float *d_prompt_data_shift;
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int32_t d_code_length_chips;
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int32_t d_n_correlators;
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int32_t d_n_correlators; // number of correlators
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// data related to the hardware module and the driver
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int32_t d_device_descriptor; // driver descriptor
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@@ -106,7 +106,6 @@ private:
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// configuration data received from the interface
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uint32_t d_channel; // channel number
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uint32_t d_ncorrelators; // number of correlators
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uint32_t d_correlator_length_samples;
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float d_rem_code_phase_chips;
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float d_code_phase_step_chips;
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