From cfb9c428f4f72154fb7c94672e9ae39bf0c8029b Mon Sep 17 00:00:00 2001 From: Carles Fernandez Date: Sat, 16 Jul 2022 10:34:01 +0200 Subject: [PATCH] Add Comet Lake support --- .../volk_gnsssdr/cpu_features/include/cpuinfo_x86.h | 1 + .../cpu_features/src/impl_x86__base_implementation.inl | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/cpu_features/include/cpuinfo_x86.h b/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/cpu_features/include/cpuinfo_x86.h index 50d1b0498..3a968a862 100644 --- a/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/cpu_features/include/cpuinfo_x86.h +++ b/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/cpu_features/include/cpuinfo_x86.h @@ -132,6 +132,7 @@ typedef enum INTEL_KBL, // KABY LAKE INTEL_CFL, // COFFEE LAKE INTEL_WHL, // WHISKEY LAKE + INTEL_CML, // COMET LAKE INTEL_CNL, // CANNON LAKE INTEL_ICL, // ICE LAKE INTEL_TGL, // TIGER LAKE diff --git a/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/cpu_features/src/impl_x86__base_implementation.inl b/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/cpu_features/src/impl_x86__base_implementation.inl index 6c13bd808..29ad4b76c 100644 --- a/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/cpu_features/src/impl_x86__base_implementation.inl +++ b/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/cpu_features/src/impl_x86__base_implementation.inl @@ -561,6 +561,8 @@ X86Microarchitecture GetX86Microarchitecture(const X86Info* info) return INTEL_CFL; // https://en.wikipedia.org/wiki/Coffee_Lake case 11: return INTEL_WHL; // https://en.wikipedia.org/wiki/Whiskey_Lake_(microarchitecture) + case 12: + return INTEL_CML; // https://en.wikichip.org/wiki/intel/microarchitectures/comet_lake default: return X86_UNKNOWN; } @@ -579,6 +581,9 @@ X86Microarchitecture GetX86Microarchitecture(const X86Info* info) case CPUID(0x06, 0x9A): // https://en.wikichip.org/wiki/intel/microarchitectures/alder_lake return INTEL_ADL; + case CPUID(0x06, 0xA5): + // https://en.wikichip.org/wiki/intel/microarchitectures/comet_lake + return INTEL_CML; case CPUID(0x06, 0xA7): // https://en.wikichip.org/wiki/intel/microarchitectures/rocket_lake return INTEL_RCL; @@ -1830,6 +1835,7 @@ CacheInfo GetX86CacheInfo(void) LINE(INTEL_KBL) \ LINE(INTEL_CFL) \ LINE(INTEL_WHL) \ + LINE(INTEL_CML) \ LINE(INTEL_CNL) \ LINE(INTEL_ICL) \ LINE(INTEL_TGL) \