mirror of
https://github.com/gnss-sdr/gnss-sdr
synced 2026-10-03 22:31:49 +00:00
Merge branch 'next' of https://github.com/mmajoral/gnss-sdr into fpga_extended_coherent_integration
This commit is contained in:
@@ -108,7 +108,7 @@ target_include_directories(tracking_adapters
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${CMAKE_SOURCE_DIR}/src/core/interfaces
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)
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if(ENABLE_CUDA)
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if(ENABLE_CUDA AND NOT CMAKE_VERSION VERSION_GREATER 3.11)
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target_link_libraries(tracking_adapters
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PUBLIC
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${CUDA_LIBRARIES}
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@@ -59,14 +59,20 @@ BeidouB3iDllPllTracking::BeidouB3iDllPllTracking(
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bool dump = configuration->property(role + ".dump", false);
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trk_param.dump = dump;
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float pll_bw_hz = configuration->property(role + ".pll_bw_hz", 50.0);
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if (FLAGS_pll_bw_hz != 0.0) pll_bw_hz = static_cast<float>(FLAGS_pll_bw_hz);
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if (FLAGS_pll_bw_hz != 0.0)
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{
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pll_bw_hz = static_cast<float>(FLAGS_pll_bw_hz);
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}
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trk_param.pll_bw_hz = pll_bw_hz;
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float pll_bw_narrow_hz = configuration->property(role + ".pll_bw_narrow_hz", 20.0);
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trk_param.pll_bw_narrow_hz = pll_bw_narrow_hz;
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float dll_bw_narrow_hz = configuration->property(role + ".dll_bw_narrow_hz", 2.0);
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trk_param.dll_bw_narrow_hz = dll_bw_narrow_hz;
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float dll_bw_hz = configuration->property(role + ".dll_bw_hz", 2.0);
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if (FLAGS_dll_bw_hz != 0.0) dll_bw_hz = static_cast<float>(FLAGS_dll_bw_hz);
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if (FLAGS_dll_bw_hz != 0.0)
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{
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dll_bw_hz = static_cast<float>(FLAGS_dll_bw_hz);
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}
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trk_param.dll_bw_hz = dll_bw_hz;
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int dll_filter_order = configuration->property(role + ".dll_filter_order", 2);
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@@ -227,17 +227,17 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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for (uint32_t PRN = 1; PRN <= GALILEO_E1_NUMBER_OF_CODES; PRN++)
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{
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char data_signal[3] = "1B";
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std::array<char, 3> data_signal = {'1', 'B', '\0'};
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if (d_track_pilot)
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{
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char pilot_signal[3] = "1C";
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galileo_e1_code_gen_sinboc11_float(ca_codes_f, pilot_signal, PRN);
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galileo_e1_code_gen_sinboc11_float(data_codes_f, data_signal, PRN);
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std::array<char, 3> pilot_signal = {'1', 'C', '\0'};
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galileo_e1_code_gen_sinboc11_float(gsl::span<float>(ca_codes_f, static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * code_samples_per_chip), pilot_signal, PRN);
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galileo_e1_code_gen_sinboc11_float(gsl::span<float>(data_codes_f, static_cast<uint32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * code_samples_per_chip), data_signal, PRN);
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < 2 * GALILEO_E1_B_CODE_LENGTH_CHIPS; s++)
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{
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int32_t tmp_value = static_cast<int32_t>(ca_codes_f[s]);
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auto tmp_value = static_cast<int32_t>(ca_codes_f[s]);
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if (tmp_value < 0)
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{
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tmp_value = 0;
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@@ -255,12 +255,12 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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}
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else
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{
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galileo_e1_code_gen_sinboc11_float(ca_codes_f, data_signal, PRN);
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galileo_e1_code_gen_sinboc11_float(gsl::span<float>(ca_codes_f, static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * code_samples_per_chip), data_signal, PRN);
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < 2 * GALILEO_E1_B_CODE_LENGTH_CHIPS; s++)
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{
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int32_t tmp_value = static_cast<int32_t>(ca_codes_f[s]);
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auto tmp_value = static_cast<int32_t>(ca_codes_f[s]);
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if (tmp_value < 0)
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{
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tmp_value = 0;
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@@ -271,7 +271,7 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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}
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}
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delete[] ca_codes_f;
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volk_gnsssdr_free(ca_codes_f);
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if (d_track_pilot)
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{
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volk_gnsssdr_free(data_codes_f);
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@@ -292,10 +292,10 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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GalileoE1DllPllVemlTrackingFpga::~GalileoE1DllPllVemlTrackingFpga()
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{
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delete[] d_ca_codes;
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volk_gnsssdr_free(d_ca_codes);
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if (d_track_pilot)
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{
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delete[] d_data_codes;
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volk_gnsssdr_free(d_data_codes);
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}
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}
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@@ -217,14 +217,15 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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for (uint32_t PRN = 1; PRN <= GALILEO_E5A_NUMBER_OF_CODES; PRN++)
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{
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galileo_e5_a_code_gen_complex_primary(aux_code, PRN, const_cast<char *>(sig_));
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std::array<char, 3> sig_a = {'5', 'X', '\0'};
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galileo_e5_a_code_gen_complex_primary(gsl::span<gr_complex>(aux_code, code_length_chips * code_samples_per_chip), PRN, sig_a);
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if (trk_param_fpga.track_pilot)
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{
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < code_length_chips; s++)
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{
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int32_t tmp_value = static_cast<int32_t>(aux_code[s].imag());
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auto tmp_value = static_cast<int32_t>(aux_code[s].imag());
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if (tmp_value < 0)
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{
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tmp_value = 0;
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@@ -246,7 +247,7 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < code_length_chips; s++)
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{
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int32_t tmp_value = static_cast<int32_t>(aux_code[s].real());
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auto tmp_value = static_cast<int32_t>(aux_code[s].real());
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if (tmp_value < 0)
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{
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tmp_value = 0;
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@@ -303,10 +304,10 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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GalileoE5aDllPllTrackingFpga::~GalileoE5aDllPllTrackingFpga()
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{
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delete[] d_ca_codes;
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volk_gnsssdr_free(d_ca_codes);
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if (d_track_pilot)
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{
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delete[] d_data_codes;
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volk_gnsssdr_free(d_data_codes);
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}
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}
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@@ -213,7 +213,7 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
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d_ca_codes = static_cast<int32_t*>(volk_gnsssdr_malloc(static_cast<int32_t>(GPS_L1_CA_CODE_LENGTH_CHIPS * NUM_PRNs) * sizeof(int32_t), volk_gnsssdr_get_alignment()));
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for (uint32_t PRN = 1; PRN <= NUM_PRNs; PRN++)
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{
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gps_l1_ca_code_gen_int(&d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1)], PRN, 0);
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gps_l1_ca_code_gen_int(gsl::span<int32_t>(&d_ca_codes[static_cast<int32_t>(GPS_L1_CA_CODE_LENGTH_CHIPS) * (PRN - 1)], &d_ca_codes[static_cast<int32_t>(GPS_L1_CA_CODE_LENGTH_CHIPS) * (PRN)]), PRN, 0);
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t k = 0; k < GPS_L1_CA_CODE_LENGTH_CHIPS; k++)
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@@ -257,7 +257,7 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
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GpsL1CaDllPllTrackingFpga::~GpsL1CaDllPllTrackingFpga()
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{
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delete[] d_ca_codes;
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volk_gnsssdr_free(d_ca_codes);
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}
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@@ -128,7 +128,7 @@ GpsL2MDllPllTrackingFpga::GpsL2MDllPllTrackingFpga(
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d_ca_codes = static_cast<int*>(volk_gnsssdr_malloc(static_cast<int>(GPS_L2_M_CODE_LENGTH_CHIPS * NUM_PRNs) * sizeof(int), volk_gnsssdr_get_alignment()));
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for (unsigned int PRN = 1; PRN <= NUM_PRNs; PRN++)
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{
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gps_l2c_m_code_gen_float(ca_codes_f, PRN);
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gps_l2c_m_code_gen_float(gsl::span<float>(ca_codes_f, static_cast<unsigned int>(GPS_L2_M_CODE_LENGTH_CHIPS)), PRN);
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for (unsigned int s = 0; s < 2 * static_cast<unsigned int>(GPS_L2_M_CODE_LENGTH_CHIPS); s++)
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{
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d_ca_codes[static_cast<int>(GPS_L2_M_CODE_LENGTH_CHIPS) * (PRN - 1) + s] = static_cast<int>(ca_codes_f[s]);
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@@ -236,13 +236,13 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
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{
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if (track_pilot)
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{
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gps_l5q_code_gen_float(tracking_code, PRN);
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gps_l5i_code_gen_float(data_code, PRN);
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gps_l5q_code_gen_float(gsl::span<float>(tracking_code, code_length_chips), PRN);
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gps_l5i_code_gen_float(gsl::span<float>(data_code, code_length_chips), PRN);
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < code_length_chips; s++)
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{
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int32_t tmp_value = static_cast<int32_t>(tracking_code[s]);
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auto tmp_value = static_cast<int32_t>(tracking_code[s]);
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if (tmp_value < 0)
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{
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tmp_value = 0;
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@@ -261,12 +261,12 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
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}
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else
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{
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gps_l5i_code_gen_float(tracking_code, PRN);
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gps_l5i_code_gen_float(gsl::span<float>(tracking_code, code_length_chips), PRN);
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < code_length_chips; s++)
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{
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int32_t tmp_value = static_cast<int32_t>(tracking_code[s]);
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auto tmp_value = static_cast<int32_t>(tracking_code[s]);
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if (tmp_value < 0)
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{
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tmp_value = 0;
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