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Carles Fernandez 2018-04-30 19:53:20 +02:00
parent 21a6d8ac61
commit bd81330201
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GPG Key ID: 4C583C52B0C3877D
7 changed files with 281 additions and 295 deletions
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144
src/algorithms/libs/CMakeLists.txt
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@ -19,81 +19,81 @@
add_subdirectory(rtklib) add_subdirectory(rtklib)
if(ENABLE_FPGA) if(ENABLE_FPGA)
set(GNSS_SPLIBS_SOURCES set(GNSS_SPLIBS_SOURCES
gps_l2c_signal.cc gps_l2c_signal.cc
gps_l5_signal.cc gps_l5_signal.cc
galileo_e1_signal_processing.cc galileo_e1_signal_processing.cc
gnss_sdr_valve.cc gnss_sdr_valve.cc
gnss_sdr_sample_counter.cc gnss_sdr_sample_counter.cc
gnss_sdr_time_counter.cc gnss_sdr_time_counter.cc
gnss_signal_processing.cc gnss_signal_processing.cc
gps_sdr_signal_processing.cc gps_sdr_signal_processing.cc
glonass_l1_signal_processing.cc glonass_l1_signal_processing.cc
glonass_l2_signal_processing.cc glonass_l2_signal_processing.cc
pass_through.cc pass_through.cc
galileo_e5_signal_processing.cc galileo_e5_signal_processing.cc
complex_byte_to_float_x2.cc complex_byte_to_float_x2.cc
byte_x2_to_complex_byte.cc byte_x2_to_complex_byte.cc
cshort_to_float_x2.cc cshort_to_float_x2.cc
short_x2_to_cshort.cc short_x2_to_cshort.cc
complex_float_to_complex_byte.cc complex_float_to_complex_byte.cc
conjugate_cc.cc conjugate_cc.cc
conjugate_sc.cc conjugate_sc.cc
conjugate_ic.cc conjugate_ic.cc
) )
else(ENABLE_FPGA) else(ENABLE_FPGA)
set(GNSS_SPLIBS_SOURCES set(GNSS_SPLIBS_SOURCES
gps_l2c_signal.cc gps_l2c_signal.cc
gps_l5_signal.cc gps_l5_signal.cc
galileo_e1_signal_processing.cc galileo_e1_signal_processing.cc
gnss_sdr_valve.cc gnss_sdr_valve.cc
gnss_sdr_sample_counter.cc gnss_sdr_sample_counter.cc
gnss_signal_processing.cc gnss_signal_processing.cc
gps_sdr_signal_processing.cc gps_sdr_signal_processing.cc
glonass_l1_signal_processing.cc glonass_l1_signal_processing.cc
glonass_l2_signal_processing.cc glonass_l2_signal_processing.cc
pass_through.cc pass_through.cc
galileo_e5_signal_processing.cc galileo_e5_signal_processing.cc
complex_byte_to_float_x2.cc complex_byte_to_float_x2.cc
byte_x2_to_complex_byte.cc byte_x2_to_complex_byte.cc
cshort_to_float_x2.cc cshort_to_float_x2.cc
short_x2_to_cshort.cc short_x2_to_cshort.cc
complex_float_to_complex_byte.cc complex_float_to_complex_byte.cc
conjugate_cc.cc conjugate_cc.cc
conjugate_sc.cc conjugate_sc.cc
conjugate_ic.cc conjugate_ic.cc
) )
endif(ENABLE_FPGA) endif(ENABLE_FPGA)
if(OPENCL_FOUND) if(OPENCL_FOUND)
set(GNSS_SPLIBS_SOURCES ${GNSS_SPLIBS_SOURCES} set(GNSS_SPLIBS_SOURCES ${GNSS_SPLIBS_SOURCES}
opencl/fft_execute.cc # Needs OpenCL opencl/fft_execute.cc # Needs OpenCL
opencl/fft_setup.cc # Needs OpenCL opencl/fft_setup.cc # Needs OpenCL
opencl/fft_kernelstring.cc # Needs OpenCL opencl/fft_kernelstring.cc # Needs OpenCL
) )
endif(OPENCL_FOUND) endif(OPENCL_FOUND)
include_directories( include_directories(
${CMAKE_CURRENT_SOURCE_DIR} ${CMAKE_CURRENT_SOURCE_DIR}
${CMAKE_SOURCE_DIR}/src/core/system_parameters ${CMAKE_SOURCE_DIR}/src/core/system_parameters
${CMAKE_SOURCE_DIR}/src/core/receiver ${CMAKE_SOURCE_DIR}/src/core/receiver
${CMAKE_SOURCE_DIR}/src/core/interfaces ${CMAKE_SOURCE_DIR}/src/core/interfaces
${Boost_INCLUDE_DIRS} ${Boost_INCLUDE_DIRS}
${GLOG_INCLUDE_DIRS} ${GLOG_INCLUDE_DIRS}
${GFlags_INCLUDE_DIRS} ${GFlags_INCLUDE_DIRS}
${GNURADIO_RUNTIME_INCLUDE_DIRS} ${GNURADIO_RUNTIME_INCLUDE_DIRS}
${GNURADIO_BLOCKS_INCLUDE_DIRS} ${GNURADIO_BLOCKS_INCLUDE_DIRS}
${VOLK_INCLUDE_DIRS} ${VOLK_INCLUDE_DIRS}
${VOLK_GNSSSDR_INCLUDE_DIRS} ${VOLK_GNSSSDR_INCLUDE_DIRS}
) )
if(OPENCL_FOUND) if(OPENCL_FOUND)
include_directories( ${OPENCL_INCLUDE_DIRS} ) include_directories( ${OPENCL_INCLUDE_DIRS} )
if(OS_IS_MACOSX) if(OS_IS_MACOSX)
set(OPT_LIBRARIES ${OPT_LIBRARIES} "-framework OpenCL") set(OPT_LIBRARIES ${OPT_LIBRARIES} "-framework OpenCL")
else(OS_IS_MACOSX) else(OS_IS_MACOSX)
set(OPT_LIBRARIES ${OPT_LIBRARIES} ${OPENCL_LIBRARIES}) set(OPT_LIBRARIES ${OPT_LIBRARIES} ${OPENCL_LIBRARIES})
endif(OS_IS_MACOSX) endif(OS_IS_MACOSX)
endif(OPENCL_FOUND) endif(OPENCL_FOUND)
add_definitions(-DGNSSSDR_INSTALL_DIR="${CMAKE_INSTALL_PREFIX}") add_definitions(-DGNSSSDR_INSTALL_DIR="${CMAKE_INSTALL_PREFIX}")
@ -105,18 +105,18 @@ add_library(gnss_sp_libs ${GNSS_SPLIBS_SOURCES} ${GNSS_SPLIBS_HEADERS})
source_group(Headers FILES ${GNSS_SPLIBS_HEADERS}) source_group(Headers FILES ${GNSS_SPLIBS_HEADERS})
target_link_libraries(gnss_sp_libs ${GNURADIO_RUNTIME_LIBRARIES} target_link_libraries(gnss_sp_libs ${GNURADIO_RUNTIME_LIBRARIES}
${VOLK_LIBRARIES} ${ORC_LIBRARIES} ${VOLK_LIBRARIES} ${ORC_LIBRARIES}
${VOLK_GNSSSDR_LIBRARIES} ${ORC_LIBRARIES} ${VOLK_GNSSSDR_LIBRARIES} ${ORC_LIBRARIES}
${GFlags_LIBS} ${GFlags_LIBS}
${GNURADIO_BLOCKS_LIBRARIES} ${GNURADIO_BLOCKS_LIBRARIES}
${GNURADIO_FFT_LIBRARIES} ${GNURADIO_FFT_LIBRARIES}
${GNURADIO_FILTER_LIBRARIES} ${GNURADIO_FILTER_LIBRARIES}
${OPT_LIBRARIES} ${OPT_LIBRARIES}
gnss_rx gnss_rx
) )
if(NOT VOLK_GNSSSDR_FOUND) if(NOT VOLK_GNSSSDR_FOUND)
add_dependencies(gnss_sp_libs volk_gnsssdr_module) add_dependencies(gnss_sp_libs volk_gnsssdr_module)
endif(NOT VOLK_GNSSSDR_FOUND) endif(NOT VOLK_GNSSSDR_FOUND)
if(${GFLAGS_GREATER_20}) if(${GFLAGS_GREATER_20})

1
src/algorithms/signal_source/libs/CMakeLists.txt
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@ -78,4 +78,3 @@ add_library(signal_source_lib ${SIGNAL_SOURCE_LIB_SOURCES} ${SIGNAL_SOURCE_LIB_H
source_group(Headers FILES ${SIGNAL_SOURCE_LIB_HEADERS}) source_group(Headers FILES ${SIGNAL_SOURCE_LIB_HEADERS})
target_link_libraries(signal_source_lib ${OPT_LIBRARIES}) target_link_libraries(signal_source_lib ${OPT_LIBRARIES})

17
src/algorithms/signal_source/libs/fpga_switch.cc
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@ -35,7 +35,6 @@
*/ */
#include "fpga_switch.h" #include "fpga_switch.h"
#include <cmath> #include <cmath>
// FPGA stuff // FPGA stuff
@ -76,9 +75,9 @@ fpga_switch::fpga_switch(std::string device_name)
printf("switch memory successfully mapped\n"); printf("switch memory successfully mapped\n");
} }
d_map_base = reinterpret_cast<volatile unsigned *>(mmap(NULL, PAGE_SIZE, d_map_base = reinterpret_cast<volatile unsigned *>(mmap(NULL, PAGE_SIZE,
PROT_READ | PROT_WRITE, MAP_SHARED, d_device_descriptor, 0)); PROT_READ | PROT_WRITE, MAP_SHARED, d_device_descriptor, 0));
if (d_map_base == reinterpret_cast<void*>(-1)) if (d_map_base == reinterpret_cast<void *>(-1))
{ {
LOG(WARNING) << "Cannot map the FPGA switch module into tracking memory"; LOG(WARNING) << "Cannot map the FPGA switch module into tracking memory";
printf("could not map switch memory\n"); printf("could not map switch memory\n");
@ -100,18 +99,21 @@ fpga_switch::fpga_switch(std::string device_name)
DLOG(INFO) << "Switch FPGA class created"; DLOG(INFO) << "Switch FPGA class created";
} }
fpga_switch::~fpga_switch() fpga_switch::~fpga_switch()
{ {
close_device(); close_device();
} }
void fpga_switch::set_switch_position(int switch_position) void fpga_switch::set_switch_position(int switch_position)
{ {
d_map_base[0] = switch_position; d_map_base[0] = switch_position;
} }
unsigned fpga_switch::fpga_switch_test_register( unsigned fpga_switch::fpga_switch_test_register(
unsigned writeval) unsigned writeval)
{ {
unsigned readval; unsigned readval;
// write value to test register // write value to test register
@ -122,15 +124,14 @@ unsigned fpga_switch::fpga_switch_test_register(
return readval; return readval;
} }
void fpga_switch::close_device() void fpga_switch::close_device()
{ {
unsigned * aux = const_cast<unsigned*>(d_map_base); unsigned *aux = const_cast<unsigned *>(d_map_base);
if (munmap(static_cast<void*>(aux), PAGE_SIZE) == -1) if (munmap(static_cast<void *>(aux), PAGE_SIZE) == -1)
{ {
printf("Failed to unmap memory uio\n"); printf("Failed to unmap memory uio\n");
} }
close(d_device_descriptor); close(d_device_descriptor);
} }

7
src/algorithms/signal_source/libs/fpga_switch.h
View File

@ -49,13 +49,12 @@ public:
void set_switch_position(int switch_position); void set_switch_position(int switch_position);
private: private:
int d_device_descriptor; // driver descriptor int d_device_descriptor; // driver descriptor
volatile unsigned *d_map_base; // driver memory map volatile unsigned *d_map_base; // driver memory map
// private functions // private functions
unsigned fpga_switch_test_register(unsigned writeval); unsigned fpga_switch_test_register(unsigned writeval);
void close_device(void); void close_device(void);
}; };
#endif /* GNSS_SDR_FPGA_SWITCH_H_ */ #endif /* GNSS_SDR_FPGA_SWITCH_H_ */

127
src/algorithms/tracking/libs/fpga_multicorrelator_8sc.cc
View File

@ -35,9 +35,7 @@
*/ */
#include "fpga_multicorrelator_8sc.h" #include "fpga_multicorrelator_8sc.h"
#include <cmath> #include <cmath>
// FPGA stuff // FPGA stuff
#include <new> #include <new>
@ -75,7 +73,7 @@
#define CODE_RESAMPLER_NUM_BITS_PRECISION 20 #define CODE_RESAMPLER_NUM_BITS_PRECISION 20
#define CODE_PHASE_STEP_CHIPS_NUM_NBITS CODE_RESAMPLER_NUM_BITS_PRECISION #define CODE_PHASE_STEP_CHIPS_NUM_NBITS CODE_RESAMPLER_NUM_BITS_PRECISION
#define pwrtwo(x) (1 << (x)) #define pwrtwo(x) (1 << (x))
#define MAX_CODE_RESAMPLER_COUNTER pwrtwo(CODE_PHASE_STEP_CHIPS_NUM_NBITS) // 2^CODE_PHASE_STEP_CHIPS_NUM_NBITS #define MAX_CODE_RESAMPLER_COUNTER pwrtwo(CODE_PHASE_STEP_CHIPS_NUM_NBITS) // 2^CODE_PHASE_STEP_CHIPS_NUM_NBITS
#define PHASE_CARR_NBITS 32 #define PHASE_CARR_NBITS 32
#define PHASE_CARR_NBITS_INT 1 #define PHASE_CARR_NBITS_INT 1
#define PHASE_CARR_NBITS_FRAC PHASE_CARR_NBITS - PHASE_CARR_NBITS_INT #define PHASE_CARR_NBITS_FRAC PHASE_CARR_NBITS - PHASE_CARR_NBITS_INT
@ -86,7 +84,7 @@
int fpga_multicorrelator_8sc::read_sample_counter() int fpga_multicorrelator_8sc::read_sample_counter()
{ {
return d_map_base[7]; return d_map_base[7];
} }
void fpga_multicorrelator_8sc::set_initial_sample(int samples_offset) void fpga_multicorrelator_8sc::set_initial_sample(int samples_offset)
@ -96,15 +94,14 @@ void fpga_multicorrelator_8sc::set_initial_sample(int samples_offset)
} }
void fpga_multicorrelator_8sc::set_local_code_and_taps(int code_length_chips, void fpga_multicorrelator_8sc::set_local_code_and_taps(int code_length_chips,
float *shifts_chips, int PRN) float *shifts_chips, int PRN)
{ {
d_shifts_chips = shifts_chips; d_shifts_chips = shifts_chips;
d_code_length_chips = code_length_chips; d_code_length_chips = code_length_chips;
fpga_multicorrelator_8sc::fpga_configure_tracking_gps_local_code(PRN); fpga_multicorrelator_8sc::fpga_configure_tracking_gps_local_code(PRN);
} }
void fpga_multicorrelator_8sc::set_output_vectors(gr_complex* corr_out) void fpga_multicorrelator_8sc::set_output_vectors(gr_complex *corr_out)
{ {
d_corr_out = corr_out; d_corr_out = corr_out;
} }
@ -116,21 +113,18 @@ void fpga_multicorrelator_8sc::update_local_code(float rem_code_phase_chips)
fpga_multicorrelator_8sc::fpga_configure_code_parameters_in_fpga(); fpga_multicorrelator_8sc::fpga_configure_code_parameters_in_fpga();
} }
void fpga_multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler( void fpga_multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler(
float rem_carrier_phase_in_rad, float phase_step_rad, float rem_carrier_phase_in_rad, float phase_step_rad,
float rem_code_phase_chips, float code_phase_step_chips, float rem_code_phase_chips, float code_phase_step_chips,
int signal_length_samples) int signal_length_samples)
{ {
update_local_code(rem_code_phase_chips); update_local_code(rem_code_phase_chips);
d_rem_carrier_phase_in_rad = rem_carrier_phase_in_rad; d_rem_carrier_phase_in_rad = rem_carrier_phase_in_rad;
d_code_phase_step_chips = code_phase_step_chips; d_code_phase_step_chips = code_phase_step_chips;
d_phase_step_rad = phase_step_rad; d_phase_step_rad = phase_step_rad;
d_correlator_length_samples = signal_length_samples; d_correlator_length_samples = signal_length_samples;
fpga_multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga(); fpga_multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga();
fpga_multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga(); fpga_multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga();
fpga_multicorrelator_8sc::fpga_launch_multicorrelator_fpga(); fpga_multicorrelator_8sc::fpga_launch_multicorrelator_fpga();
int irq_count; int irq_count;
ssize_t nb; ssize_t nb;
@ -143,8 +137,9 @@ void fpga_multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler(
fpga_multicorrelator_8sc::read_tracking_gps_results(); fpga_multicorrelator_8sc::read_tracking_gps_results();
} }
fpga_multicorrelator_8sc::fpga_multicorrelator_8sc(int n_correlators, fpga_multicorrelator_8sc::fpga_multicorrelator_8sc(int n_correlators,
std::string device_name, unsigned int device_base) std::string device_name, unsigned int device_base)
{ {
d_n_correlators = n_correlators; d_n_correlators = n_correlators;
d_device_name = device_name; d_device_name = device_name;
@ -153,10 +148,10 @@ fpga_multicorrelator_8sc::fpga_multicorrelator_8sc(int n_correlators,
d_map_base = nullptr; d_map_base = nullptr;
// instantiate variable length vectors // instantiate variable length vectors
d_initial_index = static_cast<unsigned*>(volk_gnsssdr_malloc( d_initial_index = static_cast<unsigned *>(volk_gnsssdr_malloc(
n_correlators * sizeof(unsigned), volk_gnsssdr_get_alignment())); n_correlators * sizeof(unsigned), volk_gnsssdr_get_alignment()));
d_initial_interp_counter = static_cast<unsigned*>(volk_gnsssdr_malloc( d_initial_interp_counter = static_cast<unsigned *>(volk_gnsssdr_malloc(
n_correlators * sizeof(unsigned), volk_gnsssdr_get_alignment())); n_correlators * sizeof(unsigned), volk_gnsssdr_get_alignment()));
//d_local_code_in = nullptr; //d_local_code_in = nullptr;
d_shifts_chips = nullptr; d_shifts_chips = nullptr;
@ -173,19 +168,18 @@ fpga_multicorrelator_8sc::fpga_multicorrelator_8sc(int n_correlators,
d_correlator_length_samples = 0; d_correlator_length_samples = 0;
// pre-compute all the codes // pre-compute all the codes
d_ca_codes = static_cast<int*>(volk_gnsssdr_malloc(static_cast<int>(GPS_L1_CA_CODE_LENGTH_CHIPS*NUM_PRNs) * sizeof(int), volk_gnsssdr_get_alignment())); d_ca_codes = static_cast<int *>(volk_gnsssdr_malloc(static_cast<int>(GPS_L1_CA_CODE_LENGTH_CHIPS * NUM_PRNs) * sizeof(int), volk_gnsssdr_get_alignment()));
for (unsigned int PRN = 1; PRN <= NUM_PRNs; PRN++) for (unsigned int PRN = 1; PRN <= NUM_PRNs; PRN++)
{ {
gps_l1_ca_code_gen_int(&d_ca_codes[(int(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1)], PRN, 0); gps_l1_ca_code_gen_int(&d_ca_codes[(int(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1)], PRN, 0);
} }
DLOG(INFO) << "TRACKING FPGA CLASS CREATED"; DLOG(INFO) << "TRACKING FPGA CLASS CREATED";
} }
fpga_multicorrelator_8sc::~fpga_multicorrelator_8sc() fpga_multicorrelator_8sc::~fpga_multicorrelator_8sc()
{ {
delete[] d_ca_codes; delete[] d_ca_codes;
close_device(); close_device();
} }
@ -214,7 +208,7 @@ bool fpga_multicorrelator_8sc::free()
void fpga_multicorrelator_8sc::set_channel(unsigned int channel) void fpga_multicorrelator_8sc::set_channel(unsigned int channel)
{ {
char device_io_name[MAX_LENGTH_DEVICEIO_NAME]; // driver io name char device_io_name[MAX_LENGTH_DEVICEIO_NAME]; // driver io name
d_channel = channel; d_channel = channel;
// open the device corresponding to the assigned channel // open the device corresponding to the assigned channel
@ -229,12 +223,12 @@ void fpga_multicorrelator_8sc::set_channel(unsigned int channel)
LOG(WARNING) << "Cannot open deviceio" << device_io_name; LOG(WARNING) << "Cannot open deviceio" << device_io_name;
} }
d_map_base = reinterpret_cast<volatile unsigned *>(mmap(NULL, PAGE_SIZE, d_map_base = reinterpret_cast<volatile unsigned *>(mmap(NULL, PAGE_SIZE,
PROT_READ | PROT_WRITE, MAP_SHARED, d_device_descriptor, 0)); PROT_READ | PROT_WRITE, MAP_SHARED, d_device_descriptor, 0));
if (d_map_base == reinterpret_cast<void*>(-1)) if (d_map_base == reinterpret_cast<void *>(-1))
{ {
LOG(WARNING) << "Cannot map the FPGA tracking module " LOG(WARNING) << "Cannot map the FPGA tracking module "
<< d_channel << "into user memory"; << d_channel << "into user memory";
} }
// sanity check : check test register // sanity check : check test register
@ -253,7 +247,7 @@ void fpga_multicorrelator_8sc::set_channel(unsigned int channel)
unsigned fpga_multicorrelator_8sc::fpga_acquisition_test_register( unsigned fpga_multicorrelator_8sc::fpga_acquisition_test_register(
unsigned writeval) unsigned writeval)
{ {
unsigned readval; unsigned readval;
// write value to test register // write value to test register
@ -287,11 +281,9 @@ void fpga_multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int PRN)
code_chip = 0; code_chip = 0;
} }
// copy the local code to the FPGA memory one by one // copy the local code to the FPGA memory one by one
d_map_base[11] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY d_map_base[11] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip | select_fpga_correlator;
| code_chip | select_fpga_correlator;
} }
select_fpga_correlator = select_fpga_correlator select_fpga_correlator = select_fpga_correlator + LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
+ LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
} }
} }
@ -304,20 +296,20 @@ void fpga_multicorrelator_8sc::fpga_compute_code_shift_parameters(void)
for (i = 0; i < d_n_correlators; i++) for (i = 0; i < d_n_correlators; i++)
{ {
temp_calculation = floor( temp_calculation = floor(
d_shifts_chips[i] - d_rem_code_phase_chips); d_shifts_chips[i] - d_rem_code_phase_chips);
if (temp_calculation < 0) if (temp_calculation < 0)
{ {
temp_calculation = temp_calculation + d_code_length_chips; // % operator does not work as in Matlab with negative numbers temp_calculation = temp_calculation + d_code_length_chips; // % operator does not work as in Matlab with negative numbers
} }
d_initial_index[i] = static_cast<unsigned>( (static_cast<int>(temp_calculation)) % d_code_length_chips); d_initial_index[i] = static_cast<unsigned>((static_cast<int>(temp_calculation)) % d_code_length_chips);
temp_calculation = fmod(d_shifts_chips[i] - d_rem_code_phase_chips, temp_calculation = fmod(d_shifts_chips[i] - d_rem_code_phase_chips,
1.0); 1.0);
if (temp_calculation < 0) if (temp_calculation < 0)
{ {
temp_calculation = temp_calculation + 1.0; // fmod operator does not work as in Matlab with negative numbers temp_calculation = temp_calculation + 1.0; // fmod operator does not work as in Matlab with negative numbers
} }
d_initial_interp_counter[i] = static_cast<unsigned>( floor( MAX_CODE_RESAMPLER_COUNTER * temp_calculation)); d_initial_interp_counter[i] = static_cast<unsigned>(floor(MAX_CODE_RESAMPLER_COUNTER * temp_calculation));
} }
} }
@ -330,7 +322,7 @@ void fpga_multicorrelator_8sc::fpga_configure_code_parameters_in_fpga(void)
d_map_base[1 + i] = d_initial_index[i]; d_map_base[1 + i] = d_initial_index[i];
d_map_base[1 + d_n_correlators + i] = d_initial_interp_counter[i]; d_map_base[1 + d_n_correlators + i] = d_initial_interp_counter[i];
} }
d_map_base[8] = d_code_length_chips - 1; // number of samples - 1 d_map_base[8] = d_code_length_chips - 1; // number of samples - 1
} }
@ -338,30 +330,27 @@ void fpga_multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga(void)
{ {
float d_rem_carrier_phase_in_rad_temp; float d_rem_carrier_phase_in_rad_temp;
d_code_phase_step_chips_num = static_cast<unsigned>( roundf(MAX_CODE_RESAMPLER_COUNTER * d_code_phase_step_chips)); d_code_phase_step_chips_num = static_cast<unsigned>(roundf(MAX_CODE_RESAMPLER_COUNTER * d_code_phase_step_chips));
if (d_rem_carrier_phase_in_rad > M_PI) if (d_rem_carrier_phase_in_rad > M_PI)
{ {
d_rem_carrier_phase_in_rad_temp = -2 * M_PI d_rem_carrier_phase_in_rad_temp = -2 * M_PI + d_rem_carrier_phase_in_rad;
+ d_rem_carrier_phase_in_rad;
} }
else if (d_rem_carrier_phase_in_rad < -M_PI) else if (d_rem_carrier_phase_in_rad < -M_PI)
{ {
d_rem_carrier_phase_in_rad_temp = 2 * M_PI d_rem_carrier_phase_in_rad_temp = 2 * M_PI + d_rem_carrier_phase_in_rad;
+ d_rem_carrier_phase_in_rad;
} }
else else
{ {
d_rem_carrier_phase_in_rad_temp = d_rem_carrier_phase_in_rad; d_rem_carrier_phase_in_rad_temp = d_rem_carrier_phase_in_rad;
} }
d_rem_carr_phase_rad_int = static_cast<int>( roundf( d_rem_carr_phase_rad_int = static_cast<int>(roundf(
(fabs(d_rem_carrier_phase_in_rad_temp) / M_PI) (fabs(d_rem_carrier_phase_in_rad_temp) / M_PI) * pow(2, PHASE_CARR_NBITS_FRAC)));
* pow(2, PHASE_CARR_NBITS_FRAC)));
if (d_rem_carrier_phase_in_rad_temp < 0) if (d_rem_carrier_phase_in_rad_temp < 0)
{ {
d_rem_carr_phase_rad_int = -d_rem_carr_phase_rad_int; d_rem_carr_phase_rad_int = -d_rem_carr_phase_rad_int;
} }
d_phase_step_rad_int = static_cast<int>( roundf( d_phase_step_rad_int = static_cast<int>(roundf(
(fabs(d_phase_step_rad) / M_PI) * pow(2, PHASE_CARR_NBITS_FRAC))); // the FPGA accepts a range for the phase step between -pi and +pi (fabs(d_phase_step_rad) / M_PI) * pow(2, PHASE_CARR_NBITS_FRAC))); // the FPGA accepts a range for the phase step between -pi and +pi
if (d_phase_step_rad < 0) if (d_phase_step_rad < 0)
{ {
@ -383,9 +372,9 @@ void fpga_multicorrelator_8sc::fpga_launch_multicorrelator_fpga(void)
{ {
// enable interrupts // enable interrupts
int reenable = 1; int reenable = 1;
write(d_device_descriptor, reinterpret_cast<void*>(&reenable), sizeof(int)); write(d_device_descriptor, reinterpret_cast<void *>(&reenable), sizeof(int));
// writing 1 to reg 14 launches the tracking // writing 1 to reg 14 launches the tracking
d_map_base[14] = 1; d_map_base[14] = 1;
} }
@ -399,17 +388,17 @@ void fpga_multicorrelator_8sc::read_tracking_gps_results(void)
for (k = 0; k < d_n_correlators; k++) for (k = 0; k < d_n_correlators; k++)
{ {
readval_real = d_map_base[1 + k]; readval_real = d_map_base[1 + k];
if (readval_real >= 1048576) // 0x100000 (21 bits two's complement) if (readval_real >= 1048576) // 0x100000 (21 bits two's complement)
{ {
readval_real = -2097152 + readval_real; readval_real = -2097152 + readval_real;
} }
readval_imag = d_map_base[1 + d_n_correlators + k]; readval_imag = d_map_base[1 + d_n_correlators + k];
if (readval_imag >= 1048576) // 0x100000 (21 bits two's complement) if (readval_imag >= 1048576) // 0x100000 (21 bits two's complement)
{ {
readval_imag = -2097152 + readval_imag; readval_imag = -2097152 + readval_imag;
} }
d_corr_out[k] = gr_complex(readval_real,readval_imag); d_corr_out[k] = gr_complex(readval_real, readval_imag);
} }
} }
@ -417,17 +406,18 @@ void fpga_multicorrelator_8sc::read_tracking_gps_results(void)
void fpga_multicorrelator_8sc::unlock_channel(void) void fpga_multicorrelator_8sc::unlock_channel(void)
{ {
// unlock the channel to let the next samples go through // unlock the channel to let the next samples go through
d_map_base[12] = 1; // unlock the channel d_map_base[12] = 1; // unlock the channel
} }
void fpga_multicorrelator_8sc::close_device() void fpga_multicorrelator_8sc::close_device()
{ {
unsigned * aux = const_cast<unsigned*>(d_map_base); unsigned *aux = const_cast<unsigned *>(d_map_base);
if (munmap(static_cast<void*>(aux), PAGE_SIZE) == -1) if (munmap(static_cast<void *>(aux), PAGE_SIZE) == -1)
{ {
printf("Failed to unmap memory uio\n"); printf("Failed to unmap memory uio\n");
} }
/* else /* else
{ {
printf("memory uio unmapped\n"); printf("memory uio unmapped\n");
} */ } */
@ -438,19 +428,20 @@ void fpga_multicorrelator_8sc::close_device()
void fpga_multicorrelator_8sc::lock_channel(void) void fpga_multicorrelator_8sc::lock_channel(void)
{ {
// lock the channel for processing // lock the channel for processing
d_map_base[12] = 0; // lock the channel d_map_base[12] = 0; // lock the channel
} }
void fpga_multicorrelator_8sc::read_sample_counters(int *sample_counter, int *secondary_sample_counter, int *counter_corr_0_in, int *counter_corr_0_out) void fpga_multicorrelator_8sc::read_sample_counters(int *sample_counter, int *secondary_sample_counter, int *counter_corr_0_in, int *counter_corr_0_out)
{ {
*sample_counter = d_map_base[11]; *sample_counter = d_map_base[11];
*secondary_sample_counter = d_map_base[8]; *secondary_sample_counter = d_map_base[8];
*counter_corr_0_in = d_map_base[10]; *counter_corr_0_in = d_map_base[10];
*counter_corr_0_out = d_map_base[9]; *counter_corr_0_out = d_map_base[9];
} }
void fpga_multicorrelator_8sc::reset_multicorrelator(void) void fpga_multicorrelator_8sc::reset_multicorrelator(void)
{ {
d_map_base[14] = 2; // writing a 2 to d_map_base[14] resets the multicorrelator d_map_base[14] = 2; // writing a 2 to d_map_base[14] resets the multicorrelator
} }

46
src/algorithms/tracking/libs/fpga_multicorrelator_8sc.h
View File

@ -49,46 +49,46 @@ class fpga_multicorrelator_8sc
{ {
public: public:
fpga_multicorrelator_8sc(int n_correlators, std::string device_name, fpga_multicorrelator_8sc(int n_correlators, std::string device_name,
unsigned int device_base); unsigned int device_base);
~fpga_multicorrelator_8sc(); ~fpga_multicorrelator_8sc();
//bool set_output_vectors(gr_complex* corr_out); //bool set_output_vectors(gr_complex* corr_out);
void set_output_vectors(gr_complex* corr_out); void set_output_vectors(gr_complex *corr_out);
// bool set_local_code_and_taps( // bool set_local_code_and_taps(
// int code_length_chips, const int* local_code_in, // int code_length_chips, const int* local_code_in,
// float *shifts_chips, int PRN); // float *shifts_chips, int PRN);
//bool set_local_code_and_taps( //bool set_local_code_and_taps(
void set_local_code_and_taps( void set_local_code_and_taps(
int code_length_chips, int code_length_chips,
float *shifts_chips, int PRN); float *shifts_chips, int PRN);
//bool set_output_vectors(lv_16sc_t* corr_out); //bool set_output_vectors(lv_16sc_t* corr_out);
void update_local_code(float rem_code_phase_chips); void update_local_code(float rem_code_phase_chips);
//bool Carrier_wipeoff_multicorrelator_resampler( //bool Carrier_wipeoff_multicorrelator_resampler(
void Carrier_wipeoff_multicorrelator_resampler( void Carrier_wipeoff_multicorrelator_resampler(
float rem_carrier_phase_in_rad, float phase_step_rad, float rem_carrier_phase_in_rad, float phase_step_rad,
float rem_code_phase_chips, float code_phase_step_chips, float rem_code_phase_chips, float code_phase_step_chips,
int signal_length_samples);bool free(); int signal_length_samples);
bool free();
void set_channel(unsigned int channel); void set_channel(unsigned int channel);
void set_initial_sample(int samples_offset); void set_initial_sample(int samples_offset);
int read_sample_counter(); int read_sample_counter();
void lock_channel(void); void lock_channel(void);
void unlock_channel(void); void unlock_channel(void);
void read_sample_counters(int *sample_counter, int *secondary_sample_counter, int *counter_corr_0_in, int *counter_corr_0_out); // debug void read_sample_counters(int *sample_counter, int *secondary_sample_counter, int *counter_corr_0_in, int *counter_corr_0_out); // debug
private: private:
//const int *d_local_code_in; //const int *d_local_code_in;
gr_complex * d_corr_out; gr_complex *d_corr_out;
float *d_shifts_chips; float *d_shifts_chips;
int d_code_length_chips; int d_code_length_chips;
int d_n_correlators; int d_n_correlators;
// data related to the hardware module and the driver // data related to the hardware module and the driver
int d_device_descriptor; // driver descriptor int d_device_descriptor; // driver descriptor
volatile unsigned *d_map_base; // driver memory map volatile unsigned *d_map_base; // driver memory map
// configuration data received from the interface // configuration data received from the interface
unsigned int d_channel; // channel number unsigned int d_channel; // channel number
unsigned d_ncorrelators; // number of correlators unsigned d_ncorrelators; // number of correlators
unsigned d_correlator_length_samples; unsigned d_correlator_length_samples;
float d_rem_code_phase_chips; float d_rem_code_phase_chips;
float d_code_phase_step_chips; float d_code_phase_step_chips;
@ -107,8 +107,7 @@ private:
std::string d_device_name; std::string d_device_name;
unsigned int d_device_base; unsigned int d_device_base;
int *d_ca_codes;
int* d_ca_codes;
// private functions // private functions
unsigned fpga_acquisition_test_register(unsigned writeval); unsigned fpga_acquisition_test_register(unsigned writeval);
@ -119,11 +118,8 @@ private:
void fpga_configure_signal_parameters_in_fpga(void); void fpga_configure_signal_parameters_in_fpga(void);
void fpga_launch_multicorrelator_fpga(void); void fpga_launch_multicorrelator_fpga(void);
void read_tracking_gps_results(void); void read_tracking_gps_results(void);
void reset_multicorrelator(void); void reset_multicorrelator(void);
void close_device(void); void close_device(void);
// debug
//unsigned int first_time = 1;
}; };
#endif /* GNSS_SDR_FPGA_MULTICORRELATOR_H_ */ #endif /* GNSS_SDR_FPGA_MULTICORRELATOR_H_ */

206
src/tests/unit-tests/signal-processing-blocks/tracking/gps_l1_ca_dll_pll_tracking_test_fpga.cc
View File

@ -36,8 +36,8 @@
#include <iostream> #include <iostream>
#include <unistd.h> #include <unistd.h>
#include <armadillo> #include <armadillo>
#include <boost/thread.hpp>// to test the FPGA we have to create a simultaneous task to send the samples using the DMA and stop the test #include <boost/thread.hpp> // to test the FPGA we have to create a simultaneous task to send the samples using the DMA and stop the test
#include <stdio.h>// FPGA read input file #include <stdio.h> // FPGA read input file
#include <gnuradio/top_block.h> #include <gnuradio/top_block.h>
#include <gnuradio/blocks/file_source.h> #include <gnuradio/blocks/file_source.h>
#include <gnuradio/analog/sig_source_waveform.h> #include <gnuradio/analog/sig_source_waveform.h>
@ -61,17 +61,17 @@
#include "signal_generator_flags.h" #include "signal_generator_flags.h"
#include "interleaved_byte_to_complex_short.h" #include "interleaved_byte_to_complex_short.h"
#define DMA_TRACK_TRANSFER_SIZE 2046 // DMA transfer size for tracking #define DMA_TRACK_TRANSFER_SIZE 2046 // DMA transfer size for tracking
#define MIN_SAMPLES_REMAINING 20000 // number of remaining samples in the DMA that causes the CPU to stop the flowgraph (it has to be a bit alrger than 2x max packet size) #define MIN_SAMPLES_REMAINING 20000 // number of remaining samples in the DMA that causes the CPU to stop the flowgraph (it has to be a bit alrger than 2x max packet size)
#define FIVE_SECONDS 5000000 // five seconds in microseconds #define FIVE_SECONDS 5000000 // five seconds in microseconds
void send_tracking_gps_input_samples(FILE *rx_signal_file, void send_tracking_gps_input_samples(FILE *rx_signal_file,
int num_remaining_samples, gr::top_block_sptr top_block) int num_remaining_samples, gr::top_block_sptr top_block)
{ {
int num_samples_transferred = 0; // number of samples that have been transferred to the DMA so far int num_samples_transferred = 0; // number of samples that have been transferred to the DMA so far
static int flowgraph_stopped = 0; // flag to indicate if the flowgraph is stopped already static int flowgraph_stopped = 0; // flag to indicate if the flowgraph is stopped already
char *buffer_DMA; // temporary buffer to store the samples to be sent to the DMA char *buffer_DMA; // temporary buffer to store the samples to be sent to the DMA
int dma_descr; // DMA descriptor int dma_descr; // DMA descriptor
dma_descr = open("/dev/loop_tx", O_WRONLY); dma_descr = open("/dev/loop_tx", O_WRONLY);
if (dma_descr < 0) if (dma_descr < 0)
{ {
@ -79,7 +79,7 @@ void send_tracking_gps_input_samples(FILE *rx_signal_file,
exit(1); exit(1);
} }
buffer_DMA = (char *) malloc(DMA_TRACK_TRANSFER_SIZE); buffer_DMA = (char *)malloc(DMA_TRACK_TRANSFER_SIZE);
if (!buffer_DMA) if (!buffer_DMA)
{ {
fprintf(stderr, "Memory error!"); fprintf(stderr, "Memory error!");
@ -98,8 +98,7 @@ void send_tracking_gps_input_samples(FILE *rx_signal_file,
} }
if (num_remaining_samples > DMA_TRACK_TRANSFER_SIZE) if (num_remaining_samples > DMA_TRACK_TRANSFER_SIZE)
{ {
fread(buffer_DMA, DMA_TRACK_TRANSFER_SIZE, 1, rx_signal_file);
fread(buffer_DMA, DMA_TRACK_TRANSFER_SIZE, 1,rx_signal_file);
assert(DMA_TRACK_TRANSFER_SIZE == write(dma_descr, &buffer_DMA[0], DMA_TRACK_TRANSFER_SIZE)); assert(DMA_TRACK_TRANSFER_SIZE == write(dma_descr, &buffer_DMA[0], DMA_TRACK_TRANSFER_SIZE));
num_remaining_samples = num_remaining_samples - DMA_TRACK_TRANSFER_SIZE; num_remaining_samples = num_remaining_samples - DMA_TRACK_TRANSFER_SIZE;
@ -121,11 +120,11 @@ void send_tracking_gps_input_samples(FILE *rx_signal_file,
// thread that sends the samples to the FPGA // thread that sends the samples to the FPGA
void thread(gr::top_block_sptr top_block, const char * file_name) void thread(gr::top_block_sptr top_block, const char *file_name)
{ {
// file descriptor // file descriptor
FILE *rx_signal_file; // file descriptor FILE *rx_signal_file; // file descriptor
int file_length; // length of the file containing the received samples int file_length; // length of the file containing the received samples
rx_signal_file = fopen(file_name, "rb"); rx_signal_file = fopen(file_name, "rb");
if (!rx_signal_file) if (!rx_signal_file)
@ -137,7 +136,7 @@ void thread(gr::top_block_sptr top_block, const char * file_name)
file_length = ftell(rx_signal_file); file_length = ftell(rx_signal_file);
fseek(rx_signal_file, 0, SEEK_SET); fseek(rx_signal_file, 0, SEEK_SET);
usleep(FIVE_SECONDS); // wait for some time to give time to the other thread to program the device usleep(FIVE_SECONDS); // wait for some time to give time to the other thread to program the device
//send_tracking_gps_input_samples(dma_descr, rx_signal_file, file_length); //send_tracking_gps_input_samples(dma_descr, rx_signal_file, file_length);
send_tracking_gps_input_samples(rx_signal_file, file_length, top_block); send_tracking_gps_input_samples(rx_signal_file, file_length, top_block);
@ -163,14 +162,14 @@ private:
public: public:
int rx_message; int rx_message;
~GpsL1CADllPllTrackingTestFpga_msg_rx(); //!< Default destructor ~GpsL1CADllPllTrackingTestFpga_msg_rx(); //!< Default destructor
}; };
GpsL1CADllPllTrackingTestFpga_msg_rx_sptr GpsL1CADllPllTrackingTestFpga_msg_rx_make() GpsL1CADllPllTrackingTestFpga_msg_rx_sptr GpsL1CADllPllTrackingTestFpga_msg_rx_make()
{ {
return GpsL1CADllPllTrackingTestFpga_msg_rx_sptr( return GpsL1CADllPllTrackingTestFpga_msg_rx_sptr(
new GpsL1CADllPllTrackingTestFpga_msg_rx()); new GpsL1CADllPllTrackingTestFpga_msg_rx());
} }
@ -181,7 +180,7 @@ void GpsL1CADllPllTrackingTestFpga_msg_rx::msg_handler_events(pmt::pmt_t msg)
long int message = pmt::to_long(msg); long int message = pmt::to_long(msg);
rx_message = message; rx_message = message;
} }
catch (boost::bad_any_cast& e) catch (boost::bad_any_cast &e)
{ {
LOG(WARNING) << "msg_handler_telemetry Bad any cast!"; LOG(WARNING) << "msg_handler_telemetry Bad any cast!";
rx_message = 0; rx_message = 0;
@ -189,22 +188,22 @@ void GpsL1CADllPllTrackingTestFpga_msg_rx::msg_handler_events(pmt::pmt_t msg)
} }
GpsL1CADllPllTrackingTestFpga_msg_rx::GpsL1CADllPllTrackingTestFpga_msg_rx() : GpsL1CADllPllTrackingTestFpga_msg_rx::GpsL1CADllPllTrackingTestFpga_msg_rx() : gr::block("GpsL1CADllPllTrackingTestFpga_msg_rx",
gr::block("GpsL1CADllPllTrackingTestFpga_msg_rx", gr::io_signature::make(0, 0, 0),
gr::io_signature::make(0, 0, 0), gr::io_signature::make(0, 0, 0))
gr::io_signature::make(0, 0, 0))
{ {
this->message_port_register_in(pmt::mp("events")); this->message_port_register_in(pmt::mp("events"));
this->set_msg_handler(pmt::mp("events"), this->set_msg_handler(pmt::mp("events"),
boost::bind( boost::bind(
&GpsL1CADllPllTrackingTestFpga_msg_rx::msg_handler_events, &GpsL1CADllPllTrackingTestFpga_msg_rx::msg_handler_events,
this, _1)); this, _1));
rx_message = 0; rx_message = 0;
} }
GpsL1CADllPllTrackingTestFpga_msg_rx::~GpsL1CADllPllTrackingTestFpga_msg_rx() GpsL1CADllPllTrackingTestFpga_msg_rx::~GpsL1CADllPllTrackingTestFpga_msg_rx()
{} {
}
// ########################################################### // ###########################################################
@ -226,12 +225,12 @@ public:
int configure_generator(); int configure_generator();
int generate_signal(); int generate_signal();
void check_results_doppler(arma::vec & true_time_s, arma::vec & true_value, void check_results_doppler(arma::vec &true_time_s, arma::vec &true_value,
arma::vec & meas_time_s, arma::vec & meas_value); arma::vec &meas_time_s, arma::vec &meas_value);
void check_results_acc_carrier_phase(arma::vec & true_time_s, void check_results_acc_carrier_phase(arma::vec &true_time_s,
arma::vec & true_value, arma::vec & meas_time_s, arma::vec & meas_value); arma::vec &true_value, arma::vec &meas_time_s, arma::vec &meas_value);
void check_results_codephase(arma::vec & true_time_s, arma::vec & true_value, void check_results_codephase(arma::vec &true_time_s, arma::vec &true_value,
arma::vec & meas_time_s, arma::vec & meas_value); arma::vec &meas_time_s, arma::vec &meas_value);
GpsL1CADllPllTrackingTestFpga() GpsL1CADllPllTrackingTestFpga()
{ {
@ -263,16 +262,15 @@ int GpsL1CADllPllTrackingTestFpga::configure_generator()
p1 = std::string("-rinex_nav_file=") + FLAGS_rinex_nav_file; p1 = std::string("-rinex_nav_file=") + FLAGS_rinex_nav_file;
if (FLAGS_dynamic_position.empty()) if (FLAGS_dynamic_position.empty())
{ {
p2 = std::string("-static_position=") + FLAGS_static_position p2 = std::string("-static_position=") + FLAGS_static_position + std::string(",") + std::to_string(FLAGS_duration * 10);
+ std::string(",") + std::to_string(FLAGS_duration * 10);
} }
else else
{ {
p2 = std::string("-obs_pos_file=") + std::string(FLAGS_dynamic_position); p2 = std::string("-obs_pos_file=") + std::string(FLAGS_dynamic_position);
} }
p3 = std::string("-rinex_obs_file=") + FLAGS_filename_rinex_obs; // RINEX 2.10 observation file output p3 = std::string("-rinex_obs_file=") + FLAGS_filename_rinex_obs; // RINEX 2.10 observation file output
p4 = std::string("-sig_out_file=") + FLAGS_filename_raw_data; // Baseband signal output file. Will be stored in int8_t IQ multiplexed samples p4 = std::string("-sig_out_file=") + FLAGS_filename_raw_data; // Baseband signal output file. Will be stored in int8_t IQ multiplexed samples
p5 = std::string("-sampling_freq=") + std::to_string(baseband_sampling_freq); //Baseband sampling frequency [MSps] p5 = std::string("-sampling_freq=") + std::to_string(baseband_sampling_freq); //Baseband sampling frequency [MSps]
return 0; return 0;
} }
@ -281,8 +279,8 @@ int GpsL1CADllPllTrackingTestFpga::generate_signal()
{ {
int child_status; int child_status;
char * const parmList[] = { &generator_binary[0], &generator_binary[0], &p1[0], &p2[0], &p3[0], char *const parmList[] = {&generator_binary[0], &generator_binary[0], &p1[0], &p2[0], &p3[0],
&p4[0], &p5[0], NULL }; &p4[0], &p5[0], NULL};
int pid; int pid;
if ((pid = fork()) == -1) if ((pid = fork()) == -1)
@ -310,12 +308,12 @@ void GpsL1CADllPllTrackingTestFpga::configure_receiver()
gnss_synchro.PRN = FLAGS_test_satellite_PRN; gnss_synchro.PRN = FLAGS_test_satellite_PRN;
config->set_property("GNSS-SDR.internal_fs_sps", config->set_property("GNSS-SDR.internal_fs_sps",
std::to_string(baseband_sampling_freq)); std::to_string(baseband_sampling_freq));
// Set Tracking // Set Tracking
//config->set_property("Tracking_1C.implementation", //config->set_property("Tracking_1C.implementation",
// "GPS_L1_CA_DLL_PLL_C_Aid_Tracking_Fpga"); // "GPS_L1_CA_DLL_PLL_C_Aid_Tracking_Fpga");
config->set_property("Tracking_1C.implementation", config->set_property("Tracking_1C.implementation",
"GPS_L1_CA_DLL_PLL_Tracking_Fpga"); "GPS_L1_CA_DLL_PLL_Tracking_Fpga");
config->set_property("Tracking_1C.item_type", "cshort"); config->set_property("Tracking_1C.item_type", "cshort");
config->set_property("Tracking_1C.if", "0"); config->set_property("Tracking_1C.if", "0");
config->set_property("Tracking_1C.dump", "true"); config->set_property("Tracking_1C.dump", "true");
@ -328,8 +326,8 @@ void GpsL1CADllPllTrackingTestFpga::configure_receiver()
} }
void GpsL1CADllPllTrackingTestFpga::check_results_doppler(arma::vec & true_time_s, void GpsL1CADllPllTrackingTestFpga::check_results_doppler(arma::vec &true_time_s,
arma::vec & true_value, arma::vec & meas_time_s, arma::vec & meas_value) arma::vec &true_value, arma::vec &meas_time_s, arma::vec &meas_value)
{ {
//1. True value interpolation to match the measurement times //1. True value interpolation to match the measurement times
arma::vec true_value_interp; arma::vec true_value_interp;
@ -362,13 +360,13 @@ void GpsL1CADllPllTrackingTestFpga::check_results_doppler(arma::vec & true_time_
<< ", mean=" << error_mean << ", stdev=" << sqrt(error_var) << ", mean=" << error_mean << ", stdev=" << sqrt(error_var)
<< " (max,min)=" << max_error << "," << min_error << " [Hz]" << " (max,min)=" << max_error << "," << min_error << " [Hz]"
<< std::endl; << std::endl;
std::cout.precision (ss); std::cout.precision(ss);
} }
void GpsL1CADllPllTrackingTestFpga::check_results_acc_carrier_phase( void GpsL1CADllPllTrackingTestFpga::check_results_acc_carrier_phase(
arma::vec & true_time_s, arma::vec & true_value, arma::vec & meas_time_s, arma::vec &true_time_s, arma::vec &true_value, arma::vec &meas_time_s,
arma::vec & meas_value) arma::vec &meas_value)
{ {
//1. True value interpolation to match the measurement times //1. True value interpolation to match the measurement times
arma::vec true_value_interp; arma::vec true_value_interp;
@ -401,13 +399,13 @@ void GpsL1CADllPllTrackingTestFpga::check_results_acc_carrier_phase(
<< ", mean=" << error_mean << ", stdev=" << sqrt(error_var) << ", mean=" << error_mean << ", stdev=" << sqrt(error_var)
<< " (max,min)=" << max_error << "," << min_error << " [Hz]" << " (max,min)=" << max_error << "," << min_error << " [Hz]"
<< std::endl; << std::endl;
std::cout.precision (ss); std::cout.precision(ss);
} }
void GpsL1CADllPllTrackingTestFpga::check_results_codephase( void GpsL1CADllPllTrackingTestFpga::check_results_codephase(
arma::vec & true_time_s, arma::vec & true_value, arma::vec & meas_time_s, arma::vec &true_time_s, arma::vec &true_value, arma::vec &meas_time_s,
arma::vec & meas_value) arma::vec &meas_value)
{ {
//1. True value interpolation to match the measurement times //1. True value interpolation to match the measurement times
arma::vec true_value_interp; arma::vec true_value_interp;
@ -439,7 +437,7 @@ void GpsL1CADllPllTrackingTestFpga::check_results_codephase(
<< ", mean=" << error_mean << ", stdev=" << sqrt(error_var) << ", mean=" << error_mean << ", stdev=" << sqrt(error_var)
<< " (max,min)=" << max_error << "," << min_error << " [Chips]" << " (max,min)=" << max_error << "," << min_error << " [Chips]"
<< std::endl; << std::endl;
std::cout.precision (ss); std::cout.precision(ss);
} }
@ -463,27 +461,29 @@ TEST_F(GpsL1CADllPllTrackingTestFpga, ValidationOfResultsFpga)
true_obs_file.append(std::to_string(test_satellite_PRN)); true_obs_file.append(std::to_string(test_satellite_PRN));
true_obs_file.append(".dat"); true_obs_file.append(".dat");
ASSERT_NO_THROW( ASSERT_NO_THROW(
{
if (true_obs_data.open_obs_file(true_obs_file) == false)
{ {
if (true_obs_data.open_obs_file(true_obs_file) == false) throw std::exception();
{ };
throw std::exception(); })
}; << "Failure opening true observables file";
}) << "Failure opening true observables file";
top_block = gr::make_top_block("Tracking test"); top_block = gr::make_top_block("Tracking test");
//std::shared_ptr<GpsL1CaDllPllCAidTrackingFpga> tracking = std::make_shared<GpsL1CaDllPllCAidTrackingFpga> (config.get(), "Tracking_1C", 1, 1); //std::shared_ptr<GpsL1CaDllPllCAidTrackingFpga> tracking = std::make_shared<GpsL1CaDllPllCAidTrackingFpga> (config.get(), "Tracking_1C", 1, 1);
std::shared_ptr<GpsL1CaDllPllTrackingFpga> tracking = std::make_shared<GpsL1CaDllPllTrackingFpga> (config.get(), "Tracking_1C", 1, 1); std::shared_ptr<GpsL1CaDllPllTrackingFpga> tracking = std::make_shared<GpsL1CaDllPllTrackingFpga>(config.get(), "Tracking_1C", 1, 1);
boost::shared_ptr<GpsL1CADllPllTrackingTestFpga_msg_rx> msg_rx = GpsL1CADllPllTrackingTestFpga_msg_rx_make(); boost::shared_ptr<GpsL1CADllPllTrackingTestFpga_msg_rx> msg_rx = GpsL1CADllPllTrackingTestFpga_msg_rx_make();
// load acquisition data based on the first epoch of the true observations // load acquisition data based on the first epoch of the true observations
ASSERT_NO_THROW( ASSERT_NO_THROW(
{
if (true_obs_data.read_binary_obs() == false)
{ {
if (true_obs_data.read_binary_obs() == false) throw std::exception();
{ };
throw std::exception(); })
}; << "Failure reading true observables file";
}) << "Failure reading true observables file";
//restart the epoch counter //restart the epoch counter
true_obs_data.restart(); true_obs_data.restart();
@ -492,52 +492,54 @@ TEST_F(GpsL1CADllPllTrackingTestFpga, ValidationOfResultsFpga)
<< " Initial code delay [Chips]=" << true_obs_data.prn_delay_chips << " Initial code delay [Chips]=" << true_obs_data.prn_delay_chips
<< std::endl; << std::endl;
gnss_synchro.Acq_delay_samples = (GPS_L1_CA_CODE_LENGTH_CHIPS gnss_synchro.Acq_delay_samples = (GPS_L1_CA_CODE_LENGTH_CHIPS - true_obs_data.prn_delay_chips / GPS_L1_CA_CODE_LENGTH_CHIPS) * baseband_sampling_freq * GPS_L1_CA_CODE_PERIOD;
- true_obs_data.prn_delay_chips / GPS_L1_CA_CODE_LENGTH_CHIPS)
* baseband_sampling_freq * GPS_L1_CA_CODE_PERIOD;
gnss_synchro.Acq_doppler_hz = true_obs_data.doppler_l1_hz; gnss_synchro.Acq_doppler_hz = true_obs_data.doppler_l1_hz;
gnss_synchro.Acq_samplestamp_samples = 0; gnss_synchro.Acq_samplestamp_samples = 0;
ASSERT_NO_THROW( ASSERT_NO_THROW(
{ {
tracking->set_channel(gnss_synchro.Channel_ID); tracking->set_channel(gnss_synchro.Channel_ID);
}) << "Failure setting channel."; })
<< "Failure setting channel.";
ASSERT_NO_THROW( ASSERT_NO_THROW(
{ {
tracking->set_gnss_synchro(&gnss_synchro); tracking->set_gnss_synchro(&gnss_synchro);
}) << "Failure setting gnss_synchro."; })
<< "Failure setting gnss_synchro.";
ASSERT_NO_THROW( ASSERT_NO_THROW(
{ {
tracking->connect(top_block); tracking->connect(top_block);
}) << "Failure connecting tracking to the top_block."; })
<< "Failure connecting tracking to the top_block.";
ASSERT_NO_THROW( ASSERT_NO_THROW(
{ {
gr::blocks::null_sink::sptr sink = gr::blocks::null_sink::make(sizeof(Gnss_Synchro)); gr::blocks::null_sink::sptr sink = gr::blocks::null_sink::make(sizeof(Gnss_Synchro));
top_block->connect(tracking->get_right_block(), 0, sink, 0); top_block->connect(tracking->get_right_block(), 0, sink, 0);
top_block->msg_connect(tracking->get_right_block(), pmt::mp("events"), msg_rx, pmt::mp("events")); top_block->msg_connect(tracking->get_right_block(), pmt::mp("events"), msg_rx, pmt::mp("events"));
}) << "Failure connecting the blocks of tracking test."; })
<< "Failure connecting the blocks of tracking test.";
tracking->start_tracking(); tracking->start_tracking();
// assemble again the file name in a null terminated string (not available by default in the main program flow) // assemble again the file name in a null terminated string (not available by default in the main program flow)
std::string file = "./" + filename_raw_data; std::string file = "./" + filename_raw_data;
const char * file_name = file.c_str(); const char *file_name = file.c_str();
// start thread that sends the DMA samples to the FPGA // start thread that sends the DMA samples to the FPGA
boost::thread t boost::thread t{thread, top_block, file_name};
{ thread, top_block, file_name };
EXPECT_NO_THROW( EXPECT_NO_THROW(
{ {
start = std::chrono::system_clock::now(); start = std::chrono::system_clock::now();
top_block->run(); // Start threads and wait top_block->run(); // Start threads and wait
tracking->reset();// unlock the channel tracking->reset(); // unlock the channel
end = std::chrono::system_clock::now(); end = std::chrono::system_clock::now();
elapsed_seconds = end - start; elapsed_seconds = end - start;
}) << "Failure running the top_block."; })
<< "Failure running the top_block.";
// wait until child thread terminates // wait until child thread terminates
t.join(); t.join();
@ -567,12 +569,13 @@ TEST_F(GpsL1CADllPllTrackingTestFpga, ValidationOfResultsFpga)
//load the measured values //load the measured values
tracking_dump_reader trk_dump; tracking_dump_reader trk_dump;
ASSERT_NO_THROW( ASSERT_NO_THROW(
{
if (trk_dump.open_obs_file(std::string("./tracking_ch_0.dat")) == false)
{ {
if (trk_dump.open_obs_file(std::string("./tracking_ch_0.dat")) == false) throw std::exception();
{ };
throw std::exception(); })
}; << "Failure opening tracking dump file";
}) << "Failure opening tracking dump file";
nepoch = trk_dump.num_epochs(); nepoch = trk_dump.num_epochs();
std::cout << "Measured observation epochs=" << nepoch << std::endl; std::cout << "Measured observation epochs=" << nepoch << std::endl;
@ -585,14 +588,11 @@ TEST_F(GpsL1CADllPllTrackingTestFpga, ValidationOfResultsFpga)
epoch_counter = 0; epoch_counter = 0;
while (trk_dump.read_binary_obs()) while (trk_dump.read_binary_obs())
{ {
trk_timestamp_s(epoch_counter) = static_cast<double>(trk_dump.PRN_start_sample_count) trk_timestamp_s(epoch_counter) = static_cast<double>(trk_dump.PRN_start_sample_count) / static_cast<double>(baseband_sampling_freq);
/ static_cast<double>(baseband_sampling_freq);
trk_acc_carrier_phase_cycles(epoch_counter) = trk_dump.acc_carrier_phase_rad / GPS_TWO_PI; trk_acc_carrier_phase_cycles(epoch_counter) = trk_dump.acc_carrier_phase_rad / GPS_TWO_PI;
trk_Doppler_Hz(epoch_counter) = trk_dump.carrier_doppler_hz; trk_Doppler_Hz(epoch_counter) = trk_dump.carrier_doppler_hz;
double delay_chips = GPS_L1_CA_CODE_LENGTH_CHIPS - GPS_L1_CA_CODE_LENGTH_CHIPS double delay_chips = GPS_L1_CA_CODE_LENGTH_CHIPS - GPS_L1_CA_CODE_LENGTH_CHIPS * (fmod((static_cast<double>(trk_dump.PRN_start_sample_count) + trk_dump.aux1) / static_cast<double>(baseband_sampling_freq), 1.0e-3) / 1.0e-3);
* (fmod( (static_cast<double>(trk_dump.PRN_start_sample_count) + trk_dump.aux1)
/ static_cast<double>(baseband_sampling_freq), 1.0e-3) / 1.0e-3);
trk_prn_delay_chips(epoch_counter) = delay_chips; trk_prn_delay_chips(epoch_counter) = delay_chips;
epoch_counter++; epoch_counter++;
@ -600,7 +600,7 @@ TEST_F(GpsL1CADllPllTrackingTestFpga, ValidationOfResultsFpga)
//Align initial measurements and cut the tracking pull-in transitory //Align initial measurements and cut the tracking pull-in transitory
double pull_in_offset_s = 1.0; double pull_in_offset_s = 1.0;
arma::uvec initial_meas_point = arma::find( trk_timestamp_s >= (true_timestamp_s(0) + pull_in_offset_s), 1, "first"); arma::uvec initial_meas_point = arma::find(trk_timestamp_s >= (true_timestamp_s(0) + pull_in_offset_s), 1, "first");
trk_timestamp_s = trk_timestamp_s.subvec(initial_meas_point(0), trk_timestamp_s.size() - 1); trk_timestamp_s = trk_timestamp_s.subvec(initial_meas_point(0), trk_timestamp_s.size() - 1);
trk_acc_carrier_phase_cycles = trk_acc_carrier_phase_cycles.subvec(initial_meas_point(0), trk_acc_carrier_phase_cycles.size() - 1); trk_acc_carrier_phase_cycles = trk_acc_carrier_phase_cycles.subvec(initial_meas_point(0), trk_acc_carrier_phase_cycles.size() - 1);
@ -610,8 +610,8 @@ TEST_F(GpsL1CADllPllTrackingTestFpga, ValidationOfResultsFpga)
check_results_doppler(true_timestamp_s, true_Doppler_Hz, trk_timestamp_s, trk_Doppler_Hz); check_results_doppler(true_timestamp_s, true_Doppler_Hz, trk_timestamp_s, trk_Doppler_Hz);
check_results_codephase(true_timestamp_s, true_prn_delay_chips, trk_timestamp_s, trk_prn_delay_chips); check_results_codephase(true_timestamp_s, true_prn_delay_chips, trk_timestamp_s, trk_prn_delay_chips);
check_results_acc_carrier_phase(true_timestamp_s, check_results_acc_carrier_phase(true_timestamp_s,
true_acc_carrier_phase_cycles, trk_timestamp_s, true_acc_carrier_phase_cycles, trk_timestamp_s,
trk_acc_carrier_phase_cycles); trk_acc_carrier_phase_cycles);
std::cout << "Signal tracking completed in " << elapsed_seconds.count() * 1e6 << " microseconds" << std::endl; std::cout << "Signal tracking completed in " << elapsed_seconds.count() * 1e6 << " microseconds" << std::endl;
} }