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This commit is contained in:
Carles Fernandez
2018-04-30 19:53:20 +02:00
parent 21a6d8ac61
commit bd81330201
7 changed files with 281 additions and 295 deletions
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146
src/algorithms/libs/CMakeLists.txt
View File

@@ -19,81 +19,81 @@
add_subdirectory(rtklib)
if(ENABLE_FPGA)
set(GNSS_SPLIBS_SOURCES
gps_l2c_signal.cc
gps_l5_signal.cc
galileo_e1_signal_processing.cc
gnss_sdr_valve.cc
gnss_sdr_sample_counter.cc
gnss_sdr_time_counter.cc
gnss_signal_processing.cc
gps_sdr_signal_processing.cc
glonass_l1_signal_processing.cc
glonass_l2_signal_processing.cc
pass_through.cc
galileo_e5_signal_processing.cc
complex_byte_to_float_x2.cc
byte_x2_to_complex_byte.cc
cshort_to_float_x2.cc
short_x2_to_cshort.cc
complex_float_to_complex_byte.cc
conjugate_cc.cc
conjugate_sc.cc
conjugate_ic.cc
set(GNSS_SPLIBS_SOURCES
gps_l2c_signal.cc
gps_l5_signal.cc
galileo_e1_signal_processing.cc
gnss_sdr_valve.cc
gnss_sdr_sample_counter.cc
gnss_sdr_time_counter.cc
gnss_signal_processing.cc
gps_sdr_signal_processing.cc
glonass_l1_signal_processing.cc
glonass_l2_signal_processing.cc
pass_through.cc
galileo_e5_signal_processing.cc
complex_byte_to_float_x2.cc
byte_x2_to_complex_byte.cc
cshort_to_float_x2.cc
short_x2_to_cshort.cc
complex_float_to_complex_byte.cc
conjugate_cc.cc
conjugate_sc.cc
conjugate_ic.cc
)
else(ENABLE_FPGA)
set(GNSS_SPLIBS_SOURCES
gps_l2c_signal.cc
gps_l5_signal.cc
galileo_e1_signal_processing.cc
gnss_sdr_valve.cc
gnss_sdr_sample_counter.cc
gnss_signal_processing.cc
gps_sdr_signal_processing.cc
glonass_l1_signal_processing.cc
glonass_l2_signal_processing.cc
pass_through.cc
galileo_e5_signal_processing.cc
complex_byte_to_float_x2.cc
byte_x2_to_complex_byte.cc
cshort_to_float_x2.cc
short_x2_to_cshort.cc
complex_float_to_complex_byte.cc
conjugate_cc.cc
conjugate_sc.cc
conjugate_ic.cc
)
gps_l2c_signal.cc
gps_l5_signal.cc
galileo_e1_signal_processing.cc
gnss_sdr_valve.cc
gnss_sdr_sample_counter.cc
gnss_signal_processing.cc
gps_sdr_signal_processing.cc
glonass_l1_signal_processing.cc
glonass_l2_signal_processing.cc
pass_through.cc
galileo_e5_signal_processing.cc
complex_byte_to_float_x2.cc
byte_x2_to_complex_byte.cc
cshort_to_float_x2.cc
short_x2_to_cshort.cc
complex_float_to_complex_byte.cc
conjugate_cc.cc
conjugate_sc.cc
conjugate_ic.cc
)
endif(ENABLE_FPGA)
if(OPENCL_FOUND)
set(GNSS_SPLIBS_SOURCES ${GNSS_SPLIBS_SOURCES}
opencl/fft_execute.cc # Needs OpenCL
opencl/fft_setup.cc # Needs OpenCL
opencl/fft_kernelstring.cc # Needs OpenCL
)
set(GNSS_SPLIBS_SOURCES ${GNSS_SPLIBS_SOURCES}
opencl/fft_execute.cc # Needs OpenCL
opencl/fft_setup.cc # Needs OpenCL
opencl/fft_kernelstring.cc # Needs OpenCL
)
endif(OPENCL_FOUND)
include_directories(
${CMAKE_CURRENT_SOURCE_DIR}
${CMAKE_SOURCE_DIR}/src/core/system_parameters
${CMAKE_SOURCE_DIR}/src/core/receiver
${CMAKE_SOURCE_DIR}/src/core/interfaces
${Boost_INCLUDE_DIRS}
${GLOG_INCLUDE_DIRS}
${GFlags_INCLUDE_DIRS}
${GNURADIO_RUNTIME_INCLUDE_DIRS}
${GNURADIO_BLOCKS_INCLUDE_DIRS}
${VOLK_INCLUDE_DIRS}
${VOLK_GNSSSDR_INCLUDE_DIRS}
${CMAKE_CURRENT_SOURCE_DIR}
${CMAKE_SOURCE_DIR}/src/core/system_parameters
${CMAKE_SOURCE_DIR}/src/core/receiver
${CMAKE_SOURCE_DIR}/src/core/interfaces
${Boost_INCLUDE_DIRS}
${GLOG_INCLUDE_DIRS}
${GFlags_INCLUDE_DIRS}
${GNURADIO_RUNTIME_INCLUDE_DIRS}
${GNURADIO_BLOCKS_INCLUDE_DIRS}
${VOLK_INCLUDE_DIRS}
${VOLK_GNSSSDR_INCLUDE_DIRS}
)
if(OPENCL_FOUND)
include_directories( ${OPENCL_INCLUDE_DIRS} )
if(OS_IS_MACOSX)
set(OPT_LIBRARIES ${OPT_LIBRARIES} "-framework OpenCL")
else(OS_IS_MACOSX)
set(OPT_LIBRARIES ${OPT_LIBRARIES} ${OPENCL_LIBRARIES})
endif(OS_IS_MACOSX)
include_directories( ${OPENCL_INCLUDE_DIRS} )
if(OS_IS_MACOSX)
set(OPT_LIBRARIES ${OPT_LIBRARIES} "-framework OpenCL")
else(OS_IS_MACOSX)
set(OPT_LIBRARIES ${OPT_LIBRARIES} ${OPENCL_LIBRARIES})
endif(OS_IS_MACOSX)
endif(OPENCL_FOUND)
add_definitions(-DGNSSSDR_INSTALL_DIR="${CMAKE_INSTALL_PREFIX}")
@@ -105,18 +105,18 @@ add_library(gnss_sp_libs ${GNSS_SPLIBS_SOURCES} ${GNSS_SPLIBS_HEADERS})
source_group(Headers FILES ${GNSS_SPLIBS_HEADERS})
target_link_libraries(gnss_sp_libs ${GNURADIO_RUNTIME_LIBRARIES}
${VOLK_LIBRARIES} ${ORC_LIBRARIES}
${VOLK_GNSSSDR_LIBRARIES} ${ORC_LIBRARIES}
${GFlags_LIBS}
${GNURADIO_BLOCKS_LIBRARIES}
${GNURADIO_FFT_LIBRARIES}
${GNURADIO_FILTER_LIBRARIES}
${OPT_LIBRARIES}
gnss_rx
${VOLK_LIBRARIES} ${ORC_LIBRARIES}
${VOLK_GNSSSDR_LIBRARIES} ${ORC_LIBRARIES}
${GFlags_LIBS}
${GNURADIO_BLOCKS_LIBRARIES}
${GNURADIO_FFT_LIBRARIES}
${GNURADIO_FILTER_LIBRARIES}
${OPT_LIBRARIES}
gnss_rx
)
if(NOT VOLK_GNSSSDR_FOUND)
add_dependencies(gnss_sp_libs volk_gnsssdr_module)
add_dependencies(gnss_sp_libs volk_gnsssdr_module)
endif(NOT VOLK_GNSSSDR_FOUND)
if(${GFLAGS_GREATER_20})
@@ -125,4 +125,4 @@ endif(${GFLAGS_GREATER_20})
add_library(gnss_sdr_flags gnss_sdr_flags.cc gnss_sdr_flags.h)
source_group(Headers FILES gnss_sdr_flags.h)
target_link_libraries(gnss_sdr_flags ${GFlags_LIBS})
target_link_libraries(gnss_sdr_flags ${GFlags_LIBS})

7
src/algorithms/signal_source/libs/CMakeLists.txt
View File

@@ -28,7 +28,7 @@ if(ENABLE_PLUTOSDR OR ENABLE_FMCOMMS2)
endif(NOT IIO_FOUND)
set(OPT_LIBRARIES ${OPT_LIBRARIES} ${IIO_LIBRARIES})
set(OPT_DRIVER_INCLUDE_DIRS ${OPT_DRIVER_INCLUDE_DIRS} ${IIO_INCLUDE_DIRS})
endif(ENABLE_PLUTOSDR OR ENABLE_FMCOMMS2)
if(ENABLE_FMCOMMS2 OR ENABLE_AD9361)
@@ -43,14 +43,14 @@ if(ENABLE_FMCOMMS2 OR ENABLE_AD9361)
endif(NOT LIBIIO_FOUND)
set(OPT_LIBRARIES ${OPT_LIBRARIES} ${LIBIIO_LIBRARIES})
set(OPT_DRIVER_INCLUDE_DIRS ${OPT_DRIVER_INCLUDE_DIRS} ${LIBIIO_INCLUDE_DIRS})
###############################################
# FMCOMMS2 based SDR Hardware
###############################################
if(IIO_FOUND)
set(OPT_SIGNAL_SOURCE_LIB_SOURCES ad9361_manager.cc)
endif(IIO_FOUND)
endif(ENABLE_FMCOMMS2 OR ENABLE_AD9361)
if(ENABLE_AD9361)
@@ -78,4 +78,3 @@ add_library(signal_source_lib ${SIGNAL_SOURCE_LIB_SOURCES} ${SIGNAL_SOURCE_LIB_H
source_group(Headers FILES ${SIGNAL_SOURCE_LIB_HEADERS})
target_link_libraries(signal_source_lib ${OPT_LIBRARIES})

17
src/algorithms/signal_source/libs/fpga_switch.cc
View File

@@ -35,7 +35,6 @@
*/
#include "fpga_switch.h"
#include <cmath>
// FPGA stuff
@@ -76,9 +75,9 @@ fpga_switch::fpga_switch(std::string device_name)
printf("switch memory successfully mapped\n");
}
d_map_base = reinterpret_cast<volatile unsigned *>(mmap(NULL, PAGE_SIZE,
PROT_READ | PROT_WRITE, MAP_SHARED, d_device_descriptor, 0));
PROT_READ | PROT_WRITE, MAP_SHARED, d_device_descriptor, 0));
if (d_map_base == reinterpret_cast<void*>(-1))
if (d_map_base == reinterpret_cast<void *>(-1))
{
LOG(WARNING) << "Cannot map the FPGA switch module into tracking memory";
printf("could not map switch memory\n");
@@ -100,18 +99,21 @@ fpga_switch::fpga_switch(std::string device_name)
DLOG(INFO) << "Switch FPGA class created";
}
fpga_switch::~fpga_switch()
{
close_device();
}
void fpga_switch::set_switch_position(int switch_position)
{
d_map_base[0] = switch_position;
}
unsigned fpga_switch::fpga_switch_test_register(
unsigned writeval)
unsigned writeval)
{
unsigned readval;
// write value to test register
@@ -122,15 +124,14 @@ unsigned fpga_switch::fpga_switch_test_register(
return readval;
}
void fpga_switch::close_device()
{
unsigned * aux = const_cast<unsigned*>(d_map_base);
if (munmap(static_cast<void*>(aux), PAGE_SIZE) == -1)
unsigned *aux = const_cast<unsigned *>(d_map_base);
if (munmap(static_cast<void *>(aux), PAGE_SIZE) == -1)
{
printf("Failed to unmap memory uio\n");
}
close(d_device_descriptor);
}

9
src/algorithms/signal_source/libs/fpga_switch.h
View File

@@ -47,15 +47,14 @@ public:
fpga_switch(std::string device_name);
~fpga_switch();
void set_switch_position(int switch_position);
private:
int d_device_descriptor; // driver descriptor
volatile unsigned *d_map_base; // driver memory map
int d_device_descriptor; // driver descriptor
volatile unsigned *d_map_base; // driver memory map
// private functions
unsigned fpga_switch_test_register(unsigned writeval);
void close_device(void);
void close_device(void);
};
#endif /* GNSS_SDR_FPGA_SWITCH_H_ */

143
src/algorithms/tracking/libs/fpga_multicorrelator_8sc.cc
View File

@@ -35,9 +35,7 @@
*/
#include "fpga_multicorrelator_8sc.h"
#include <cmath>
// FPGA stuff
#include <new>
@@ -65,7 +63,7 @@
#include <string>
// constants
#include "GPS_L1_CA.h"
#include "GPS_L1_CA.h"
#include "gps_sdr_signal_processing.h"
@@ -75,7 +73,7 @@
#define CODE_RESAMPLER_NUM_BITS_PRECISION 20
#define CODE_PHASE_STEP_CHIPS_NUM_NBITS CODE_RESAMPLER_NUM_BITS_PRECISION
#define pwrtwo(x) (1 << (x))
#define MAX_CODE_RESAMPLER_COUNTER pwrtwo(CODE_PHASE_STEP_CHIPS_NUM_NBITS) // 2^CODE_PHASE_STEP_CHIPS_NUM_NBITS
#define MAX_CODE_RESAMPLER_COUNTER pwrtwo(CODE_PHASE_STEP_CHIPS_NUM_NBITS) // 2^CODE_PHASE_STEP_CHIPS_NUM_NBITS
#define PHASE_CARR_NBITS 32
#define PHASE_CARR_NBITS_INT 1
#define PHASE_CARR_NBITS_FRAC PHASE_CARR_NBITS - PHASE_CARR_NBITS_INT
@@ -86,7 +84,7 @@
int fpga_multicorrelator_8sc::read_sample_counter()
{
return d_map_base[7];
return d_map_base[7];
}
void fpga_multicorrelator_8sc::set_initial_sample(int samples_offset)
@@ -94,17 +92,16 @@ void fpga_multicorrelator_8sc::set_initial_sample(int samples_offset)
d_initial_sample_counter = samples_offset;
d_map_base[13] = d_initial_sample_counter;
}
void fpga_multicorrelator_8sc::set_local_code_and_taps(int code_length_chips,
float *shifts_chips, int PRN)
{
void fpga_multicorrelator_8sc::set_local_code_and_taps(int code_length_chips,
float *shifts_chips, int PRN)
{
d_shifts_chips = shifts_chips;
d_code_length_chips = code_length_chips;
fpga_multicorrelator_8sc::fpga_configure_tracking_gps_local_code(PRN);
}
void fpga_multicorrelator_8sc::set_output_vectors(gr_complex* corr_out)
void fpga_multicorrelator_8sc::set_output_vectors(gr_complex *corr_out)
{
d_corr_out = corr_out;
}
@@ -116,21 +113,18 @@ void fpga_multicorrelator_8sc::update_local_code(float rem_code_phase_chips)
fpga_multicorrelator_8sc::fpga_configure_code_parameters_in_fpga();
}
void fpga_multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler(
float rem_carrier_phase_in_rad, float phase_step_rad,
float rem_code_phase_chips, float code_phase_step_chips,
int signal_length_samples)
float rem_carrier_phase_in_rad, float phase_step_rad,
float rem_code_phase_chips, float code_phase_step_chips,
int signal_length_samples)
{
update_local_code(rem_code_phase_chips);
d_rem_carrier_phase_in_rad = rem_carrier_phase_in_rad;
d_code_phase_step_chips = code_phase_step_chips;
d_phase_step_rad = phase_step_rad;
d_correlator_length_samples = signal_length_samples;
fpga_multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga();
fpga_multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga();
fpga_multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga();
fpga_multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga();
fpga_multicorrelator_8sc::fpga_launch_multicorrelator_fpga();
int irq_count;
ssize_t nb;
@@ -143,8 +137,9 @@ void fpga_multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler(
fpga_multicorrelator_8sc::read_tracking_gps_results();
}
fpga_multicorrelator_8sc::fpga_multicorrelator_8sc(int n_correlators,
std::string device_name, unsigned int device_base)
std::string device_name, unsigned int device_base)
{
d_n_correlators = n_correlators;
d_device_name = device_name;
@@ -153,10 +148,10 @@ fpga_multicorrelator_8sc::fpga_multicorrelator_8sc(int n_correlators,
d_map_base = nullptr;
// instantiate variable length vectors
d_initial_index = static_cast<unsigned*>(volk_gnsssdr_malloc(
n_correlators * sizeof(unsigned), volk_gnsssdr_get_alignment()));
d_initial_interp_counter = static_cast<unsigned*>(volk_gnsssdr_malloc(
n_correlators * sizeof(unsigned), volk_gnsssdr_get_alignment()));
d_initial_index = static_cast<unsigned *>(volk_gnsssdr_malloc(
n_correlators * sizeof(unsigned), volk_gnsssdr_get_alignment()));
d_initial_interp_counter = static_cast<unsigned *>(volk_gnsssdr_malloc(
n_correlators * sizeof(unsigned), volk_gnsssdr_get_alignment()));
//d_local_code_in = nullptr;
d_shifts_chips = nullptr;
@@ -171,21 +166,20 @@ fpga_multicorrelator_8sc::fpga_multicorrelator_8sc(int n_correlators,
d_initial_sample_counter = 0;
d_channel = 0;
d_correlator_length_samples = 0;
// pre-compute all the codes
d_ca_codes = static_cast<int*>(volk_gnsssdr_malloc(static_cast<int>(GPS_L1_CA_CODE_LENGTH_CHIPS*NUM_PRNs) * sizeof(int), volk_gnsssdr_get_alignment()));
d_ca_codes = static_cast<int *>(volk_gnsssdr_malloc(static_cast<int>(GPS_L1_CA_CODE_LENGTH_CHIPS * NUM_PRNs) * sizeof(int), volk_gnsssdr_get_alignment()));
for (unsigned int PRN = 1; PRN <= NUM_PRNs; PRN++)
{
gps_l1_ca_code_gen_int(&d_ca_codes[(int(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1)], PRN, 0);
}
{
gps_l1_ca_code_gen_int(&d_ca_codes[(int(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1)], PRN, 0);
}
DLOG(INFO) << "TRACKING FPGA CLASS CREATED";
}
fpga_multicorrelator_8sc::~fpga_multicorrelator_8sc()
{
delete[] d_ca_codes;
delete[] d_ca_codes;
close_device();
}
@@ -193,7 +187,7 @@ fpga_multicorrelator_8sc::~fpga_multicorrelator_8sc()
bool fpga_multicorrelator_8sc::free()
{
// unlock the channel
fpga_multicorrelator_8sc::unlock_channel();
fpga_multicorrelator_8sc::unlock_channel();
// free the FPGA dynamically created variables
if (d_initial_index != nullptr)
@@ -214,7 +208,7 @@ bool fpga_multicorrelator_8sc::free()
void fpga_multicorrelator_8sc::set_channel(unsigned int channel)
{
char device_io_name[MAX_LENGTH_DEVICEIO_NAME]; // driver io name
char device_io_name[MAX_LENGTH_DEVICEIO_NAME]; // driver io name
d_channel = channel;
// open the device corresponding to the assigned channel
@@ -229,12 +223,12 @@ void fpga_multicorrelator_8sc::set_channel(unsigned int channel)
LOG(WARNING) << "Cannot open deviceio" << device_io_name;
}
d_map_base = reinterpret_cast<volatile unsigned *>(mmap(NULL, PAGE_SIZE,
PROT_READ | PROT_WRITE, MAP_SHARED, d_device_descriptor, 0));
PROT_READ | PROT_WRITE, MAP_SHARED, d_device_descriptor, 0));
if (d_map_base == reinterpret_cast<void*>(-1))
if (d_map_base == reinterpret_cast<void *>(-1))
{
LOG(WARNING) << "Cannot map the FPGA tracking module "
<< d_channel << "into user memory";
<< d_channel << "into user memory";
}
// sanity check : check test register
@@ -253,7 +247,7 @@ void fpga_multicorrelator_8sc::set_channel(unsigned int channel)
unsigned fpga_multicorrelator_8sc::fpga_acquisition_test_register(
unsigned writeval)
unsigned writeval)
{
unsigned readval;
// write value to test register
@@ -287,11 +281,9 @@ void fpga_multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int PRN)
code_chip = 0;
}
// copy the local code to the FPGA memory one by one
d_map_base[11] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY
| code_chip | select_fpga_correlator;
d_map_base[11] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip | select_fpga_correlator;
}
select_fpga_correlator = select_fpga_correlator
+ LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
select_fpga_correlator = select_fpga_correlator + LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
}
}
@@ -304,20 +296,20 @@ void fpga_multicorrelator_8sc::fpga_compute_code_shift_parameters(void)
for (i = 0; i < d_n_correlators; i++)
{
temp_calculation = floor(
d_shifts_chips[i] - d_rem_code_phase_chips);
d_shifts_chips[i] - d_rem_code_phase_chips);
if (temp_calculation < 0)
{
temp_calculation = temp_calculation + d_code_length_chips; // % operator does not work as in Matlab with negative numbers
temp_calculation = temp_calculation + d_code_length_chips; // % operator does not work as in Matlab with negative numbers
}
d_initial_index[i] = static_cast<unsigned>( (static_cast<int>(temp_calculation)) % d_code_length_chips);
d_initial_index[i] = static_cast<unsigned>((static_cast<int>(temp_calculation)) % d_code_length_chips);
temp_calculation = fmod(d_shifts_chips[i] - d_rem_code_phase_chips,
1.0);
1.0);
if (temp_calculation < 0)
{
temp_calculation = temp_calculation + 1.0; // fmod operator does not work as in Matlab with negative numbers
temp_calculation = temp_calculation + 1.0; // fmod operator does not work as in Matlab with negative numbers
}
d_initial_interp_counter[i] = static_cast<unsigned>( floor( MAX_CODE_RESAMPLER_COUNTER * temp_calculation));
d_initial_interp_counter[i] = static_cast<unsigned>(floor(MAX_CODE_RESAMPLER_COUNTER * temp_calculation));
}
}
@@ -330,7 +322,7 @@ void fpga_multicorrelator_8sc::fpga_configure_code_parameters_in_fpga(void)
d_map_base[1 + i] = d_initial_index[i];
d_map_base[1 + d_n_correlators + i] = d_initial_interp_counter[i];
}
d_map_base[8] = d_code_length_chips - 1; // number of samples - 1
d_map_base[8] = d_code_length_chips - 1; // number of samples - 1
}
@@ -338,30 +330,27 @@ void fpga_multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga(void)
{
float d_rem_carrier_phase_in_rad_temp;
d_code_phase_step_chips_num = static_cast<unsigned>( roundf(MAX_CODE_RESAMPLER_COUNTER * d_code_phase_step_chips));
d_code_phase_step_chips_num = static_cast<unsigned>(roundf(MAX_CODE_RESAMPLER_COUNTER * d_code_phase_step_chips));
if (d_rem_carrier_phase_in_rad > M_PI)
{
d_rem_carrier_phase_in_rad_temp = -2 * M_PI
+ d_rem_carrier_phase_in_rad;
d_rem_carrier_phase_in_rad_temp = -2 * M_PI + d_rem_carrier_phase_in_rad;
}
else if (d_rem_carrier_phase_in_rad < -M_PI)
{
d_rem_carrier_phase_in_rad_temp = 2 * M_PI
+ d_rem_carrier_phase_in_rad;
d_rem_carrier_phase_in_rad_temp = 2 * M_PI + d_rem_carrier_phase_in_rad;
}
else
{
d_rem_carrier_phase_in_rad_temp = d_rem_carrier_phase_in_rad;
}
d_rem_carr_phase_rad_int = static_cast<int>( roundf(
(fabs(d_rem_carrier_phase_in_rad_temp) / M_PI)
* pow(2, PHASE_CARR_NBITS_FRAC)));
d_rem_carr_phase_rad_int = static_cast<int>(roundf(
(fabs(d_rem_carrier_phase_in_rad_temp) / M_PI) * pow(2, PHASE_CARR_NBITS_FRAC)));
if (d_rem_carrier_phase_in_rad_temp < 0)
{
d_rem_carr_phase_rad_int = -d_rem_carr_phase_rad_int;
}
d_phase_step_rad_int = static_cast<int>( roundf(
(fabs(d_phase_step_rad) / M_PI) * pow(2, PHASE_CARR_NBITS_FRAC))); // the FPGA accepts a range for the phase step between -pi and +pi
d_phase_step_rad_int = static_cast<int>(roundf(
(fabs(d_phase_step_rad) / M_PI) * pow(2, PHASE_CARR_NBITS_FRAC))); // the FPGA accepts a range for the phase step between -pi and +pi
if (d_phase_step_rad < 0)
{
@@ -383,10 +372,10 @@ void fpga_multicorrelator_8sc::fpga_launch_multicorrelator_fpga(void)
{
// enable interrupts
int reenable = 1;
write(d_device_descriptor, reinterpret_cast<void*>(&reenable), sizeof(int));
write(d_device_descriptor, reinterpret_cast<void *>(&reenable), sizeof(int));
// writing 1 to reg 14 launches the tracking
d_map_base[14] = 1;
// writing 1 to reg 14 launches the tracking
d_map_base[14] = 1;
}
@@ -399,17 +388,17 @@ void fpga_multicorrelator_8sc::read_tracking_gps_results(void)
for (k = 0; k < d_n_correlators; k++)
{
readval_real = d_map_base[1 + k];
if (readval_real >= 1048576) // 0x100000 (21 bits two's complement)
if (readval_real >= 1048576) // 0x100000 (21 bits two's complement)
{
readval_real = -2097152 + readval_real;
}
readval_imag = d_map_base[1 + d_n_correlators + k];
if (readval_imag >= 1048576) // 0x100000 (21 bits two's complement)
if (readval_imag >= 1048576) // 0x100000 (21 bits two's complement)
{
readval_imag = -2097152 + readval_imag;
}
d_corr_out[k] = gr_complex(readval_real,readval_imag);
d_corr_out[k] = gr_complex(readval_real, readval_imag);
}
}
@@ -417,40 +406,42 @@ void fpga_multicorrelator_8sc::read_tracking_gps_results(void)
void fpga_multicorrelator_8sc::unlock_channel(void)
{
// unlock the channel to let the next samples go through
d_map_base[12] = 1; // unlock the channel
d_map_base[12] = 1; // unlock the channel
}
void fpga_multicorrelator_8sc::close_device()
{
unsigned * aux = const_cast<unsigned*>(d_map_base);
if (munmap(static_cast<void*>(aux), PAGE_SIZE) == -1)
unsigned *aux = const_cast<unsigned *>(d_map_base);
if (munmap(static_cast<void *>(aux), PAGE_SIZE) == -1)
{
printf("Failed to unmap memory uio\n");
}
/* else
/* else
{
printf("memory uio unmapped\n");
} */
close(d_device_descriptor);
}
void fpga_multicorrelator_8sc::lock_channel(void)
{
// lock the channel for processing
d_map_base[12] = 0; // lock the channel
d_map_base[12] = 0; // lock the channel
}
void fpga_multicorrelator_8sc::read_sample_counters(int *sample_counter, int *secondary_sample_counter, int *counter_corr_0_in, int *counter_corr_0_out)
{
*sample_counter = d_map_base[11];
*secondary_sample_counter = d_map_base[8];
*counter_corr_0_in = d_map_base[10];
*counter_corr_0_out = d_map_base[9];
*sample_counter = d_map_base[11];
*secondary_sample_counter = d_map_base[8];
*counter_corr_0_in = d_map_base[10];
*counter_corr_0_out = d_map_base[9];
}
void fpga_multicorrelator_8sc::reset_multicorrelator(void)
{
d_map_base[14] = 2; // writing a 2 to d_map_base[14] resets the multicorrelator
d_map_base[14] = 2; // writing a 2 to d_map_base[14] resets the multicorrelator
}

48
src/algorithms/tracking/libs/fpga_multicorrelator_8sc.h
View File

@@ -49,46 +49,46 @@ class fpga_multicorrelator_8sc
{
public:
fpga_multicorrelator_8sc(int n_correlators, std::string device_name,
unsigned int device_base);
unsigned int device_base);
~fpga_multicorrelator_8sc();
//bool set_output_vectors(gr_complex* corr_out);
void set_output_vectors(gr_complex* corr_out);
// bool set_local_code_and_taps(
// int code_length_chips, const int* local_code_in,
// float *shifts_chips, int PRN);
//bool set_output_vectors(gr_complex* corr_out);
void set_output_vectors(gr_complex *corr_out);
// bool set_local_code_and_taps(
// int code_length_chips, const int* local_code_in,
// float *shifts_chips, int PRN);
//bool set_local_code_and_taps(
void set_local_code_and_taps(
int code_length_chips,
float *shifts_chips, int PRN);
int code_length_chips,
float *shifts_chips, int PRN);
//bool set_output_vectors(lv_16sc_t* corr_out);
void update_local_code(float rem_code_phase_chips);
//bool Carrier_wipeoff_multicorrelator_resampler(
void Carrier_wipeoff_multicorrelator_resampler(
float rem_carrier_phase_in_rad, float phase_step_rad,
float rem_code_phase_chips, float code_phase_step_chips,
int signal_length_samples);bool free();
float rem_carrier_phase_in_rad, float phase_step_rad,
float rem_code_phase_chips, float code_phase_step_chips,
int signal_length_samples);
bool free();
void set_channel(unsigned int channel);
void set_initial_sample(int samples_offset);
int read_sample_counter();
void lock_channel(void);
void unlock_channel(void);
void read_sample_counters(int *sample_counter, int *secondary_sample_counter, int *counter_corr_0_in, int *counter_corr_0_out); // debug
void read_sample_counters(int *sample_counter, int *secondary_sample_counter, int *counter_corr_0_in, int *counter_corr_0_out); // debug
private:
//const int *d_local_code_in;
gr_complex * d_corr_out;
gr_complex *d_corr_out;
float *d_shifts_chips;
int d_code_length_chips;
int d_n_correlators;
// data related to the hardware module and the driver
int d_device_descriptor; // driver descriptor
volatile unsigned *d_map_base; // driver memory map
int d_device_descriptor; // driver descriptor
volatile unsigned *d_map_base; // driver memory map
// configuration data received from the interface
unsigned int d_channel; // channel number
unsigned d_ncorrelators; // number of correlators
unsigned int d_channel; // channel number
unsigned d_ncorrelators; // number of correlators
unsigned d_correlator_length_samples;
float d_rem_code_phase_chips;
float d_code_phase_step_chips;
@@ -107,8 +107,7 @@ private:
std::string d_device_name;
unsigned int d_device_base;
int* d_ca_codes;
int *d_ca_codes;
// private functions
unsigned fpga_acquisition_test_register(unsigned writeval);
@@ -119,11 +118,8 @@ private:
void fpga_configure_signal_parameters_in_fpga(void);
void fpga_launch_multicorrelator_fpga(void);
void read_tracking_gps_results(void);
void reset_multicorrelator(void);
void close_device(void);
// debug
//unsigned int first_time = 1;
void reset_multicorrelator(void);
void close_device(void);
};
#endif /* GNSS_SDR_FPGA_MULTICORRELATOR_H_ */