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Small fixes (#26)
* Decouple the FPGA DMA signal source from the AD9361 FPGA signal source. * Add the MAX2771_EVKIT FPGA signal source and the ENABLE_FPGA_MAX2771_EVKIT flag to enable it. * Adjust cross-compilation flags to properly support FPGA signal sources * fix signal source names for consistency * Detect if the spidev driver is installed when the ENABLE_MAX2771 flag is set. Detect if the DMA proxy driver is installed when the ENABLE_DMA_PROXY flag is set. Check if ENABLE_FPGA is set when either ENABLE_MAX2771 or ENABLE_DMA_PROXY is set. * fix FPGA signal source names for consistency * Fix FPGA-related CMakefile flags * make cpplint happy * make cpplint happy * make cmakelint happy * make clang-format happy * Replaced the AD9361 FPGA signal source with the ADRV9361_Z7035 FPGA and the FMCOMMS5 FPGA signal sources. * Bump local version of GoogleTest to 1.15.2 and Protocol Buffers to 27.3 * Avoid code duplication in CMake modules * Update clang-tidy job * Clang Tidy fixes * Improve efficiency of Concurrent_Map and Concurrent_Queue classes * Fix segmentation fault if the SignalSource implementation is not available * Moved decimation factor count variable to the class * Avoid possible runtime error when PVT.enable_rx_clock_correction=true * Fix formatting * Fix clang-tidy job * Capitalize FPGA in class implementation names * Capitalize acronyms in FPGA-related class names * Instantiate sources only once * Update changelog * Fix building in some environments and fix CI jobs * Fix clang-tidy complain --------- Co-authored-by: Marc Majoral <majoralmarc@gmail.com> Co-authored-by: cesaaargm <cesare.martinez@proton.me> Co-authored-by: Xavier Guerrero-Pau <xguerrero@cttc.es>
This commit is contained in:
co-authored by
Marc Majoral
cesaaargm
Xavier Guerrero-Pau
parent
ea0684d640
commit
94d7635612
@@ -21,6 +21,25 @@ All notable changes to GNSS-SDR will be documented in this file.
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wideband device (HackRF/LimeSDR/USRP). Demonstration:
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https://www.youtube.com/watch?v=ZQs2sFchJ6w
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https://www.youtube.com/watch?v=HnZkKj9a-QM
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- Add the following signal sources for use when GNSS-SDR is operating on SoC
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FPGA boards (`-DENABLE_FPGA=ON`):
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- `ADRV9361_Z7035_Signal_Source_FPGA`: Analog Devices ADRV9361-Z7035 board.
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- `FMCOMMS5_Signal_Source_FPGA`: FMCOMMS5 analog front-end.
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- `MAX2771_EVKIT_Signal_Source_FPGA`: MAX2771 evaluation kit analog front-end.
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- `DMA_Signal_Source_FPGA`: FPGA DMA working in post-processing mode.
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When building GNSS-SDR for the SoC FPGA, the following options can be passed
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to CMake with possible values of `ON` or `OFF`, and their default value is
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`OFF`:
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- `-DENABLE_AD9361`: Checks if the IIO driver is installed and builds the
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`ADRV9361_Z7035_Signal_Source_FPGA` and the `FMCOMMS5_Signal_Source_FPGA`
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sources.
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- `-DENABLE_MAX2771`: Checks if the SPIdev driver is installed and builds the
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`MAX2771_EVKIT_Signal_Source_FPGA` source.
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- `-DENABLE_DMA_PROXY`: Checks if the DMA proxy driver is installed for
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controlling the DMA in the FPGA and enables its usage.
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### Improvements in Portability:
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