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	When using the FPGA in post-processing mode, start the DMA after instantiating the complete flowgraph, not before.
This commit is contained in:
		 Marc Majoral
					Marc Majoral
				
			
				
					committed by
					
						 Carles Fernandez
						Carles Fernandez
					
				
			
			
				
	
			
			
			 Carles Fernandez
						Carles Fernandez
					
				
			
						parent
						
							a406515ac3
						
					
				
				
					commit
					933873c265
				
			| @@ -148,8 +148,6 @@ Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *con | |||||||
|                 { |                 { | ||||||
|                     freq_band = "L1L2"; |                     freq_band = "L1L2"; | ||||||
|                 } |                 } | ||||||
|  |  | ||||||
|             thread_file_to_dma = std::thread([&] { run_DMA_process(freq_band, filename_rx1, filename_rx2); }); |  | ||||||
|         } |         } | ||||||
|     if (switch_position == 2)  // Real-time via AD9361 |     if (switch_position == 2)  // Real-time via AD9361 | ||||||
|         { |         { | ||||||
| @@ -368,6 +366,11 @@ Ad9361FpgaSignalSource::~Ad9361FpgaSignalSource() | |||||||
|         } |         } | ||||||
| } | } | ||||||
|  |  | ||||||
|  | void Ad9361FpgaSignalSource::start() | ||||||
|  | { | ||||||
|  |     thread_file_to_dma = std::thread([&] { run_DMA_process(freq_band, filename_rx1, filename_rx2); }); | ||||||
|  | } | ||||||
|  |  | ||||||
|  |  | ||||||
| void Ad9361FpgaSignalSource::run_DMA_process(const std::string &FreqBand, const std::string &Filename1, const std::string &Filename2) | void Ad9361FpgaSignalSource::run_DMA_process(const std::string &FreqBand, const std::string &Filename1, const std::string &Filename2) | ||||||
| { | { | ||||||
|   | |||||||
| @@ -43,6 +43,8 @@ public: | |||||||
|  |  | ||||||
|     ~Ad9361FpgaSignalSource(); |     ~Ad9361FpgaSignalSource(); | ||||||
|  |  | ||||||
|  |     void start(); | ||||||
|  |  | ||||||
|     inline std::string role() override |     inline std::string role() override | ||||||
|     { |     { | ||||||
|         return role_; |         return role_; | ||||||
|   | |||||||
| @@ -68,6 +68,11 @@ public: | |||||||
|             };           // avoid unused param warning |             };           // avoid unused param warning | ||||||
|         return nullptr;  // added to support raw array access (non pure virtual to allow left unimplemented)= 0; |         return nullptr;  // added to support raw array access (non pure virtual to allow left unimplemented)= 0; | ||||||
|     } |     } | ||||||
|  |  | ||||||
|  |     /*! | ||||||
|  |      * \brief Start the flow of samples if needed. | ||||||
|  |      */ | ||||||
|  |     virtual void start(){}; | ||||||
| }; | }; | ||||||
|  |  | ||||||
| #endif  // GNSS_SDR_GNSS_BLOCK_INTERFACE_H | #endif  // GNSS_SDR_GNSS_BLOCK_INTERFACE_H | ||||||
|   | |||||||
| @@ -110,6 +110,10 @@ void GNSSFlowgraph::start() | |||||||
|             return; |             return; | ||||||
|         } |         } | ||||||
|  |  | ||||||
|  | #ifdef ENABLE_FPGA | ||||||
|  |     sig_source_.at(0)->start(); | ||||||
|  | #endif | ||||||
|  |  | ||||||
|     running_ = true; |     running_ = true; | ||||||
| } | } | ||||||
|  |  | ||||||
|   | |||||||
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