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https://github.com/gnss-sdr/gnss-sdr
synced 2025-10-28 05:57:39 +00:00
currently optimizing the FPGA-related code
This commit is contained in:
@@ -51,9 +51,9 @@
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#define CODE_PHASE_STEP_CHIPS_NUM_NBITS CODE_RESAMPLER_NUM_BITS_PRECISION
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#define pwrtwo(x) (1 << (x))
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#define MAX_CODE_RESAMPLER_COUNTER pwrtwo(CODE_PHASE_STEP_CHIPS_NUM_NBITS) // 2^CODE_PHASE_STEP_CHIPS_NUM_NBITS
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#define PHASE_CARR_NBITS 32
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#define PHASE_CARR_NBITS_INT 1
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#define PHASE_CARR_NBITS_FRAC PHASE_CARR_NBITS - PHASE_CARR_NBITS_INT
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#define PHASE_CARR_MAX 2147483648 // 2^(31) The phase is represented as a 32-bit vector in 1.31 format
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#define PHASE_CARR_MAX_div_PI 683565275.5764316 // 2^(31)/pi
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#define TWO_PI 6.283185307179586
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#define LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT 0x20000000
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#define LOCAL_CODE_FPGA_CLEAR_ADDRESS_COUNTER 0x10000000
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#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000
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@@ -118,6 +118,7 @@ Fpga_Multicorrelator_8sc::Fpga_Multicorrelator_8sc(int32_t n_correlators,
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d_data_codes = data_codes;
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d_multicorr_type = multicorr_type;
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d_code_samples_per_chip = code_samples_per_chip;
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d_code_length_samples = d_code_length_chips * d_code_samples_per_chip;
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DLOG(INFO) << "TRACKING FPGA CLASS CREATED";
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}
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@@ -171,9 +172,9 @@ void Fpga_Multicorrelator_8sc::set_output_vectors(gr_complex *corr_out, gr_compl
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}
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void Fpga_Multicorrelator_8sc::update_local_code(float rem_code_phase_chips)
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void Fpga_Multicorrelator_8sc::update_local_code()
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{
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d_rem_code_phase_chips = rem_code_phase_chips;
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//d_rem_code_phase_chips = rem_code_phase_chips;
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Fpga_Multicorrelator_8sc::fpga_compute_code_shift_parameters();
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Fpga_Multicorrelator_8sc::fpga_configure_code_parameters_in_fpga();
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}
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@@ -188,11 +189,12 @@ void Fpga_Multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler(
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float code_phase_rate_step_chips __attribute__((unused)),
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int32_t signal_length_samples)
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{
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update_local_code(rem_code_phase_chips);
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d_rem_code_phase_chips = rem_code_phase_chips;
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d_rem_carrier_phase_in_rad = rem_carrier_phase_in_rad;
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d_code_phase_step_chips = code_phase_step_chips;
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d_phase_step_rad = phase_step_rad;
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d_correlator_length_samples = signal_length_samples;
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Fpga_Multicorrelator_8sc::update_local_code();
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Fpga_Multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga();
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Fpga_Multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga();
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Fpga_Multicorrelator_8sc::fpga_launch_multicorrelator_fpga();
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@@ -302,9 +304,9 @@ void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
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uint32_t select_pilot_corelator = LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
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d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_CLEAR_ADDRESS_COUNTER;
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for (k = 0; k < d_code_length_chips * d_code_samples_per_chip; k++)
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for (k = 0; k < d_code_length_samples; k++)
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{
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if (d_ca_codes[((int32_t(d_code_length_chips)) * d_code_samples_per_chip * (PRN - 1)) + k] == 1)
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if (d_ca_codes[(d_code_length_samples * (PRN - 1)) + k] == 1)
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{
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code_chip = 1;
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}
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@@ -319,9 +321,9 @@ void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
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if (d_track_pilot)
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{
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d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_CLEAR_ADDRESS_COUNTER;
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for (k = 0; k < d_code_length_chips * d_code_samples_per_chip; k++)
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for (k = 0; k < d_code_length_samples; k++)
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{
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if (d_data_codes[((int32_t(d_code_length_chips)) * d_code_samples_per_chip * (PRN - 1)) + k] == 1)
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if (d_data_codes[(d_code_length_samples * (PRN - 1)) + k] == 1)
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{
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code_chip = 1;
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}
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@@ -332,46 +334,53 @@ void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
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d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip | select_pilot_corelator;
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}
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}
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d_map_base[CODE_LENGTH_MINUS_1_REG_ADDR] = (d_code_length_samples)-1; // number of samples - 1
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}
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void Fpga_Multicorrelator_8sc::fpga_compute_code_shift_parameters(void)
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{
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float temp_calculation;
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float frac_part; // decimal part
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int32_t dec_part; // fractional part
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int32_t i;
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for (i = 0; i < d_n_correlators; i++)
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{
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temp_calculation = floor(d_shifts_chips[i] - d_rem_code_phase_chips);
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dec_part = floor(d_shifts_chips[i] - d_rem_code_phase_chips);
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if (temp_calculation < 0)
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if (dec_part < 0)
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{
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temp_calculation = temp_calculation + (d_code_length_chips * d_code_samples_per_chip); // % operator does not work as in Matlab with negative numbers
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dec_part = dec_part + d_code_length_samples; // % operator does not work as in Matlab with negative numbers
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}
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d_initial_index[i] = static_cast<uint32_t>((static_cast<int32_t>(temp_calculation)) % (d_code_length_chips * d_code_samples_per_chip));
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temp_calculation = fmod(d_shifts_chips[i] - d_rem_code_phase_chips, 1.0);
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if (temp_calculation < 0)
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d_initial_index[i] = dec_part;
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frac_part = fmod(d_shifts_chips[i] - d_rem_code_phase_chips, 1.0);
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if (frac_part < 0)
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{
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temp_calculation = temp_calculation + 1.0; // fmod operator does not work as in Matlab with negative numbers
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frac_part = frac_part + 1.0; // fmod operator does not work as in Matlab with negative numbers
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}
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d_initial_interp_counter[i] = static_cast<uint32_t>(floor(MAX_CODE_RESAMPLER_COUNTER * temp_calculation));
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d_initial_interp_counter[i] = static_cast<uint32_t>(floor(MAX_CODE_RESAMPLER_COUNTER * frac_part));
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}
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if (d_track_pilot)
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{
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temp_calculation = floor(d_prompt_data_shift[0] - d_rem_code_phase_chips);
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dec_part = floor(d_prompt_data_shift[0] - d_rem_code_phase_chips);
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if (temp_calculation < 0)
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if (dec_part < 0)
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{
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temp_calculation = temp_calculation + (d_code_length_chips * d_code_samples_per_chip); // % operator does not work as in Matlab with negative numbers
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dec_part = dec_part + d_code_length_samples; // % operator does not work as in Matlab with negative numbers
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}
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d_initial_index[d_n_correlators] = static_cast<uint32_t>((static_cast<int32_t>(temp_calculation)) % (d_code_length_chips * d_code_samples_per_chip));
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temp_calculation = fmod(d_prompt_data_shift[0] - d_rem_code_phase_chips, 1.0);
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if (temp_calculation < 0)
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d_initial_index[d_n_correlators] = dec_part;
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frac_part = fmod(d_prompt_data_shift[0] - d_rem_code_phase_chips, 1.0);
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if (frac_part < 0)
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{
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temp_calculation = temp_calculation + 1.0; // fmod operator does not work as in Matlab with negative numbers
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frac_part = frac_part + 1.0; // fmod operator does not work as in Matlab with negative numbers
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}
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d_initial_interp_counter[d_n_correlators] = static_cast<uint32_t>(floor(MAX_CODE_RESAMPLER_COUNTER * temp_calculation));
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d_initial_interp_counter[d_n_correlators] = static_cast<uint32_t>(floor(MAX_CODE_RESAMPLER_COUNTER * frac_part));
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}
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}
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@@ -390,7 +399,7 @@ void Fpga_Multicorrelator_8sc::fpga_configure_code_parameters_in_fpga(void)
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d_map_base[INITIAL_INTERP_COUNTER_REG_BASE_ADDR + d_n_correlators] = d_initial_interp_counter[d_n_correlators];
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}
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d_map_base[CODE_LENGTH_MINUS_1_REG_ADDR] = (d_code_length_chips * d_code_samples_per_chip) - 1; // number of samples - 1
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//d_map_base[CODE_LENGTH_MINUS_1_REG_ADDR] = (d_code_length_samples)-1; // number of samples - 1
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}
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@@ -399,34 +408,22 @@ void Fpga_Multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga(void)
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float d_rem_carrier_phase_in_rad_temp;
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d_code_phase_step_chips_num = static_cast<uint32_t>(roundf(MAX_CODE_RESAMPLER_COUNTER * d_code_phase_step_chips));
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if (d_code_phase_step_chips > 1.0)
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{
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std::cout << "Warning : d_code_phase_step_chips = " << d_code_phase_step_chips << " cannot be bigger than one" << std::endl;
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}
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if (d_rem_carrier_phase_in_rad > M_PI)
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{
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d_rem_carrier_phase_in_rad_temp = -2 * M_PI + d_rem_carrier_phase_in_rad;
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d_rem_carrier_phase_in_rad_temp = -TWO_PI + d_rem_carrier_phase_in_rad;
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}
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else if (d_rem_carrier_phase_in_rad < -M_PI)
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{
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d_rem_carrier_phase_in_rad_temp = 2 * M_PI + d_rem_carrier_phase_in_rad;
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d_rem_carrier_phase_in_rad_temp = TWO_PI + d_rem_carrier_phase_in_rad;
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}
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else
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{
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d_rem_carrier_phase_in_rad_temp = d_rem_carrier_phase_in_rad;
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}
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d_rem_carr_phase_rad_int = static_cast<int32_t>(roundf((fabs(d_rem_carrier_phase_in_rad_temp) / M_PI) * pow(2, PHASE_CARR_NBITS_FRAC)));
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if (d_rem_carrier_phase_in_rad_temp < 0)
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{
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d_rem_carr_phase_rad_int = -d_rem_carr_phase_rad_int;
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}
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d_phase_step_rad_int = static_cast<int32_t>(roundf((fabs(d_phase_step_rad) / M_PI) * pow(2, PHASE_CARR_NBITS_FRAC))); // the FPGA accepts a range for the phase step between -pi and +pi
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if (d_phase_step_rad < 0)
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{
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d_phase_step_rad_int = -d_phase_step_rad_int;
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}
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d_rem_carr_phase_rad_int = static_cast<int32_t>(roundf((d_rem_carrier_phase_in_rad_temp)*PHASE_CARR_MAX_div_PI));
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d_phase_step_rad_int = static_cast<int32_t>(roundf((d_phase_step_rad)*PHASE_CARR_MAX_div_PI)); // the FPGA accepts a range for the phase step between -pi and +pi
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}
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@@ -75,9 +75,10 @@ public:
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uint32_t device_base, int32_t *ca_codes, int32_t *data_codes, uint32_t code_length_chips, bool track_pilot, uint32_t multicorr_type, uint32_t code_samples_per_chip);
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~Fpga_Multicorrelator_8sc();
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void set_output_vectors(gr_complex *corr_out, gr_complex *Prompt_Data);
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//void fpga_compute_signal_parameters_in_fpga(void);
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void set_local_code_and_taps(
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float *shifts_chips, float *prompt_data_shift, int32_t PRN);
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void update_local_code(float rem_code_phase_chips);
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void update_local_code();
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void Carrier_wipeoff_multicorrelator_resampler(
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float rem_carrier_phase_in_rad, float phase_step_rad,
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float carrier_phase_rate_step_rad,
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@@ -96,15 +97,16 @@ private:
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gr_complex *d_Prompt_Data;
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float *d_shifts_chips;
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float *d_prompt_data_shift;
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int32_t d_code_length_chips;
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int32_t d_n_correlators; // number of correlators
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uint32_t d_code_length_chips;
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uint32_t d_code_length_samples;
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uint32_t d_n_correlators; // number of correlators
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// data related to the hardware module and the driver
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int32_t d_device_descriptor; // driver descriptor
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volatile uint32_t *d_map_base; // driver memory map
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// configuration data received from the interface
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uint32_t d_channel; // channel number
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uint32_t d_channel; // channel number
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uint32_t d_correlator_length_samples;
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float d_rem_code_phase_chips;
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float d_code_phase_step_chips;
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