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https://github.com/gnss-sdr/gnss-sdr
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updated the FPGA tracking module following the changes made in commit ed93af11ac
(Oct 21, 2020) to the SW tracking (added tracking monitors)
This commit is contained in:
parent
83ad19309b
commit
8e4a26887c
@ -1493,6 +1493,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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auto **out = reinterpret_cast<Gnss_Synchro **>(&output_items[0]);
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auto **out = reinterpret_cast<Gnss_Synchro **>(&output_items[0]);
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Gnss_Synchro current_synchro_data = Gnss_Synchro();
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Gnss_Synchro current_synchro_data = Gnss_Synchro();
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current_synchro_data.Flag_valid_symbol_output = false;
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current_synchro_data.Flag_valid_symbol_output = false;
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bool loss_of_lock = false;
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while ((!current_synchro_data.Flag_valid_symbol_output) && (!d_stop_tracking))
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while ((!current_synchro_data.Flag_valid_symbol_output) && (!d_stop_tracking))
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{
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{
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@ -1617,9 +1618,8 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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{
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{
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clear_tracking_vars();
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clear_tracking_vars();
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d_state = 1; // loss-of-lock detected
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d_state = 1; // loss-of-lock detected
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loss_of_lock = true; // Set the flag so that the negative indication can be generated
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// send something to let the scheduler know that it has to keep on calling general work and to finish the loop
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current_synchro_data = *d_acquisition_gnss_synchro; // Fill in the Gnss_Synchro object with basic info
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// current_synchro_data.Flag_valid_symbol_output=1;
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}
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}
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else
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else
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{
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{
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@ -1819,9 +1819,8 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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{
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{
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clear_tracking_vars();
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clear_tracking_vars();
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d_state = 1; // loss-of-lock detected
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d_state = 1; // loss-of-lock detected
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loss_of_lock = true; // Set the flag so that the negative indication can be generated
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// send something to let the scheduler know that it has to keep on calling general work and to finish the loop
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current_synchro_data = *d_acquisition_gnss_synchro; // Fill in the Gnss_Synchro object with basic info
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// current_synchro_data.Flag_valid_symbol_output=1;
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}
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}
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else
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else
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{
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{
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@ -1942,9 +1941,8 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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{
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{
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clear_tracking_vars();
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clear_tracking_vars();
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d_state = 1; // loss-of-lock detected
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d_state = 1; // loss-of-lock detected
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loss_of_lock = true; // Set the flag so that the negative indication can be generated
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// send something to let the scheduler know that it has to keep on calling general work and to finish the loop
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current_synchro_data = *d_acquisition_gnss_synchro; // Fill in the Gnss_Synchro object with basic info
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// current_synchro_data.Flag_valid_symbol_output=1;
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}
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}
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else
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else
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{
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{
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@ -1999,10 +1997,11 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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}
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}
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}
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}
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if (current_synchro_data.Flag_valid_symbol_output)
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if (current_synchro_data.Flag_valid_symbol_output || loss_of_lock)
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{
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{
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current_synchro_data.fs = static_cast<int64_t>(d_trk_parameters.fs_in);
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current_synchro_data.fs = static_cast<int64_t>(d_trk_parameters.fs_in);
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current_synchro_data.Tracking_sample_counter = d_sample_counter_next; // d_sample_counter;
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current_synchro_data.Tracking_sample_counter = d_sample_counter_next; // d_sample_counter;
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current_synchro_data.Flag_valid_symbol_output = !loss_of_lock;
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*out[0] = current_synchro_data;
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*out[0] = current_synchro_data;
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return 1;
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return 1;
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}
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}
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