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mirror of https://github.com/gnss-sdr/gnss-sdr synced 2025-01-19 05:33:02 +00:00

updated the FPGA tracking module following the changes made in commit ed93af11ac (Oct 21, 2020) to the SW tracking (added tracking monitors)

This commit is contained in:
Marc Majoral 2021-10-05 21:18:43 +02:00
parent 83ad19309b
commit 8e4a26887c

View File

@ -1493,6 +1493,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
auto **out = reinterpret_cast<Gnss_Synchro **>(&output_items[0]); auto **out = reinterpret_cast<Gnss_Synchro **>(&output_items[0]);
Gnss_Synchro current_synchro_data = Gnss_Synchro(); Gnss_Synchro current_synchro_data = Gnss_Synchro();
current_synchro_data.Flag_valid_symbol_output = false; current_synchro_data.Flag_valid_symbol_output = false;
bool loss_of_lock = false;
while ((!current_synchro_data.Flag_valid_symbol_output) && (!d_stop_tracking)) while ((!current_synchro_data.Flag_valid_symbol_output) && (!d_stop_tracking))
{ {
@ -1617,9 +1618,8 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
{ {
clear_tracking_vars(); clear_tracking_vars();
d_state = 1; // loss-of-lock detected d_state = 1; // loss-of-lock detected
loss_of_lock = true; // Set the flag so that the negative indication can be generated
// send something to let the scheduler know that it has to keep on calling general work and to finish the loop current_synchro_data = *d_acquisition_gnss_synchro; // Fill in the Gnss_Synchro object with basic info
// current_synchro_data.Flag_valid_symbol_output=1;
} }
else else
{ {
@ -1819,9 +1819,8 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
{ {
clear_tracking_vars(); clear_tracking_vars();
d_state = 1; // loss-of-lock detected d_state = 1; // loss-of-lock detected
loss_of_lock = true; // Set the flag so that the negative indication can be generated
// send something to let the scheduler know that it has to keep on calling general work and to finish the loop current_synchro_data = *d_acquisition_gnss_synchro; // Fill in the Gnss_Synchro object with basic info
// current_synchro_data.Flag_valid_symbol_output=1;
} }
else else
{ {
@ -1942,9 +1941,8 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
{ {
clear_tracking_vars(); clear_tracking_vars();
d_state = 1; // loss-of-lock detected d_state = 1; // loss-of-lock detected
loss_of_lock = true; // Set the flag so that the negative indication can be generated
// send something to let the scheduler know that it has to keep on calling general work and to finish the loop current_synchro_data = *d_acquisition_gnss_synchro; // Fill in the Gnss_Synchro object with basic info
// current_synchro_data.Flag_valid_symbol_output=1;
} }
else else
{ {
@ -1999,10 +1997,11 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
} }
} }
if (current_synchro_data.Flag_valid_symbol_output) if (current_synchro_data.Flag_valid_symbol_output || loss_of_lock)
{ {
current_synchro_data.fs = static_cast<int64_t>(d_trk_parameters.fs_in); current_synchro_data.fs = static_cast<int64_t>(d_trk_parameters.fs_in);
current_synchro_data.Tracking_sample_counter = d_sample_counter_next; // d_sample_counter; current_synchro_data.Tracking_sample_counter = d_sample_counter_next; // d_sample_counter;
current_synchro_data.Flag_valid_symbol_output = !loss_of_lock;
*out[0] = current_synchro_data; *out[0] = current_synchro_data;
return 1; return 1;
} }