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https://github.com/gnss-sdr/gnss-sdr
synced 2024-12-14 12:10:34 +00:00
Do not warn users twice about the overflow
clang-tidy checks applied: modernize-redundant-void-arg, performance-unnecessary-value-param
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29e3e120be
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@ -32,12 +32,14 @@
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#include <fstream> // for string, ofstream
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#include <iostream> // for cout
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#include <sys/mman.h> // for mmap
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#include <utility> // for move
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Fpga_buffer_monitor::Fpga_buffer_monitor(const std::string &device_name, uint32_t num_freq_bands, bool dump, std::string dump_filename)
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{
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d_num_freq_bands = num_freq_bands;
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d_dump = dump;
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d_dump_filename = dump_filename;
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d_dump_filename = std::move(dump_filename);
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// open device descriptor
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if ((d_device_descriptor = open(device_name.c_str(), O_RDWR | O_SYNC)) == -1)
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@ -144,7 +146,7 @@ Fpga_buffer_monitor::~Fpga_buffer_monitor()
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}
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void Fpga_buffer_monitor::check_buffer_overflow_and_monitor_buffer_status(void)
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void Fpga_buffer_monitor::check_buffer_overflow_and_monitor_buffer_status()
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{
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// check buffer overflow flags
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uint32_t buffer_overflow_status = d_map_base[overflow_flags_reg_addr];
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@ -153,12 +155,10 @@ void Fpga_buffer_monitor::check_buffer_overflow_and_monitor_buffer_status(void)
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{
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if (d_num_freq_bands > 1)
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{
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std::cout << "FPGA Buffer overflow in frequency band 0" << std::endl;
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LOG(ERROR) << "FPGA Buffer overflow in frequency band 0";
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}
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else
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{
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std::cout << "FPGA Buffer overflow" << std::endl;
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LOG(ERROR) << "FPGA Buffer overflow";
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}
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}
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@ -167,7 +167,6 @@ void Fpga_buffer_monitor::check_buffer_overflow_and_monitor_buffer_status(void)
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{
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if ((buffer_overflow_status & overflow_freq_band_1_bit_pos) != 0)
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{
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std::cout << "FPGA Buffer overflow in frequency band 1" << std::endl;
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LOG(ERROR) << "FPGA Buffer overflow in frequency band 1";
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}
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}
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@ -232,7 +231,7 @@ void Fpga_buffer_monitor::check_buffer_overflow_and_monitor_buffer_status(void)
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}
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int32_t Fpga_buffer_monitor::buffer_monitor_test_register(void)
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int32_t Fpga_buffer_monitor::buffer_monitor_test_register()
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{
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// write value to test register
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d_map_base[test_reg_addr] = test_register_writeval;
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@ -59,7 +59,7 @@ public:
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/*!
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* \brief This function checks buffer overflow and monitors the FPGA buffer status
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*/
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void check_buffer_overflow_and_monitor_buffer_status(void);
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void check_buffer_overflow_and_monitor_buffer_status();
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private:
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static const size_t FPGA_PAGE_SIZE = 0x10000;
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@ -79,8 +79,8 @@ private:
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static const uint32_t overflow_freq_band_0_bit_pos = 1;
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static const uint32_t overflow_freq_band_1_bit_pos = 2;
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int32_t buffer_monitor_test_register(void);
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void close_device(void);
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int32_t buffer_monitor_test_register();
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void close_device();
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volatile unsigned* d_map_base; // driver memory map corresponding to the FPGA buffer monitor
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int d_device_descriptor; // driver descriptor corresponding to the FPGA buffer monitor
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