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mirror of https://github.com/gnss-sdr/gnss-sdr synced 2025-02-05 21:50:09 +00:00

applied clang-format

This commit is contained in:
Marc Majoral 2019-07-19 11:55:53 +02:00
parent 8c84702f27
commit 8b0e170a56
12 changed files with 903 additions and 946 deletions

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@ -134,7 +134,6 @@ void pcps_acquisition_fpga::set_state(int32_t state)
void pcps_acquisition_fpga::send_positive_acquisition() void pcps_acquisition_fpga::send_positive_acquisition()
{ {
// debug L5 // debug L5
// d_gnss_synchro->Acq_delay_samples = 2694; // d_gnss_synchro->Acq_delay_samples = 2694;
// d_gnss_synchro->Acq_doppler_hz = 2650; // d_gnss_synchro->Acq_doppler_hz = 2650;
@ -183,9 +182,6 @@ void pcps_acquisition_fpga::send_positive_acquisition()
// d_gnss_synchro->Flag_valid_acquisition = 0; // d_gnss_synchro->Flag_valid_acquisition = 0;
// Declare positive acquisition using a message port // Declare positive acquisition using a message port
// 0=STOP_CHANNEL 1=ACQ_SUCCEES 2=ACQ_FAIL // 0=STOP_CHANNEL 1=ACQ_SUCCEES 2=ACQ_FAIL
DLOG(INFO) << "positive acquisition" DLOG(INFO) << "positive acquisition"

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@ -170,7 +170,6 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
if (trk_parameters.extend_correlation_symbols > 1) if (trk_parameters.extend_correlation_symbols > 1)
{ {
d_sc_demodulate_enabled = true; d_sc_demodulate_enabled = true;
} }
} }
if (trk_parameters.track_pilot) if (trk_parameters.track_pilot)
@ -255,7 +254,6 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
d_data_secondary_code_string = const_cast<std::string *>(&GALILEO_E5A_I_SECONDARY_CODE); d_data_secondary_code_string = const_cast<std::string *>(&GALILEO_E5A_I_SECONDARY_CODE);
// the pilot secondary code depends on PRN and it is initialized later // the pilot secondary code depends on PRN and it is initialized later
} }
else else
{ {
@ -463,8 +461,6 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
d_worker_is_done = false; d_worker_is_done = false;
d_stop_tracking = false; d_stop_tracking = false;
} }
void dll_pll_veml_tracking_fpga::msg_handler_telemetry_to_trk(const pmt::pmt_t &msg) void dll_pll_veml_tracking_fpga::msg_handler_telemetry_to_trk(const pmt::pmt_t &msg)
@ -524,12 +520,10 @@ void dll_pll_veml_tracking_fpga::start_tracking()
boost::mutex::scoped_lock lock(d_mutex); boost::mutex::scoped_lock lock(d_mutex);
d_worker_is_done = true; d_worker_is_done = true;
m_condition.notify_one(); m_condition.notify_one();
} }
dll_pll_veml_tracking_fpga::~dll_pll_veml_tracking_fpga() dll_pll_veml_tracking_fpga::~dll_pll_veml_tracking_fpga()
{ {
if (d_dump_file.is_open()) if (d_dump_file.is_open())
{ {
try try
@ -1360,7 +1354,6 @@ void dll_pll_veml_tracking_fpga::set_channel(uint32_t channel)
multicorrelator_fpga->set_secondary_code_lengths(d_secondary_code_length, d_data_secondary_code_length); multicorrelator_fpga->set_secondary_code_lengths(d_secondary_code_length, d_data_secondary_code_length);
multicorrelator_fpga->initialize_secondary_code(1, d_data_secondary_code_string); multicorrelator_fpga->initialize_secondary_code(1, d_data_secondary_code_string);
} }
} }
} }
} }
@ -1390,7 +1383,6 @@ void dll_pll_veml_tracking_fpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
{ {
d_Prompt_Data[0] = gr_complex(0.0, 0.0); d_Prompt_Data[0] = gr_complex(0.0, 0.0);
} }
} }
else if (systemName == "Galileo" and signal_type == "1B") else if (systemName == "Galileo" and signal_type == "1B")
{ {
@ -1403,8 +1395,6 @@ void dll_pll_veml_tracking_fpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
{ {
if (trk_parameters.track_pilot) if (trk_parameters.track_pilot)
{ {
d_secondary_code_string = const_cast<std::string *>(&GALILEO_E5A_Q_SECONDARY_CODE[d_acquisition_gnss_synchro->PRN - 1]); d_secondary_code_string = const_cast<std::string *>(&GALILEO_E5A_Q_SECONDARY_CODE[d_acquisition_gnss_synchro->PRN - 1]);
d_Prompt_Data[0] = gr_complex(0.0, 0.0); d_Prompt_Data[0] = gr_complex(0.0, 0.0);
@ -1472,9 +1462,6 @@ void dll_pll_veml_tracking_fpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
d_current_fpga_integration_period = 1; d_current_fpga_integration_period = 1;
d_current_extended_correlation_in_fpga = false; d_current_extended_correlation_in_fpga = false;
} }
} }
@ -1501,7 +1488,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
while ((!current_synchro_data.Flag_valid_symbol_output) && (!d_stop_tracking)) while ((!current_synchro_data.Flag_valid_symbol_output) && (!d_stop_tracking))
{ {
d_current_integration_length_samples = d_next_integration_length_samples; d_current_integration_length_samples = d_next_integration_length_samples;
if (d_pull_in_transitory == true) if (d_pull_in_transitory == true)
@ -1520,7 +1506,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
{ {
case 1: // Pull-in case 1: // Pull-in
{ {
d_worker_is_done = false; d_worker_is_done = false;
@ -1669,7 +1654,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
} }
else if (d_symbols_per_bit > 1) //Signal does not have secondary code. Search a bit transition by sign change else if (d_symbols_per_bit > 1) //Signal does not have secondary code. Search a bit transition by sign change
{ {
//******* preamble correlation ******** //******* preamble correlation ********
d_Prompt_circular_buffer.push_back(*d_Prompt); d_Prompt_circular_buffer.push_back(*d_Prompt);
if (d_Prompt_circular_buffer.size() == d_secondary_code_length) if (d_Prompt_circular_buffer.size() == d_secondary_code_length)
@ -1683,7 +1667,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
<< " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << std::endl; << " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << std::endl;
} }
} }
} }
else else
{ {
@ -1715,7 +1698,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
if (d_extended_correlation_in_fpga) if (d_extended_correlation_in_fpga)
{ {
d_current_fpga_integration_period = d_fpga_integration_period; d_current_fpga_integration_period = d_fpga_integration_period;
d_current_extended_correlation_in_fpga = true; d_current_extended_correlation_in_fpga = true;
@ -1833,7 +1815,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
// send something to let the scheduler know that it has to keep on calling general work and to finish the loop // send something to let the scheduler know that it has to keep on calling general work and to finish the loop
//current_synchro_data.Flag_valid_symbol_output=1; //current_synchro_data.Flag_valid_symbol_output=1;
} }
else else
{ {
@ -1880,7 +1861,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
// this must be computed for the secondary prn code // this must be computed for the secondary prn code
if (d_secondary) if (d_secondary)
{ {
uint32_t first_length_secondary_code = d_current_integration_length_samples - (d_fpga_integration_period - 1) * static_cast<int32_t>(std::floor(T_prn_samples)); uint32_t first_length_secondary_code = d_current_integration_length_samples - (d_fpga_integration_period - 1) * static_cast<int32_t>(std::floor(T_prn_samples));
uint32_t next_length_secondary_code = static_cast<int32_t>(std::floor(T_prn_samples)); uint32_t next_length_secondary_code = static_cast<int32_t>(std::floor(T_prn_samples));
@ -1945,7 +1925,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
// send something to let the scheduler know that it has to keep on calling general work and to finish the loop // send something to let the scheduler know that it has to keep on calling general work and to finish the loop
//current_synchro_data.Flag_valid_symbol_output=1; //current_synchro_data.Flag_valid_symbol_output=1;
} }
else else
{ {
@ -1983,8 +1962,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
{ {
d_state = 5; d_state = 5;
} }
} }
break; break;
} }
@ -1999,6 +1976,4 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
return 1; return 1;
} }
return 0; return 0;
} }

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@ -221,7 +221,6 @@ private:
boost::mutex d_mutex; boost::mutex d_mutex;
bool d_stop_tracking; bool d_stop_tracking;
}; };
#endif //GNSS_SDR_DLL_PLL_VEML_TRACKING_FPGA_H #endif //GNSS_SDR_DLL_PLL_VEML_TRACKING_FPGA_H

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@ -503,11 +503,6 @@ void Fpga_Multicorrelator_8sc::lock_channel(void)
void Fpga_Multicorrelator_8sc::set_secondary_code_lengths(uint32_t secondary_code_0_length, uint32_t secondary_code_1_length) void Fpga_Multicorrelator_8sc::set_secondary_code_lengths(uint32_t secondary_code_0_length, uint32_t secondary_code_1_length)
{ {
d_secondary_code_0_length = secondary_code_0_length; d_secondary_code_0_length = secondary_code_0_length;
d_secondary_code_1_length = secondary_code_1_length; d_secondary_code_1_length = secondary_code_1_length;
@ -529,10 +524,6 @@ void Fpga_Multicorrelator_8sc::update_secondary_code_length(uint32_t first_lengt
d_map_base[FIRST_PRN_LENGTH_MINUS_1_REG_ADDR] = first_length_secondary_code - 1; d_map_base[FIRST_PRN_LENGTH_MINUS_1_REG_ADDR] = first_length_secondary_code - 1;
d_map_base[NEXT_PRN_LENGTH_MINUS_1_REG_ADDR] = next_length_secondary_code - 1; d_map_base[NEXT_PRN_LENGTH_MINUS_1_REG_ADDR] = next_length_secondary_code - 1;
//std::cout << " first_length_secondary_code = " << first_length_secondary_code << " next_length_secondary_code = " << next_length_secondary_code << " sum = " << first_length_secondary_code + next_length_secondary_code << std::endl; //std::cout << " first_length_secondary_code = " << first_length_secondary_code << " next_length_secondary_code = " << next_length_secondary_code << " sum = " << first_length_secondary_code + next_length_secondary_code << std::endl;
} }
void Fpga_Multicorrelator_8sc::initialize_secondary_code(uint32_t secondary_code, std::string *secondary_code_string) void Fpga_Multicorrelator_8sc::initialize_secondary_code(uint32_t secondary_code, std::string *secondary_code_string)
@ -543,7 +534,6 @@ void Fpga_Multicorrelator_8sc::initialize_secondary_code(uint32_t secondary_code
{ {
secondary_code_length = d_secondary_code_0_length; secondary_code_length = d_secondary_code_0_length;
reg_addr = PROG_SECONDARY_CODE_0_DATA_REG_ADDR; reg_addr = PROG_SECONDARY_CODE_0_DATA_REG_ADDR;
} }
else else
{ {
@ -551,7 +541,6 @@ void Fpga_Multicorrelator_8sc::initialize_secondary_code(uint32_t secondary_code
reg_addr = PROG_SECONDARY_CODE_1_DATA_REG_ADDR; reg_addr = PROG_SECONDARY_CODE_1_DATA_REG_ADDR;
} }
Fpga_Multicorrelator_8sc::write_secondary_code(secondary_code_length, secondary_code_string, reg_addr); Fpga_Multicorrelator_8sc::write_secondary_code(secondary_code_length, secondary_code_string, reg_addr);
} }
@ -679,7 +668,6 @@ void Fpga_Multicorrelator_8sc::write_secondary_code(uint32_t secondary_code_leng
//std::cout << "write val = " << write_val << std::endl; //std::cout << "write val = " << write_val << std::endl;
pow_k = pow_k * 2; pow_k = pow_k * 2;
} }
// debug // debug
@ -745,4 +733,3 @@ void Fpga_Multicorrelator_8sc::disable_secondary_codes()
//printf("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx disabling secondary codes in fpga\n"); //printf("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx disabling secondary codes in fpga\n");
d_map_base[DROP_SAMPLES_REG_ADDR] = DROP_SAMPLES; d_map_base[DROP_SAMPLES_REG_ADDR] = DROP_SAMPLES;
} }