From 883cf629d1d865f25e9e784d19a10607a9e7571f Mon Sep 17 00:00:00 2001 From: Carles Fernandez Date: Sun, 20 Mar 2016 12:23:45 +0100 Subject: [PATCH] Adding new NEON protokernel Try another strategy based on multiply-and-accumulate for the dot product. In all SIMD protokernels, managing memory with volk_gnsssdr_malloc and volk_gnsssdr_free instead of calloc and free --- ...gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn.h | 246 +++++++++++++++--- 1 file changed, 215 insertions(+), 31 deletions(-) diff --git a/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn.h b/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn.h index 8f9c5ad37..cebacb8e3 100644 --- a/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn.h +++ b/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn.h @@ -71,8 +71,9 @@ #include #include +#include #include -#include +//#include #ifdef LV_HAVE_GENERIC @@ -184,13 +185,14 @@ static inline void volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn_a_sse3(lv_16sc_ __VOLK_ATTR_ALIGNED(16) lv_16sc_t dotProductVector[4]; - //todo dyn mem reg + __m128i* realcacc = (__m128i*)volk_gnsssdr_malloc(num_a_vectors * sizeof(__m128i), volk_gnsssdr_get_alignment()); + __m128i* imagcacc = (__m128i*)volk_gnsssdr_malloc(num_a_vectors * sizeof(__m128i), volk_gnsssdr_get_alignment()); - __m128i* realcacc; - __m128i* imagcacc; - - realcacc = (__m128i*)calloc(num_a_vectors, sizeof(__m128i)); //calloc also sets memory to 0 - imagcacc = (__m128i*)calloc(num_a_vectors, sizeof(__m128i)); //calloc also sets memory to 0 + for (int n_vec = 0; n_vec < num_a_vectors; n_vec++) + { + realcacc[n_vec] = _mm_setzero_si128(); + imagcacc[n_vec] = _mm_setzero_si128(); + } __m128i a, b, c, c_sr, mask_imag, mask_real, real, imag, imag1, imag2, b_sl, a_sl; @@ -308,8 +310,8 @@ static inline void volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn_a_sse3(lv_16sc_ } _out[n_vec] = dotProduct; } - free(realcacc); - free(imagcacc); + volk_gnsssdr_free(realcacc); + volk_gnsssdr_free(imagcacc); tmp1 = _mm_mul_ps(two_phase_acc_reg, two_phase_acc_reg); tmp2 = _mm_hadd_ps(tmp1, tmp1); @@ -356,13 +358,14 @@ static inline void volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn_a_sse3_reload(l __VOLK_ATTR_ALIGNED(16) lv_16sc_t dotProductVector[4]; - //todo dyn mem reg + __m128i* realcacc = (__m128i*)volk_gnsssdr_malloc(num_a_vectors * sizeof(__m128i), volk_gnsssdr_get_alignment()); + __m128i* imagcacc = (__m128i*)volk_gnsssdr_malloc(num_a_vectors * sizeof(__m128i), volk_gnsssdr_get_alignment()); - __m128i* realcacc; - __m128i* imagcacc; - - realcacc = (__m128i*)calloc(num_a_vectors, sizeof(__m128i)); //calloc also sets memory to 0 - imagcacc = (__m128i*)calloc(num_a_vectors, sizeof(__m128i)); //calloc also sets memory to 0 + for (int n_vec = 0; n_vec < num_a_vectors; n_vec++) + { + realcacc[n_vec] = _mm_setzero_si128(); + imagcacc[n_vec] = _mm_setzero_si128(); + } __m128i a, b, c, c_sr, mask_imag, mask_real, real, imag, imag1, imag2, b_sl, a_sl; @@ -550,8 +553,8 @@ static inline void volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn_a_sse3_reload(l _out[n_vec] = dotProduct; } - free(realcacc); - free(imagcacc); + volk_gnsssdr_free(realcacc); + volk_gnsssdr_free(imagcacc); tmp1 = _mm_mul_ps(two_phase_acc_reg, two_phase_acc_reg); tmp2 = _mm_hadd_ps(tmp1, tmp1); @@ -598,13 +601,14 @@ static inline void volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn_u_sse3(lv_16sc_ lv_16sc_t* _out = result; __VOLK_ATTR_ALIGNED(16) lv_16sc_t dotProductVector[4]; - //todo dyn mem reg + __m128i* realcacc = (__m128i*)volk_gnsssdr_malloc(num_a_vectors * sizeof(__m128i), volk_gnsssdr_get_alignment()); + __m128i* imagcacc = (__m128i*)volk_gnsssdr_malloc(num_a_vectors * sizeof(__m128i), volk_gnsssdr_get_alignment()); - __m128i* realcacc; - __m128i* imagcacc; - - realcacc = (__m128i*)calloc(num_a_vectors, sizeof(__m128i)); //calloc also sets memory to 0 - imagcacc = (__m128i*)calloc(num_a_vectors, sizeof(__m128i)); //calloc also sets memory to 0 + for (int n_vec = 0; n_vec < num_a_vectors; n_vec++) + { + realcacc[n_vec] = _mm_setzero_si128(); + imagcacc[n_vec] = _mm_setzero_si128(); + } __m128i a, b, c, c_sr, mask_imag, mask_real, real, imag, imag1, imag2, b_sl, a_sl; @@ -722,8 +726,8 @@ static inline void volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn_u_sse3(lv_16sc_ } _out[n_vec] = dotProduct; } - free(realcacc); - free(imagcacc); + volk_gnsssdr_free(realcacc); + volk_gnsssdr_free(imagcacc); _mm_storeu_ps((float*)two_phase_acc, two_phase_acc_reg); (*phase) = two_phase_acc[0]; @@ -792,8 +796,7 @@ static inline void volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn_neon(lv_16sc_t* float32x4x2_t tmp32f, tmp32_real, tmp32_imag; float32x4_t sign, PlusHalf, Round; - int16x4x2_t* accumulator; - accumulator = (int16x4x2_t*)calloc(num_a_vectors, sizeof(int16x4x2_t)); + int16x4x2_t* accumulator = (int16x4x2_t*)volk_gnsssdr_malloc(num_a_vectors * sizeof(int16x4x2_t), volk_gnsssdr_get_alignment()); for(int n_vec = 0; n_vec < num_a_vectors; n_vec++) { @@ -904,7 +907,7 @@ static inline void volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn_neon(lv_16sc_t* } _out[n_vec] = dotProduct; } - free(accumulator); + volk_gnsssdr_free(accumulator); vst1q_f32((float32_t*)__phase_real, _phase_real); vst1q_f32((float32_t*)__phase_imag, _phase_imag); @@ -976,8 +979,7 @@ static inline void volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn_neon_vma(lv_16s float32x4x2_t tmp32f, tmp32_real, tmp32_imag; float32x4_t sign, PlusHalf, Round; - int16x4x2_t* accumulator; - accumulator = (int16x4x2_t*)calloc(num_a_vectors, sizeof(int16x4x2_t)); + int16x4x2_t* accumulator = (int16x4x2_t*)volk_gnsssdr_malloc(num_a_vectors * sizeof(int16x4x2_t), volk_gnsssdr_get_alignment()); for(int n_vec = 0; n_vec < num_a_vectors; n_vec++) { @@ -1095,7 +1097,189 @@ static inline void volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn_neon_vma(lv_16s } _out[n_vec] = dotProduct; } - free(accumulator); + volk_gnsssdr_free(accumulator); + + vst1q_f32((float32_t*)__phase_real, _phase_real); + vst1q_f32((float32_t*)__phase_imag, _phase_imag); + + (*phase) = lv_cmake((float32_t)__phase_real[0], (float32_t)__phase_imag[0]); + } + + for (unsigned int n = neon_iters * 4; n < num_points; n++) + { + tmp16_ = in_common[n]; //printf("neon phase %i: %f,%f\n", n,lv_creal(*phase),lv_cimag(*phase)); + tmp32_ = lv_cmake((float32_t)lv_creal(tmp16_), (float32_t)lv_cimag(tmp16_)) * (*phase); + tmp16_ = lv_cmake((int16_t)rintf(lv_creal(tmp32_)), (int16_t)rintf(lv_cimag(tmp32_))); + (*phase) *= phase_inc; + for (int n_vec = 0; n_vec < num_a_vectors; n_vec++) + { + tmp = tmp16_ * in_a[n_vec][n]; + _out[n_vec] = lv_cmake(sat_adds16i(lv_creal(_out[n_vec]), lv_creal(tmp)), sat_adds16i(lv_cimag(_out[n_vec]), lv_cimag(tmp))); + } + } +} + +#endif /* LV_HAVE_NEON */ + + +#ifdef LV_HAVE_NEON +#include +#include + +static inline void volk_gnsssdr_16ic_x2_rotator_dot_prod_16ic_xn_neon_optvma(lv_16sc_t* result, const lv_16sc_t* in_common, const lv_32fc_t phase_inc, lv_32fc_t* phase, const lv_16sc_t** in_a, int num_a_vectors, unsigned int num_points) +{ + const unsigned int neon_iters = num_points / 4; + + const lv_16sc_t** _in_a = in_a; + const lv_16sc_t* _in_common = in_common; + lv_16sc_t* _out = result; + + lv_16sc_t tmp16_, tmp; + lv_32fc_t tmp32_; + + if (neon_iters > 0) + { + lv_16sc_t dotProduct = lv_cmake(0,0); + float arg_phase0 = cargf(*phase); + float arg_phase_inc = cargf(phase_inc); + float phase_est; + + lv_32fc_t ___phase4 = phase_inc * phase_inc * phase_inc * phase_inc; + __VOLK_ATTR_ALIGNED(16) float32_t __phase4_real[4] = { lv_creal(___phase4), lv_creal(___phase4), lv_creal(___phase4), lv_creal(___phase4) }; + __VOLK_ATTR_ALIGNED(16) float32_t __phase4_imag[4] = { lv_cimag(___phase4), lv_cimag(___phase4), lv_cimag(___phase4), lv_cimag(___phase4) }; + + float32x4_t _phase4_real = vld1q_f32(__phase4_real); + float32x4_t _phase4_imag = vld1q_f32(__phase4_imag); + + lv_32fc_t phase2 = (lv_32fc_t)(*phase) * phase_inc; + lv_32fc_t phase3 = phase2 * phase_inc; + lv_32fc_t phase4 = phase3 * phase_inc; + + __VOLK_ATTR_ALIGNED(16) float32_t __phase_real[4] = { lv_creal((*phase)), lv_creal(phase2), lv_creal(phase3), lv_creal(phase4) }; + __VOLK_ATTR_ALIGNED(16) float32_t __phase_imag[4] = { lv_cimag((*phase)), lv_cimag(phase2), lv_cimag(phase3), lv_cimag(phase4) }; + + float32x4_t _phase_real = vld1q_f32(__phase_real); + float32x4_t _phase_imag = vld1q_f32(__phase_imag); + + int16x4x2_t a_val, b_val; + __VOLK_ATTR_ALIGNED(16) lv_16sc_t dotProductVector[4]; + float32x4_t half = vdupq_n_f32(0.5f); + int32x4x2_t tmp32i; + + float32x4x2_t tmp32f, tmp32_real, tmp32_imag; + float32x4_t sign, PlusHalf, Round; + + int16x4x2_t* accumulator1 = (int16x4x2_t*)volk_gnsssdr_malloc(num_a_vectors * sizeof(int16x4x2_t), volk_gnsssdr_get_alignment()); + int16x4x2_t* accumulator2 = (int16x4x2_t*)volk_gnsssdr_malloc(num_a_vectors * sizeof(int16x4x2_t), volk_gnsssdr_get_alignment()); + + for(int n_vec = 0; n_vec < num_a_vectors; n_vec++) + { + accumulator1[n_vec].val[0] = vdup_n_s16(0); + accumulator1[n_vec].val[1] = vdup_n_s16(0); + accumulator2[n_vec].val[0] = vdup_n_s16(0); + accumulator2[n_vec].val[1] = vdup_n_s16(0); + } + + for(unsigned int number = 0; number < neon_iters; number++) + { + /* load 4 complex numbers (int 16 bits each component) */ + b_val = vld2_s16((int16_t*)_in_common); + __builtin_prefetch(_in_common + 8); + _in_common += 4; + + /* promote them to int 32 bits */ + tmp32i.val[0] = vmovl_s16(b_val.val[0]); + tmp32i.val[1] = vmovl_s16(b_val.val[1]); + + /* promote them to float 32 bits */ + tmp32f.val[0] = vcvtq_f32_s32(tmp32i.val[0]); + tmp32f.val[1] = vcvtq_f32_s32(tmp32i.val[1]); + + /* complex multiplication of four complex samples (float 32 bits each component) */ + tmp32_real.val[0] = vmulq_f32(tmp32f.val[0], _phase_real); + tmp32_real.val[1] = vmulq_f32(tmp32f.val[1], _phase_imag); + tmp32_imag.val[0] = vmulq_f32(tmp32f.val[0], _phase_imag); + tmp32_imag.val[1] = vmulq_f32(tmp32f.val[1], _phase_real); + + tmp32f.val[0] = vsubq_f32(tmp32_real.val[0], tmp32_real.val[1]); + tmp32f.val[1] = vaddq_f32(tmp32_imag.val[0], tmp32_imag.val[1]); + + /* downcast results to int32 */ + /* in __aarch64__ we can do that with vcvtaq_s32_f32(ret1); vcvtaq_s32_f32(ret2); */ + sign = vcvtq_f32_u32((vshrq_n_u32(vreinterpretq_u32_f32(tmp32f.val[0]), 31))); + PlusHalf = vaddq_f32(tmp32f.val[0], half); + Round = vsubq_f32(PlusHalf, sign); + tmp32i.val[0] = vcvtq_s32_f32(Round); + + sign = vcvtq_f32_u32((vshrq_n_u32(vreinterpretq_u32_f32(tmp32f.val[1]), 31))); + PlusHalf = vaddq_f32(tmp32f.val[1], half); + Round = vsubq_f32(PlusHalf, sign); + tmp32i.val[1] = vcvtq_s32_f32(Round); + + /* downcast results to int16 */ + b_val.val[0] = vqmovn_s32(tmp32i.val[0]); + b_val.val[1] = vqmovn_s32(tmp32i.val[1]); + + /* compute next four phases */ + tmp32_real.val[0] = vmulq_f32(_phase_real, _phase4_real); + tmp32_real.val[1] = vmulq_f32(_phase_imag, _phase4_imag); + tmp32_imag.val[0] = vmulq_f32(_phase_real, _phase4_imag); + tmp32_imag.val[1] = vmulq_f32(_phase_imag, _phase4_real); + + _phase_real = vsubq_f32(tmp32_real.val[0], tmp32_real.val[1]); + _phase_imag = vaddq_f32(tmp32_imag.val[0], tmp32_imag.val[1]); + + // Regenerate phase + if ((number % 256) == 0) + { + //printf("computed phase: %f\n", cos(cargf(lv_cmake(_phase_real[0],_phase_imag[0])))); + phase_est = arg_phase0 + (number + 1) * 4 * arg_phase_inc; + //printf("Estimated phase: %f\n\n", cos(phase_est)); + + *phase = lv_cmake(cos(phase_est), sin(phase_est)); + phase2 = (lv_32fc_t)(*phase) * phase_inc; + phase3 = phase2 * phase_inc; + phase4 = phase3 * phase_inc; + + __VOLK_ATTR_ALIGNED(16) float32_t ____phase_real[4] = { lv_creal((*phase)), lv_creal(phase2), lv_creal(phase3), lv_creal(phase4) }; + __VOLK_ATTR_ALIGNED(16) float32_t ____phase_imag[4] = { lv_cimag((*phase)), lv_cimag(phase2), lv_cimag(phase3), lv_cimag(phase4) }; + + _phase_real = vld1q_f32(____phase_real); + _phase_imag = vld1q_f32(____phase_imag); + } + + vst1q_f32((float32_t*)__phase_real, _phase_real); + vst1q_f32((float32_t*)__phase_imag, _phase_imag); + + for (int n_vec = 0; n_vec < num_a_vectors; n_vec++) + { + a_val = vld2_s16((int16_t*)&(_in_a[n_vec][number*4])); + + // use 2 accumulators to remove inter-instruction data dependencies + accumulator1[n_vec].val[0] = vmla_s16(accumulator1[n_vec].val[0], a_val.val[0], b_val.val[0]); + accumulator1[n_vec].val[1] = vmla_s16(accumulator1[n_vec].val[1], a_val.val[0], b_val.val[1]); + accumulator2[n_vec].val[0] = vmls_s16(accumulator2[n_vec].val[0], a_val.val[1], b_val.val[1]); + accumulator2[n_vec].val[1] = vmla_s16(accumulator2[n_vec].val[1], a_val.val[1], b_val.val[0]); + } + } + for (int n_vec = 0; n_vec < num_a_vectors; n_vec++) + { + accumulator1[n_vec].val[0] = vqadd_s16(accumulator1[n_vec].val[0], accumulator2[n_vec].val[0]); + accumulator1[n_vec].val[1] = vqadd_s16(accumulator1[n_vec].val[1], accumulator2[n_vec].val[1]); + } + for (int n_vec = 0; n_vec < num_a_vectors; n_vec++) + { + vst2_s16((int16_t*)dotProductVector, accumulator1[n_vec]); // Store the results back into the dot product vector + dotProduct = lv_cmake(0,0); + for (int i = 0; i < 4; ++i) + { + dotProduct = lv_cmake(sat_adds16i(lv_creal(dotProduct), lv_creal(dotProductVector[i])), + sat_adds16i(lv_cimag(dotProduct), lv_cimag(dotProductVector[i]))); + } + _out[n_vec] = dotProduct; + } + volk_gnsssdr_free(accumulator1); + volk_gnsssdr_free(accumulator2); vst1q_f32((float32_t*)__phase_real, _phase_real); vst1q_f32((float32_t*)__phase_imag, _phase_imag);