minor code optimizations + replaced #defines by constants in the tracking adapters

src/algorithms/tracking/adapters/galileo_e1_dll_pll_veml_tracking_fpga.cc

@@ -45,12 +45,6 @@
 #include <volk_gnsssdr/volk_gnsssdr.h>
 #include <array>
 
-// the following flags are FPGA-specific and they are using arrange the values of the local code in the way the FPGA
-// expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
-#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000      // flag that enables WE (Write Enable) of the local code FPGA
-#define LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT 0x20000000  // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
-
-
 GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
     ConfigurationInterface* configuration, const std::string& role,
     unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)

src/algorithms/tracking/adapters/galileo_e1_dll_pll_veml_tracking_fpga.h

@@ -98,6 +98,12 @@ public:
     void stop_tracking() override;
 
 private:
+
+    // the following flags are FPGA-specific and they are using arrange the values of the local code in the way the FPGA
+    // expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
+    static const int32_t LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY = 0x0C000000;      // flag that enables WE (Write Enable) of the local code FPGA
+    static const int32_t LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT = 0x20000000;  // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
+
     dll_pll_veml_tracking_fpga_sptr tracking_fpga_sc;
     size_t item_size_;
     uint32_t channel_;

src/algorithms/tracking/adapters/galileo_e5a_dll_pll_tracking_fpga.cc

@@ -40,12 +40,6 @@
 #include <volk_gnsssdr/volk_gnsssdr.h>
 #include <array>
 
-// the following flags are FPGA-specific and they are using arrange the values of the local code in the way the FPGA
-// expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
-#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000      // flag that enables WE (Write Enable) of the local code FPGA
-#define LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT 0x20000000  // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
-
-
 GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
     ConfigurationInterface *configuration, const std::string &role,
     unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)

src/algorithms/tracking/adapters/galileo_e5a_dll_pll_tracking_fpga.h

@@ -90,6 +90,13 @@ public:
     void stop_tracking() override;
 
 private:
+
+    // the following flags are FPGA-specific and they are using arrange the values of the local code in the way the FPGA
+    // expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
+    static const int32_t LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY = 0x0C000000;      // flag that enables WE (Write Enable) of the local code FPGA
+    static const int32_t LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT = 0x20000000;  // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
+
+
     dll_pll_veml_tracking_fpga_sptr tracking_fpga_sc;
     size_t item_size_;
     uint32_t channel_;

src/algorithms/tracking/adapters/gps_l1_ca_dll_pll_tracking_fpga.cc

@@ -45,13 +45,6 @@
 #include <volk_gnsssdr/volk_gnsssdr.h>
 #include <array>
 
-#define NUM_PRNs 32  // total number of PRNs
-#define GPS_CA_BIT_DURATION_MS 20
-#define GPS_CA_CODE_PERIOD_MS 1
-// the following flag is FPGA-specific and they are using arrange the values of the local code in the way the FPGA
-// expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
-#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000  // flag that enables WE (Write Enable) of the local code FPGA
-
 GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
     ConfigurationInterface* configuration, const std::string& role,
     unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)

src/algorithms/tracking/adapters/gps_l1_ca_dll_pll_tracking_fpga.h

@@ -96,6 +96,14 @@ public:
     void stop_tracking() override;
 
 private:
+
+	static const uint32_t NUM_PRNs = 32;  // total number of PRNs
+	static const int32_t GPS_CA_BIT_DURATION_MS = 20;
+	// the following flag is FPGA-specific and they are using arrange the values of the local code in the way the FPGA
+	// expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
+	static const int32_t LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY = 0x0C000000;  // flag that enables WE (Write Enable) of the local code FPGA
+
+
     dll_pll_veml_tracking_fpga_sptr tracking_fpga_sc;
     size_t item_size_;
     uint32_t channel_;

src/algorithms/tracking/adapters/gps_l2_m_dll_pll_tracking_fpga.cc

@@ -50,9 +50,6 @@
 #include <cstring>  // for memcpy
 #include <iostream>
 
-#define NUM_PRNs 32
-
-
 GpsL2MDllPllTrackingFpga::GpsL2MDllPllTrackingFpga(
     ConfigurationInterface* configuration, const std::string& role,
     unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)
@@ -126,7 +123,7 @@ GpsL2MDllPllTrackingFpga::GpsL2MDllPllTrackingFpga(
 
     //################# PRE-COMPUTE ALL THE CODES #################
     d_ca_codes = static_cast<int*>(volk_gnsssdr_malloc(static_cast<int>(GPS_L2_M_CODE_LENGTH_CHIPS * NUM_PRNs) * sizeof(int), volk_gnsssdr_get_alignment()));
-    for (unsigned int PRN = 1; PRN <= NUM_PRNs; PRN++)
+    for (uint32_t PRN = 1; PRN <= NUM_PRNs; PRN++)
         {
             gps_l2c_m_code_gen_float(gsl::span<float>(ca_codes_f, static_cast<unsigned int>(GPS_L2_M_CODE_LENGTH_CHIPS)), PRN);
             for (unsigned int s = 0; s < 2 * static_cast<unsigned int>(GPS_L2_M_CODE_LENGTH_CHIPS); s++)

src/algorithms/tracking/adapters/gps_l2_m_dll_pll_tracking_fpga.h

@@ -99,6 +99,7 @@ public:
     void stop_tracking() override;
 
 private:
+    static const uint32_t NUM_PRNs = 32;
     dll_pll_veml_tracking_fpga_sptr tracking_fpga_sc;
     unsigned int channel_;
     std::string role_;

src/algorithms/tracking/adapters/gps_l5_dll_pll_tracking_fpga.cc

@@ -49,12 +49,6 @@
 
 #define NUM_PRNs 32  // number of PRNS
 
-// the following flags are FPGA-specific and they are using arrange the values of the local code in the way the FPGA
-// expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
-#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000      // flag that enables WE (Write Enable) of the local code FPGA
-#define LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT 0x20000000  // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
-
-
 GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
     ConfigurationInterface *configuration, const std::string &role,
     unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)

src/algorithms/tracking/adapters/gps_l5_dll_pll_tracking_fpga.h

@@ -96,6 +96,12 @@ public:
     void stop_tracking() override;
 
 private:
+
+    // the following flags are FPGA-specific and they are using arrange the values of the local code in the way the FPGA
+    // expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
+    static const int32_t LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY = 0x0C000000;      // flag that enables WE (Write Enable) of the local code FPGA
+    static const int32_t LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT = 0x20000000;  // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
+
     dll_pll_veml_tracking_fpga_sptr tracking_fpga_sc;
     size_t item_size_;
     uint32_t channel_;

src/algorithms/tracking/gnuradio_blocks/dll_pll_veml_tracking_fpga.cc

@@ -1421,6 +1421,8 @@ void dll_pll_veml_tracking_fpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
             d_carrier_lock_test = 1.0;
             d_CN0_SNV_dB_Hz = 0.0;
 
+            d_code_phase_rate_step_chips = 0.0;
+
             if (d_veml)
                 {
                     d_local_code_shift_chips[0] = -trk_parameters.very_early_late_space_chips * static_cast<float>(d_code_samples_per_chip);
@@ -1461,6 +1463,10 @@ void dll_pll_veml_tracking_fpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
 
             d_current_fpga_integration_period = 1;
             d_current_extended_correlation_in_fpga = false;
+
+            d_cn0_smoother.reset();
+            d_carrier_lock_test_smoother.reset();
+
         }
 }
 
@@ -1517,10 +1523,10 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
                         int64_t acq_trk_diff_samples;
                         double acq_trk_diff_seconds;
                         double delta_trk_to_acq_prn_start_samples;
+                        uint64_t absolute_samples_offset;
 
                         multicorrelator_fpga->lock_channel();
                         uint64_t counter_value = multicorrelator_fpga->read_sample_counter();
-                        uint64_t absolute_samples_offset;
                         if (counter_value > (d_acq_sample_stamp + d_acq_code_phase_samples))
                             {
                                 // Signal alignment (skip samples until the incoming signal is aligned with local replica)
@@ -1546,7 +1552,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
                         multicorrelator_fpga->set_initial_sample(absolute_samples_offset);
                         //d_absolute_samples_offset = absolute_samples_offset;
                         d_sample_counter = absolute_samples_offset;
-                        current_synchro_data.Tracking_sample_counter = absolute_samples_offset;
                         d_sample_counter_next = d_sample_counter;
 
                         // Doppler effect Fd = (C / (C + Vr)) * F
@@ -1554,25 +1559,18 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
                         // new chip and PRN sequence periods based on acq Doppler
                         d_code_freq_chips = radial_velocity * d_code_chip_rate;
                         d_code_phase_step_chips = d_code_freq_chips / trk_parameters.fs_in;
-                        d_code_phase_rate_step_chips = 0.0;
 
                         d_acq_code_phase_samples = absolute_samples_offset;
 
-                        d_current_integration_length_samples = trk_parameters.vector_length;
-
-                        d_next_integration_length_samples = d_current_integration_length_samples;
-
                         int32_t samples_offset = round(d_acq_code_phase_samples);
                         d_acc_carrier_phase_rad -= d_carrier_phase_step_rad * static_cast<double>(samples_offset);
+
                         d_state = 2;
-                        d_cn0_smoother.reset();
-                        d_carrier_lock_test_smoother.reset();
 
                         LOG(INFO) << "Number of samples between Acquisition and Tracking = " << acq_trk_diff_samples << " ( " << acq_trk_diff_seconds << " s)";
                         DLOG(INFO) << "PULL-IN Doppler [Hz] = " << d_carrier_doppler_hz
                                    << ". PULL-IN Code Phase [samples] = " << d_acq_code_phase_samples;
 
-
                         //                // DEBUG OUTPUT
                         //                std::cout << "Tracking of " << systemName << " " << signal_pretty_name << " signal started on channel " << d_channel << " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << std::endl;
                         //                DLOG(INFO) << "Starting tracking of satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << " on channel " << d_channel;