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Code Issues Releases Wiki Activity

Fixes by clang-tidy, clang-format and codespell

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This commit is contained in:
Carles Fernandez 2019-07-26 13:58:15 +02:00
parent d818aacde4
commit 822185ff93
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GPG Key ID: 4C583C52B0C3877D
3 changed files with 9 additions and 9 deletions
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8
src/algorithms/acquisition/gnuradio_blocks/pcps_acquisition_fpga.h
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@ -44,10 +44,10 @@
#include "channel_fsm.h"
#include "fpga_acquisition.h"
#include <boost/shared_ptr.hpp>
#include <cstdint> // for uint32_t
#include <memory> // for shared_ptr
#include <string> // for string
#include <glog/logging.h>
#include <cstdint> // for uint32_t
#include <memory> // for shared_ptr
#include <string> // for string
class Gnss_Synchro;
@ -232,7 +232,7 @@ private:
std::weak_ptr<ChannelFsm> d_channel_fsm;
void send_negative_acquisition();
void send_positive_acquisition();
void acquisition_core(uint32_t num_doppler_bins, uint32_t doppler_step, int32_t doppler_max);
void acquisition_core(uint32_t num_doppler_bins, uint32_t doppler_step, int32_t doppler_min);
float first_vs_second_peak_statistic(uint32_t& indext, int32_t& doppler, uint32_t num_doppler_bins, int32_t doppler_max, int32_t doppler_step);
};

8
src/algorithms/tracking/gnuradio_blocks/dll_pll_veml_tracking_fpga.cc
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@ -600,8 +600,8 @@ bool dll_pll_veml_tracking_fpga::cn0_and_tracking_lock_status(double coh_integra
d_Prompt_buffer[d_cn0_estimation_counter++] = d_P_accu;
return true;
}
d_cn0_estimation_counter = 0;
d_Prompt_buffer[d_cn0_estimation_counter++] = d_P_accu;
d_cn0_estimation_counter = 0;
d_Prompt_buffer[d_cn0_estimation_counter++] = d_P_accu;
// Code lock indicator
float d_CN0_SNV_dB_Hz_raw = cn0_svn_estimator(d_Prompt_buffer.data(), trk_parameters.cn0_samples, static_cast<float>(coh_integration_time_s));
d_CN0_SNV_dB_Hz = d_cn0_smoother.smooth(d_CN0_SNV_dB_Hz_raw);
@ -794,7 +794,7 @@ void dll_pll_veml_tracking_fpga::update_tracking_vars()
//K_blk_samples = T_prn_samples + d_rem_code_phase_samples; // initially d_rem_code_phase_samples is zero. It is updated at the end of this function
K_blk_samples = T_prn_samples * d_current_fpga_integration_period + d_rem_code_phase_samples; // initially d_rem_code_phase_samples is zero. It is updated at the end of this function
int32_t actual_blk_length = static_cast<int32_t>(std::floor(K_blk_samples));
auto actual_blk_length = static_cast<int32_t>(std::floor(K_blk_samples));
//d_next_integration_length_samples = 2 * actual_blk_length - d_current_integration_length_samples;
d_next_integration_length_samples = actual_blk_length;
//################### PLL COMMANDS #################################################
@ -1593,7 +1593,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
d_P_accu = *d_Prompt;
d_L_accu = *d_Late;
//fail-safe: check if the secondary code or bit synchronization has not succedded in a limited time period
//fail-safe: check if the secondary code or bit synchronization has not succeeded in a limited time period
if (trk_parameters.bit_synchronization_time_limit_s < (d_sample_counter - d_acq_sample_stamp) / static_cast<int>(trk_parameters.fs_in))
{
d_carrier_lock_fail_counter = 300000; //force loss-of-lock condition

2
src/algorithms/tracking/libs/fpga_multicorrelator.h
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@ -141,7 +141,7 @@ public:
* code length and the measured PRN code length in the PRN immediately following the start of the coherent integration only.
* If this option is not used then write the same value to first_length_secondary_code and next_length_secondary_code.
*/
void update_prn_code_length(uint32_t first_length_secondary_code, uint32_t next_length_secondary_code);
void update_prn_code_length(uint32_t first_prn_length, uint32_t next_prn_length);
/*!
* \brief Enable the use of secondary codes in the FPGA