updated the FPGA tracking gnuradioblock according to the latest changes in the SW tracking gnuradioblock.

src/algorithms/tracking/gnuradio_blocks/dll_pll_veml_tracking_fpga.h

@@ -1,19 +1,13 @@
 /*!
- * \file gps_l1_ca_dll_pll_tracking_fpga.h
+ * \file dll_pll_veml_tracking.h
- * \brief Interface of a code DLL + carrier PLL tracking block
+ * \brief Implementation of a code DLL + carrier PLL tracking block.
  * \author Marc Majoral, 2018. marc.majoral(at)cttc.es
- *         Carlos Aviles, 2010. carlos.avilesr(at)googlemail.com
+ * \author Javier Arribas, 2018. jarribas(at)cttc.es
- *         Javier Arribas, 2011. jarribas(at)cttc.es
+ * \author Antonio Ramos, 2018 antonio.ramosdet(at)gmail.com
- *         Cillian O'Driscoll, 2017. cillian.odriscoll(at)gmail.com
- *
- * Code DLL + carrier PLL according to the algorithms described in:
- * K.Borre, D.M.Akos, N.Bertelsen, P.Rinder, and S.H.Jensen,
- * A Software-Defined GPS and Galileo Receiver. A Single-Frequency Approach,
- * Birkhauser, 2007
  *
  * -------------------------------------------------------------------------
  *
- * Copyright (C) 2010-2015  (see AUTHORS file for a list of contributors)
+ * Copyright (C) 2010-2018  (see AUTHORS file for a list of contributors)
  *
  * GNSS-SDR is a software defined Global Navigation
  *          Satellite Systems receiver
@@ -31,7 +25,7 @@
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
- * along with GNSS-SDR. If not, see <http://www.gnu.org/licenses/>.
+ * along with GNSS-SDR. If not, see <https://www.gnu.org/licenses/>.
  *
  * -------------------------------------------------------------------------
  */
@@ -49,19 +43,18 @@
 #include <string>
 #include <map>
 #include <queue>
+#include <utility>
 #include <boost/circular_buffer.hpp>
-#include "fpga_multicorrelator.h"
 
 class dll_pll_veml_tracking_fpga;
 
-typedef boost::shared_ptr<dll_pll_veml_tracking_fpga>
+typedef boost::shared_ptr<dll_pll_veml_tracking_fpga> dll_pll_veml_tracking_fpga_sptr;
-    dll_pll_veml_tracking_fpga_sptr;
 
 dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(const Dll_Pll_Conf_Fpga &conf_);
 
 
 /*!
- * \brief This class implements a DLL + PLL tracking loop block
+ * \brief This class implements a code DLL + carrier PLL tracking block.
  */
 class dll_pll_veml_tracking_fpga : public gr::block
 {
@@ -72,6 +65,7 @@ public:
     void set_gnss_synchro(Gnss_Synchro *p_gnss_synchro);
     void start_tracking();
     void stop_tracking();
+
     int general_work(int noutput_items, gr_vector_int &ninput_items,
         gr_vector_const_void_star &input_items, gr_vector_void_star &output_items);
 
@@ -85,6 +79,8 @@ private:
 
     bool cn0_and_tracking_lock_status(double coh_integration_time_s);
     bool acquire_secondary();
+    //void do_correlation_step(const gr_complex *input_samples);
+    void do_correlation_step(void);
     void run_dll_pll();
     void update_tracking_vars();
     void clear_tracking_vars();
@@ -94,7 +90,6 @@ private:
 
     // tracking configuration vars
     Dll_Pll_Conf_Fpga trk_parameters;
-    //dllpllconf_fpga_t trk_parameters;
     bool d_veml;
     bool d_cloop;
     uint32_t d_channel;
@@ -120,14 +115,20 @@ private:
 
     //tracking state machine
     int32_t d_state;
-    bool d_synchonizing;
     //Integration period in samples
     int32_t d_correlation_length_ms;
     int32_t d_n_correlator_taps;
+
+    float *d_tracking_code;
+    float *d_data_code;
     float *d_local_code_shift_chips;
     float *d_prompt_data_shift;
     std::shared_ptr<fpga_multicorrelator_8sc> multicorrelator_fpga;
-
+    /*  TODO: currently the multicorrelator does not support adding extra correlator
+        with different local code, thus we need extra multicorrelator instance.
+        Implement this functionality inside multicorrelator class
+        as an enhancement to increase the performance
+     */
     gr_complex *d_correlator_outs;
     gr_complex *d_Very_Early;
     gr_complex *d_Early;
@@ -149,10 +150,14 @@ private:
     gr_complex *d_Prompt_Data;
 
     double d_code_phase_step_chips;
+    double d_code_phase_rate_step_chips;
+    boost::circular_buffer<std::pair<double, double>> d_code_ph_history;
     double d_carrier_phase_step_rad;
+    double d_carrier_phase_rate_step_rad;
+    boost::circular_buffer<std::pair<double, double>> d_carr_ph_history;
     // remaining code phase and carrier phase between tracking loops
     double d_rem_code_phase_samples;
-    double d_rem_carr_phase_rad;
+    float d_rem_carr_phase_rad;
 
     // PLL and DLL filter library
     Tracking_2nd_DLL_filter d_code_loop_filter;
@@ -167,12 +172,10 @@ private:
     double d_carr_error_filt_hz;
     double d_code_error_chips;
     double d_code_error_filt_chips;
-    double d_K_blk_samples;
     double d_code_freq_chips;
     double d_carrier_doppler_hz;
     double d_acc_carrier_phase_rad;
     double d_rem_code_phase_chips;
-    double d_code_phase_samples;
     double T_chip_seconds;
     double T_prn_seconds;
     double T_prn_samples;
@@ -182,11 +185,13 @@ private:
     // processing samples counters
     uint64_t d_sample_counter;
     uint64_t d_acq_sample_stamp;
+
     uint64_t d_absolute_samples_offset;
 
     // CN0 estimation and lock detector
     int32_t d_cn0_estimation_counter;
     int32_t d_carrier_lock_fail_counter;
+    std::deque<float> d_carrier_lock_detector_queue;
     double d_carrier_lock_test;
     double d_CN0_SNV_dB_Hz;
     double d_carrier_lock_threshold;
@@ -203,7 +208,6 @@ private:
     int32_t d_correlation_length_samples;
     int32_t d_next_prn_length_samples;
     uint64_t d_sample_counter_next;
-    uint32_t d_pull_in = 0U;
 };
 
 #endif  //GNSS_SDR_DLL_PLL_VEML_TRACKING_FPGA_H

src/algorithms/tracking/libs/dll_pll_conf_fpga.cc

@@ -36,12 +36,14 @@
 Dll_Pll_Conf_Fpga::Dll_Pll_Conf_Fpga()
 {
     /* DLL/PLL tracking configuration */
+	high_dyn = false;
+	smoother_length = 10;
     fs_in = 0.0;
     vector_length = 0U;
     dump = false;
     dump_mat = true;
     dump_filename = std::string("./dll_pll_dump.dat");
-    pll_bw_hz = 40.0;
+    pll_bw_hz = 35.0;
     dll_bw_hz = 2.0;
     pll_bw_narrow_hz = 5.0;
     dll_bw_narrow_hz = 0.75;

src/algorithms/tracking/libs/dll_pll_conf_fpga.h

@@ -54,9 +54,11 @@ public:
     float early_late_space_narrow_chips;
     float very_early_late_space_narrow_chips;
     int32_t extend_correlation_symbols;
+    bool high_dyn;
     int32_t cn0_samples;
     int32_t cn0_min;
     int32_t max_lock_fail;
+    uint32_t smoother_length;
     double carrier_lock_th;
     bool track_pilot;
     char system;

src/algorithms/tracking/libs/fpga_multicorrelator.cc

@@ -131,7 +131,9 @@ void fpga_multicorrelator_8sc::update_local_code(float rem_code_phase_chips)
 
 void fpga_multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler(
     float rem_carrier_phase_in_rad, float phase_step_rad,
+	float carrier_phase_rate_step_rad,
     float rem_code_phase_chips, float code_phase_step_chips,
+	float code_phase_rate_step_chips,
     int32_t signal_length_samples)
 {
     update_local_code(rem_code_phase_chips);

src/algorithms/tracking/libs/fpga_multicorrelator.h

@@ -66,7 +66,9 @@ public:
     //bool Carrier_wipeoff_multicorrelator_resampler(
     void Carrier_wipeoff_multicorrelator_resampler(
         float rem_carrier_phase_in_rad, float phase_step_rad,
+		float carrier_phase_rate_step_rad,
         float rem_code_phase_chips, float code_phase_step_chips,
+		float code_phase_rate_step_chips,
         int32_t signal_length_samples);
     bool free();
     void set_channel(uint32_t channel);