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Merge branch 'mmajoral-fix_FPGA_IP_address_ranges' into next

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This commit is contained in:
Carles Fernandez 2022-05-07 11:36:08 +02:00
commit 7cc72faee8
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14 changed files with 310 additions and 81 deletions
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4
src/algorithms/acquisition/libs/fpga_acquisition.cc
View File

@ -101,7 +101,7 @@ void Fpga_Acquisition::open_device()
LOG(WARNING) << "Cannot open deviceio" << d_device_name; LOG(WARNING) << "Cannot open deviceio" << d_device_name;
std::cout << "Acq: cannot open deviceio" << d_device_name << '\n'; std::cout << "Acq: cannot open deviceio" << d_device_name << '\n';
} }
d_map_base = reinterpret_cast<volatile uint32_t *>(mmap(nullptr, PAGE_SIZE_DEFAULT, d_map_base = reinterpret_cast<volatile uint32_t *>(mmap(nullptr, FPGA_PAGE_SIZE,
PROT_READ | PROT_WRITE, MAP_SHARED, d_fd, 0)); PROT_READ | PROT_WRITE, MAP_SHARED, d_fd, 0));
if (d_map_base == reinterpret_cast<void *>(-1)) if (d_map_base == reinterpret_cast<void *>(-1))
@ -227,7 +227,7 @@ void Fpga_Acquisition::read_acquisition_results(uint32_t *max_index,
void Fpga_Acquisition::close_device() void Fpga_Acquisition::close_device()
{ {
auto *aux = const_cast<uint32_t *>(d_map_base); auto *aux = const_cast<uint32_t *>(d_map_base);
if (munmap(static_cast<void *>(aux), PAGE_SIZE_DEFAULT) == -1) if (munmap(static_cast<void *>(aux), FPGA_PAGE_SIZE) == -1)
{ {
std::cout << "Failed to unmap memory uio\n"; std::cout << "Failed to unmap memory uio\n";
} }

2
src/algorithms/acquisition/libs/fpga_acquisition.h
View File

@ -142,7 +142,7 @@ public:
private: private:
// FPGA register parameters // FPGA register parameters
static const uint32_t PAGE_SIZE_DEFAULT = 0x10000; // default page size for the multicorrelator memory map static const uint32_t FPGA_PAGE_SIZE = 0x1000; // default page size for the multicorrelator memory map
static const uint32_t LAUNCH_ACQUISITION = 1; // command to launch the acquisition process static const uint32_t LAUNCH_ACQUISITION = 1; // command to launch the acquisition process
static const uint32_t RESET_ACQUISITION = 2; // command to reset the acquisition and the FPGA Modules static const uint32_t RESET_ACQUISITION = 2; // command to reset the acquisition and the FPGA Modules
static const uint32_t STOP_ACQUISITION = 4; // command to stop the acquisition and the FPGA modules static const uint32_t STOP_ACQUISITION = 4; // command to stop the acquisition and the FPGA modules

121
src/algorithms/signal_source/adapters/ad9361_fpga_signal_source.cc
View File

@ -56,6 +56,7 @@ Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *con
gain_mode_rx2_(configuration->property(role + ".gain_mode_rx2", default_gain_mode)), gain_mode_rx2_(configuration->property(role + ".gain_mode_rx2", default_gain_mode)),
rf_port_select_(configuration->property(role + ".rf_port_select", default_rf_port_select)), rf_port_select_(configuration->property(role + ".rf_port_select", default_rf_port_select)),
filter_filename_(configuration->property(role + ".filter_filename", filter_file_)), filter_filename_(configuration->property(role + ".filter_filename", filter_file_)),
filename0_(configuration->property(role + ".filename", empty_string)),
rf_gain_rx1_(configuration->property(role + ".gain_rx1", default_manual_gain_rx1)), rf_gain_rx1_(configuration->property(role + ".gain_rx1", default_manual_gain_rx1)),
rf_gain_rx2_(configuration->property(role + ".gain_rx1", default_manual_gain_rx2)), rf_gain_rx2_(configuration->property(role + ".gain_rx1", default_manual_gain_rx2)),
freq_(configuration->property(role + ".freq", static_cast<uint64_t>(GPS_L1_FREQ_HZ))), freq_(configuration->property(role + ".freq", static_cast<uint64_t>(GPS_L1_FREQ_HZ))),
@ -109,18 +110,23 @@ Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *con
// override value with commandline flag, if present // override value with commandline flag, if present
if (FLAGS_signal_source != "-") if (FLAGS_signal_source != "-")
{ {
filename0 = FLAGS_signal_source; filename0_ = FLAGS_signal_source;
} }
if (FLAGS_s != "-") if (FLAGS_s != "-")
{ {
filename0 = FLAGS_s; filename0_ = FLAGS_s;
} }
if (filename0_.empty())
{
filename0_ = configuration->property(role + ".filename0", empty_string);
filename1_ = configuration->property(role + ".filename1", empty_string);
}
// if only one input file is specified in the configuration file then: // if only one input file is specified in the configuration file then:
// if there is at least one channel assigned to frequency band 1 then the DMA transfers the samples to the L1 frequency band channels // if there is at least one channel assigned to frequency band 1 then the DMA transfers the samples to the L1 frequency band channels
// otherwise the DMA transfers the samples to the L2/L5 frequency band channels // otherwise the DMA transfers the samples to the L2/L5 frequency band channels
// if more than one input file are specified then the DMA transfer the samples to both the L1 and the L2/L5 frequency channels. // if more than one input file are specified then the DMA transfer the samples to both the L1 and the L2/L5 frequency channels.
if (filename1.empty()) if (filename1_.empty())
{ {
num_freq_bands_ = 1; num_freq_bands_ = 1;
if (l1_band != 0) if (l1_band != 0)
@ -172,7 +178,7 @@ Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *con
* A possible solution is to compute the file length in samples using file size, excluding the last 100 milliseconds, and enable always the * A possible solution is to compute the file length in samples using file size, excluding the last 100 milliseconds, and enable always the
* valve block * valve block
*/ */
std::ifstream file(filename0.c_str(), std::ios::in | std::ios::binary | std::ios::ate); std::ifstream file(filename0_.c_str(), std::ios::in | std::ios::binary | std::ios::ate);
std::ifstream::pos_type size; std::ifstream::pos_type size;
if (file.is_open()) if (file.is_open())
@ -182,13 +188,13 @@ Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *con
} }
else else
{ {
std::cerr << "SignalSource: Unable to open the samples file " << filename0.c_str() << '\n'; std::cerr << "SignalSource: Unable to open the samples file " << filename0_.c_str() << '\n';
item_size_ = 0; item_size_ = 0;
return; return;
} }
std::streamsize ss = std::cout.precision(); std::streamsize ss = std::cout.precision();
std::cout << std::setprecision(16); std::cout << std::setprecision(16);
std::cout << "Processing file " << filename0 << ", which contains " << static_cast<double>(size) << " [bytes]\n"; std::cout << "Processing file " << filename0_ << ", which contains " << static_cast<double>(size) << " [bytes]\n";
std::cout.precision(ss); std::cout.precision(ss);
if (size > 0) if (size > 0)
@ -198,9 +204,9 @@ Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *con
samples_ = floor(static_cast<double>(bytes_to_process) / static_cast<double>(item_size_) - ceil(0.002 * static_cast<double>(sample_rate_))); // process all the samples available in the file excluding at least the last 1 ms samples_ = floor(static_cast<double>(bytes_to_process) / static_cast<double>(item_size_) - ceil(0.002 * static_cast<double>(sample_rate_))); // process all the samples available in the file excluding at least the last 1 ms
} }
if (!filename1.empty()) if (!filename1_.empty())
{ {
std::ifstream file(filename1.c_str(), std::ios::in | std::ios::binary | std::ios::ate); std::ifstream file(filename1_.c_str(), std::ios::in | std::ios::binary | std::ios::ate);
std::ifstream::pos_type size; std::ifstream::pos_type size;
if (file.is_open()) if (file.is_open())
@ -210,13 +216,13 @@ Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *con
} }
else else
{ {
std::cerr << "SignalSource: Unable to open the samples file " << filename1.c_str() << '\n'; std::cerr << "SignalSource: Unable to open the samples file " << filename1_.c_str() << '\n';
item_size_ = 0; item_size_ = 0;
return; return;
} }
std::streamsize ss = std::cout.precision(); std::streamsize ss = std::cout.precision();
std::cout << std::setprecision(16); std::cout << std::setprecision(16);
std::cout << "Processing file " << filename1 << ", which contains " << static_cast<double>(size) << " [bytes]\n"; std::cout << "Processing file " << filename1_ << ", which contains " << static_cast<double>(size) << " [bytes]\n";
std::cout.precision(ss); std::cout.precision(ss);
int64_t samples_rx2 = 0; int64_t samples_rx2 = 0;
@ -236,14 +242,14 @@ Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *con
DLOG(INFO) << "Total number samples to be processed= " << samples_ << " GNSS signal duration= " << signal_duration_s << " [s]"; DLOG(INFO) << "Total number samples to be processed= " << samples_ << " GNSS signal duration= " << signal_duration_s << " [s]";
std::cout << "GNSS signal recorded time to be processed: " << signal_duration_s << " [s]\n"; std::cout << "GNSS signal recorded time to be processed: " << signal_duration_s << " [s]\n";
if (filename1.empty()) if (filename1_.empty())
{ {
DLOG(INFO) << "File source filename " << filename0; DLOG(INFO) << "File source filename " << filename0_;
} }
else else
{ {
DLOG(INFO) << "File source filename rx1 " << filename0; DLOG(INFO) << "File source filename rx1 " << filename0_;
DLOG(INFO) << "File source filename rx2 " << filename1; DLOG(INFO) << "File source filename rx2 " << filename1_;
} }
DLOG(INFO) << "Samples " << samples_; DLOG(INFO) << "Samples " << samples_;
DLOG(INFO) << "Sampling frequency " << sample_rate_; DLOG(INFO) << "Sampling frequency " << sample_rate_;
@ -521,39 +527,43 @@ Ad9361FpgaSignalSource::~Ad9361FpgaSignalSource()
void Ad9361FpgaSignalSource::start() void Ad9361FpgaSignalSource::start()
{ {
thread_file_to_dma = std::thread([&] { run_DMA_process(filename0, filename1, samples_to_skip_, item_size_, samples_, repeat_, dma_buff_offset_pos_, queue_); }); thread_file_to_dma = std::thread([&] { run_DMA_process(filename0_, filename1_, samples_to_skip_, item_size_, samples_, repeat_, dma_buff_offset_pos_, queue_); });
} }
void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const std::string &filename1, uint64_t &samples_to_skip, size_t &item_size, int64_t &samples, bool &repeat, uint32_t &dma_buff_offset_pos, Concurrent_Queue<pmt::pmt_t> *queue) void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0_, const std::string &filename1_, uint64_t &samples_to_skip, size_t &item_size, int64_t &samples, bool &repeat, uint32_t &dma_buff_offset_pos, Concurrent_Queue<pmt::pmt_t> *queue)
{ {
std::ifstream infile1; std::ifstream infile1;
infile1.exceptions(std::ifstream::failbit | std::ifstream::badbit); infile1.exceptions(std::ifstream::failbit | std::ifstream::badbit);
// FPGA DMA control
dma_fpga = std::make_shared<Fpga_DMA>();
// open the files // open the files
try try
{ {
infile1.open(filename0, std::ios::binary); infile1.open(filename0_, std::ios::binary);
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception opening file " << filename0 << '\n'; std::cerr << "Exception opening file " << filename0_ << '\n';
// stop the receiver // stop the receiver
queue->push(pmt::make_any(command_event_make(200, 0))); queue->push(pmt::make_any(command_event_make(200, 0)));
return; return;
} }
std::ifstream infile2; std::ifstream infile2;
if (!filename1.empty()) if (!filename1_.empty())
{ {
infile2.exceptions(std::ifstream::failbit | std::ifstream::badbit); infile2.exceptions(std::ifstream::failbit | std::ifstream::badbit);
try try
{ {
infile2.open(filename1, std::ios::binary); infile2.open(filename1_, std::ios::binary);
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception opening file " << filename1 << '\n'; std::cerr << "Exception opening file " << filename1_ << '\n';
// stop the receiver // stop the receiver
queue->push(pmt::make_any(command_event_make(200, 0))); queue->push(pmt::make_any(command_event_make(200, 0)));
return; return;
@ -568,13 +578,13 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception skipping initial samples file " << filename0 << '\n'; std::cerr << "Exception skipping initial samples file " << filename0_ << '\n';
// stop the receiver // stop the receiver
queue->push(pmt::make_any(command_event_make(200, 0))); queue->push(pmt::make_any(command_event_make(200, 0)));
return; return;
} }
if (!filename1.empty()) if (!filename1_.empty())
{ {
try try
{ {
@ -582,7 +592,7 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception skipping initial samples file " << filename1 << '\n'; std::cerr << "Exception skipping initial samples file " << filename1_ << '\n';
// stop the receiver // stop the receiver
queue->push(pmt::make_any(command_event_make(200, 0))); queue->push(pmt::make_any(command_event_make(200, 0)));
return; return;
@ -591,37 +601,20 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
// rx signal vectors // rx signal vectors
std::vector<int8_t> input_samples(sample_block_size * 2); // complex samples std::vector<int8_t> input_samples(sample_block_size * 2); // complex samples
std::vector<int8_t> input_samples_dma(sample_block_size * 4); // complex samples, two frequency bands // pointer to DMA buffer
std::array<int8_t, BUFFER_SIZE> *dma_buffer;
int nread_elements = 0; // num bytes read from the file corresponding to frequency band 1 int nread_elements = 0; // num bytes read from the file corresponding to frequency band 1
bool run_DMA = true; bool run_DMA = true;
int num_transferred_bytes;
// Open DMA device // Open DMA device
int tx_fd = open("/dev/loop_tx", O_WRONLY); if (dma_fpga->DMA_open())
if (tx_fd < 0)
{
std::cerr << "Cannot open loop device\n";
// stop the receiver
queue->push(pmt::make_any(command_event_make(200, 0)));
return;
}
// note: a problem was identified with the DMA: when switching from tx to rx or rx to tx mode
// the DMA transmission may hang. This problem will be fixed soon.
// for the moment this problem can be avoided by closing and opening the DMA a second time
if (close(tx_fd) < 0)
{
std::cerr << "Error closing loop device " << '\n';
}
// open the DMA a second time
tx_fd = open("/dev/loop_tx", O_WRONLY);
if (tx_fd < 0)
{ {
std::cerr << "Cannot open loop device\n"; std::cerr << "Cannot open loop device\n";
// stop the receiver // stop the receiver
queue->push(pmt::make_any(command_event_make(200, 0))); queue->push(pmt::make_any(command_event_make(200, 0)));
return; return;
} }
dma_buffer = dma_fpga->get_buffer_address();
// if only one frequency band is used then clear the samples corresponding to the unused frequency band // if only one frequency band is used then clear the samples corresponding to the unused frequency band
uint32_t dma_index = 0; uint32_t dma_index = 0;
@ -630,8 +623,8 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
// if only one file is enabled then clear the samples corresponding to the frequency band that is not used. // if only one file is enabled then clear the samples corresponding to the frequency band that is not used.
for (int index0 = 0; index0 < (nread_elements); index0 += 2) for (int index0 = 0; index0 < (nread_elements); index0 += 2)
{ {
input_samples_dma[dma_index + (2 - dma_buff_offset_pos)] = 0; (*dma_buffer)[dma_index + (2 - dma_buff_offset_pos)] = 0;
input_samples_dma[dma_index + 1 + (2 - dma_buff_offset_pos)] = 0; (*dma_buffer)[dma_index + 1 + (2 - dma_buff_offset_pos)] = 0;
dma_index += 4; dma_index += 4;
} }
} }
@ -656,7 +649,7 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception reading file " << filename0 << '\n'; std::cerr << "Exception reading file " << filename0_ << '\n';
break; break;
} }
if (infile1) if (infile1)
@ -672,8 +665,8 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
for (int index0 = 0; index0 < (nread_elements); index0 += 2) for (int index0 = 0; index0 < (nread_elements); index0 += 2)
{ {
// dma_buff_offset_pos is 1 for the L1 band and 0 for the other bands // dma_buff_offset_pos is 1 for the L1 band and 0 for the other bands
input_samples_dma[dma_index + dma_buff_offset_pos] = input_samples[index0]; (*dma_buffer)[dma_index + dma_buff_offset_pos] = input_samples[index0];
input_samples_dma[dma_index + 1 + dma_buff_offset_pos] = input_samples[index0 + 1]; (*dma_buffer)[dma_index + 1 + dma_buff_offset_pos] = input_samples[index0 + 1];
dma_index += 4; dma_index += 4;
} }
@ -687,7 +680,7 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception reading file " << filename1 << '\n'; std::cerr << "Exception reading file " << filename1_ << '\n';
break; break;
} }
if (infile2) if (infile2)
@ -703,22 +696,19 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
for (int index0 = 0; index0 < (nread_elements); index0 += 2) for (int index0 = 0; index0 < (nread_elements); index0 += 2)
{ {
// filename2 is never the L1 band // filename2 is never the L1 band
input_samples_dma[dma_index] = input_samples[index0]; (*dma_buffer)[dma_index] = input_samples[index0];
input_samples_dma[dma_index + 1] = input_samples[index0 + 1]; (*dma_buffer)[dma_index + 1] = input_samples[index0 + 1];
dma_index += 4; dma_index += 4;
} }
} }
if (nread_elements > 0) if (nread_elements > 0)
{ {
num_transferred_bytes = nread_elements * 2; if (dma_fpga->DMA_write(nread_elements * 2))
const int num_bytes_sent = write(tx_fd, input_samples_dma.data(), nread_elements * 2);
if (num_bytes_sent != num_transferred_bytes)
{ {
std::cerr << "Error: DMA could not send all the required samples\n"; std::cerr << "Error: DMA could not send all the required samples\n";
break; break;
} }
// Throttle the DMA // Throttle the DMA
std::this_thread::sleep_for(std::chrono::milliseconds(1)); std::this_thread::sleep_for(std::chrono::milliseconds(1));
} }
@ -736,7 +726,7 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception resetting the position of the next byte to be extracted to zero " << filename0 << '\n'; std::cerr << "Exception resetting the position of the next byte to be extracted to zero " << filename0_ << '\n';
break; break;
} }
@ -748,11 +738,11 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception skipping initial samples file " << filename0 << '\n'; std::cerr << "Exception skipping initial samples file " << filename0_ << '\n';
break; break;
} }
if (!filename1.empty()) if (!filename1_.empty())
{ {
try try
{ {
@ -760,7 +750,7 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception setting the position of the next byte to be extracted to zero " << filename1 << '\n'; std::cerr << "Exception setting the position of the next byte to be extracted to zero " << filename1_ << '\n';
break; break;
} }
@ -770,7 +760,7 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception skipping initial samples file " << filename1 << '\n'; std::cerr << "Exception skipping initial samples file " << filename1_ << '\n';
break; break;
} }
} }
@ -789,18 +779,17 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
lock.unlock(); lock.unlock();
} }
if (close(tx_fd) < 0) if (dma_fpga->DMA_close())
{ {
std::cerr << "Error closing loop device " << '\n'; std::cerr << "Error closing loop device " << '\n';
} }
try try
{ {
infile1.close(); infile1.close();
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception closing file " << filename0 << '\n'; std::cerr << "Exception closing file " << filename0_ << '\n';
} }
if (num_freq_bands_ > 1) if (num_freq_bands_ > 1)
@ -811,7 +800,7 @@ void Ad9361FpgaSignalSource::run_DMA_process(const std::string &filename0, const
} }
catch (const std::ifstream::failure &e) catch (const std::ifstream::failure &e)
{ {
std::cerr << "Exception closing file " << filename1 << '\n'; std::cerr << "Exception closing file " << filename1_ << '\n';
} }
} }

7
src/algorithms/signal_source/adapters/ad9361_fpga_signal_source.h
View File

@ -23,6 +23,7 @@
#include "concurrent_queue.h" #include "concurrent_queue.h"
#include "fpga_buffer_monitor.h" #include "fpga_buffer_monitor.h"
#include "fpga_dma.h"
#include "fpga_dynamic_bit_selection.h" #include "fpga_dynamic_bit_selection.h"
#include "fpga_switch.h" #include "fpga_switch.h"
#include "gnss_block_interface.h" #include "gnss_block_interface.h"
@ -71,6 +72,7 @@ private:
const std::string default_dump_filename = std::string("FPGA_buffer_monitor_dump.dat"); const std::string default_dump_filename = std::string("FPGA_buffer_monitor_dump.dat");
const std::string default_rf_port_select = std::string("A_BALANCED"); const std::string default_rf_port_select = std::string("A_BALANCED");
const std::string default_gain_mode = std::string("slow_attack"); const std::string default_gain_mode = std::string("slow_attack");
const std::string empty_string;
const double default_tx_attenuation_db = -10.0; const double default_tx_attenuation_db = -10.0;
const double default_manual_gain_rx1 = 64.0; const double default_manual_gain_rx1 = 64.0;
const double default_manual_gain_rx2 = 64.0; const double default_manual_gain_rx2 = 64.0;
@ -104,6 +106,7 @@ private:
std::shared_ptr<Fpga_Switch> switch_fpga; std::shared_ptr<Fpga_Switch> switch_fpga;
std::shared_ptr<Fpga_dynamic_bit_selection> dynamic_bit_selection_fpga; std::shared_ptr<Fpga_dynamic_bit_selection> dynamic_bit_selection_fpga;
std::shared_ptr<Fpga_buffer_monitor> buffer_monitor_fpga; std::shared_ptr<Fpga_buffer_monitor> buffer_monitor_fpga;
std::shared_ptr<Fpga_DMA> dma_fpga;
std::mutex dma_mutex; std::mutex dma_mutex;
std::mutex dynamic_bit_selection_mutex; std::mutex dynamic_bit_selection_mutex;
@ -118,8 +121,8 @@ private:
std::string filter_file_; std::string filter_file_;
std::string filter_source_; std::string filter_source_;
std::string filter_filename_; std::string filter_filename_;
std::string filename0; std::string filename0_;
std::string filename1; std::string filename1_;
double rf_gain_rx1_; double rf_gain_rx1_;
double rf_gain_rx2_; double rf_gain_rx2_;

2
src/algorithms/signal_source/libs/CMakeLists.txt
View File

@ -19,6 +19,8 @@ if(ENABLE_FPGA OR ENABLE_AD9361)
set(OPT_SIGNAL_SOURCE_LIB_HEADERS ${OPT_SIGNAL_SOURCE_LIB_HEADERS} fpga_dynamic_bit_selection.h) set(OPT_SIGNAL_SOURCE_LIB_HEADERS ${OPT_SIGNAL_SOURCE_LIB_HEADERS} fpga_dynamic_bit_selection.h)
set(OPT_SIGNAL_SOURCE_LIB_SOURCES ${OPT_SIGNAL_SOURCE_LIB_SOURCES} fpga_buffer_monitor.cc) set(OPT_SIGNAL_SOURCE_LIB_SOURCES ${OPT_SIGNAL_SOURCE_LIB_SOURCES} fpga_buffer_monitor.cc)
set(OPT_SIGNAL_SOURCE_LIB_HEADERS ${OPT_SIGNAL_SOURCE_LIB_HEADERS} fpga_buffer_monitor.h) set(OPT_SIGNAL_SOURCE_LIB_HEADERS ${OPT_SIGNAL_SOURCE_LIB_HEADERS} fpga_buffer_monitor.h)
set(OPT_SIGNAL_SOURCE_LIB_SOURCES ${OPT_SIGNAL_SOURCE_LIB_SOURCES} fpga_dma.cc)
set(OPT_SIGNAL_SOURCE_LIB_HEADERS ${OPT_SIGNAL_SOURCE_LIB_HEADERS} fpga_dma.h)
endif() endif()
set(SIGNAL_SOURCE_LIB_SOURCES set(SIGNAL_SOURCE_LIB_SOURCES

2
src/algorithms/signal_source/libs/fpga_buffer_monitor.h
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@ -61,7 +61,7 @@ public:
void check_buffer_overflow_and_monitor_buffer_status(); void check_buffer_overflow_and_monitor_buffer_status();
private: private:
static const size_t FPGA_PAGE_SIZE = 0x10000; static const size_t FPGA_PAGE_SIZE = 0x1000;
static const uint32_t test_register_writeval = 0x55AA; static const uint32_t test_register_writeval = 0x55AA;
static const uint32_t num_sapmples_per_buffer_element = 2; static const uint32_t num_sapmples_per_buffer_element = 2;
// write addresses // write addresses

134
src/algorithms/signal_source/libs/fpga_dma.cc Normal file
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@ -0,0 +1,134 @@
/*!
* \file fpga_dma.cc
* \brief FPGA DMA control. This code is based in the Xilinx DMA proxy test application:
* https://github.com/Xilinx-Wiki-Projects/software-prototypes/tree/master/linux-user-space-dma/Software
* \author Marc Majoral, mmajoral(at)cttc.es
*
* -----------------------------------------------------------------------------
*
* GNSS-SDR is a Global Navigation Satellite System software-defined receiver.
* This file is part of GNSS-SDR.
*
* Copyright (C) 2010-2022 (see AUTHORS file for a list of contributors)
* SPDX-License-Identifier: GPL-3.0-or-later
*
* -----------------------------------------------------------------------------
*/
#include "fpga_dma.h"
#include <fcntl.h>
#include <iostream> // for std::cerr
#include <sys/ioctl.h> // for ioctl()
#include <sys/mman.h> // libraries used by the GIPO
#include <unistd.h>
int Fpga_DMA::DMA_open()
{
#if INTPTR_MAX == INT64_MAX // 64-bit processor architecture
tx_channel.fd = open("/dev/dma_proxy_tx", O_RDWR);
if (tx_channel.fd < 1)
{
return tx_channel.fd;
}
tx_channel.buf_ptr = (struct channel_buffer *)mmap(NULL, sizeof(struct channel_buffer) * TX_BUFFER_COUNT,
PROT_READ | PROT_WRITE, MAP_SHARED, tx_channel.fd, 0);
if (tx_channel.buf_ptr == MAP_FAILED)
{
std::cerr << "Failed to mmap DMA tx channel\n"
<< std::endl;
return -1;
}
#else // 32-bit processor architecture
tx_fd = open("/dev/loop_tx", O_WRONLY);
if (tx_fd < 1)
{
return tx_fd;
}
// note: a problem was identified with the DMA: when switching from tx to rx or rx to tx mode
// the DMA transmission may hang. This problem will be fixed soon.
// for the moment this problem can be avoided by closing and opening the DMA a second time
if (close(tx_fd) < 0)
{
std::cerr << "Error closing loop device " << '\n';
return -1;
}
// open the DMA a second time
tx_fd = open("/dev/loop_tx", O_WRONLY);
if (tx_fd < 1)
{
std::cerr << "Cannot open loop device\n";
// stop the receiver
return tx_fd;
}
#endif
return 0;
}
std::array<int8_t, BUFFER_SIZE> *Fpga_DMA::get_buffer_address(void)
{
#if INTPTR_MAX == INT64_MAX // 64-bit processor architecture
return &tx_channel.buf_ptr[0].buffer;
#else // 32-bit processor architecture
return &buffer;
#endif
}
int Fpga_DMA::DMA_write(int nbytes)
{
#if INTPTR_MAX == INT64_MAX // 64-bit processor architecture
int buffer_id = 0;
tx_channel.buf_ptr[0].length = nbytes;
// start DMA transfer
if (ioctl(tx_channel.fd, START_XFER, &buffer_id))
{
std::cerr << "Error starting tx DMA transfer " << '\n';
return -1;
}
// wait for completion of DMA transfer
if (ioctl(tx_channel.fd, FINISH_XFER, &buffer_id))
{
std::cerr << "Error detecting end of DMA transfer " << '\n';
return -1;
}
if (tx_channel.buf_ptr[buffer_id].status)
{
std::cerr << "Proxy DMA Tx transfer error " << '\n';
return -1;
}
#else // 32-bit processor architecture
const int num_bytes_sent = write(tx_fd, buffer.data(), nbytes);
if (num_bytes_sent != nbytes)
{
return -1;
}
#endif
return 0;
}
int Fpga_DMA::DMA_close()
{
#if INTPTR_MAX == INT64_MAX // 64-bit processor architecture
if (munmap(tx_channel.buf_ptr, sizeof(struct channel_buffer)))
{
std::cerr << "Failed to unmap DMA tx channel " << '\n';
return -1;
}
return close(tx_channel.fd);
#else // 32-bit processor architecture
return close(tx_fd);
#endif
}

101
src/algorithms/signal_source/libs/fpga_dma.h Normal file
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@ -0,0 +1,101 @@
/*!
* \file fpga_dma.h
* \brief FPGA DMA control. This code is based in the Xilinx DMA proxy test application:
* https://github.com/Xilinx-Wiki-Projects/software-prototypes/tree/master/linux-user-space-dma/Software
* \author Marc Majoral, mmajoral(at)cttc.es
*
* -----------------------------------------------------------------------------
*
* GNSS-SDR is a Global Navigation Satellite System software-defined receiver.
* This file is part of GNSS-SDR.
*
* Copyright (C) 2010-2022 (see AUTHORS file for a list of contributors)
* SPDX-License-Identifier: GPL-3.0-or-later
*
* -----------------------------------------------------------------------------
*/
#ifndef GNSS_SDR_FPGA_DMA_H
#define GNSS_SDR_FPGA_DMA_H
#include <array> // for std::array
#include <cstdint> // for std::int8_t
#define BUFFER_SIZE (128 * 1024) /* must match driver exactly */
#if INTPTR_MAX == INT64_MAX // 64-bit processor architecture
#define TX_BUFFER_COUNT 1 /* app only, must be <= to the number in the driver */
#define FINISH_XFER _IOW('a', 'a', int32_t *)
#define START_XFER _IOW('a', 'b', int32_t *)
// channel buffer structure
struct channel_buffer
{
std::array<int8_t, BUFFER_SIZE> buffer;
enum proxy_status
{
PROXY_NO_ERROR = 0,
PROXY_BUSY = 1,
PROXY_TIMEOUT = 2,
PROXY_ERROR = 3
} status;
unsigned int length;
} __attribute__((aligned(1024))); /* 64 byte alignment required for DMA, but 1024 handy for viewing memory */
// internal DMA channel data structure
struct channel
{
struct channel_buffer *buf_ptr;
int fd;
};
#endif
/*!
* \brief Class that controls the switch DMA in the FPGA
*/
class Fpga_DMA
{
public:
/*!
* \brief Default constructor.
*/
Fpga_DMA() = default;
/*!
* \brief Default destructor.
*/
~Fpga_DMA() = default;
/*!
* \brief Open the DMA device driver.
*/
int DMA_open(void);
/*!
* \brief Obtain DMA buffer address.
*/
std::array<int8_t, BUFFER_SIZE> *get_buffer_address(void);
/*!
* \brief Transfer DMA data
*/
int DMA_write(int nbytes);
/*!
* \brief Close the DMA device driver
*/
int DMA_close(void);
private:
#if INTPTR_MAX == INT64_MAX // 64-bit processor architecture
channel tx_channel;
#else // 32-bit processor architecture
std::array<int8_t, BUFFER_SIZE> buffer;
int tx_fd;
#endif
};
#endif // GNSS_SDR_FPGA_DMA_H

2
src/algorithms/signal_source/libs/fpga_dynamic_bit_selection.h
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@ -56,7 +56,7 @@ public:
void bit_selection(void); void bit_selection(void);
private: private:
static const size_t FPGA_PAGE_SIZE = 0x10000; static const size_t FPGA_PAGE_SIZE = 0x1000;
static const uint32_t Num_bits_ADC = 12; // Number of bits in the ADC static const uint32_t Num_bits_ADC = 12; // Number of bits in the ADC
static const uint32_t Num_bits_FPGA = 4; // Number of bits after the bit selection static const uint32_t Num_bits_FPGA = 4; // Number of bits after the bit selection

2
src/algorithms/signal_source/libs/fpga_switch.h
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@ -54,7 +54,7 @@ public:
void set_switch_position(int32_t switch_position); void set_switch_position(int32_t switch_position);
private: private:
static const size_t FPGA_PAGE_SIZE = 0x10000; static const size_t FPGA_PAGE_SIZE = 0x1000;
static const uint32_t TEST_REGISTER_TRACK_WRITEVAL = 0x55AA; static const uint32_t TEST_REGISTER_TRACK_WRITEVAL = 0x55AA;
static const uint32_t MAX_LENGTH_DEVICEIO_NAME = 50; static const uint32_t MAX_LENGTH_DEVICEIO_NAME = 50;

4
src/algorithms/tracking/libs/fpga_multicorrelator.cc
View File

@ -197,7 +197,7 @@ void Fpga_Multicorrelator_8sc::open_channel(const std::string &device_io_name, u
LOG(WARNING) << "Cannot open deviceio" << device_io_name; LOG(WARNING) << "Cannot open deviceio" << device_io_name;
std::cout << "Cannot open deviceio" << device_io_name << '\n'; std::cout << "Cannot open deviceio" << device_io_name << '\n';
} }
d_map_base = reinterpret_cast<volatile uint32_t *>(mmap(nullptr, page_size, d_map_base = reinterpret_cast<volatile uint32_t *>(mmap(nullptr, FPGA_PAGE_SIZE,
PROT_READ | PROT_WRITE, MAP_SHARED, d_device_descriptor, 0)); PROT_READ | PROT_WRITE, MAP_SHARED, d_device_descriptor, 0));
if (d_map_base == reinterpret_cast<void *>(-1)) if (d_map_base == reinterpret_cast<void *>(-1))
@ -402,7 +402,7 @@ void Fpga_Multicorrelator_8sc::unlock_channel()
void Fpga_Multicorrelator_8sc::close_device() void Fpga_Multicorrelator_8sc::close_device()
{ {
auto *aux = const_cast<uint32_t *>(d_map_base); auto *aux = const_cast<uint32_t *>(d_map_base);
if (munmap(static_cast<void *>(aux), page_size) == -1) if (munmap(static_cast<void *>(aux), FPGA_PAGE_SIZE) == -1)
{ {
std::cout << "Failed to unmap memory uio\n"; std::cout << "Failed to unmap memory uio\n";
} }

2
src/algorithms/tracking/libs/fpga_multicorrelator.h
View File

@ -186,7 +186,7 @@ private:
static const uint32_t drop_samples = 1; // bit 0 of drop_samples_reg_addr static const uint32_t drop_samples = 1; // bit 0 of drop_samples_reg_addr
static const uint32_t enable_secondary_code = 2; // bit 1 of drop_samples_reg_addr static const uint32_t enable_secondary_code = 2; // bit 1 of drop_samples_reg_addr
static const uint32_t init_secondary_code_addresses = 4; // bit 2 of drop_samples_reg_addr static const uint32_t init_secondary_code_addresses = 4; // bit 2 of drop_samples_reg_addr
static const uint32_t page_size = 0x10000; static const uint32_t FPGA_PAGE_SIZE = 0x1000;
static const uint32_t max_code_resampler_counter = 1 << 31; // 2^(number of bits of precision of the code resampler) static const uint32_t max_code_resampler_counter = 1 << 31; // 2^(number of bits of precision of the code resampler)
static const uint32_t local_code_fpga_clear_address_counter = 0x10000000; static const uint32_t local_code_fpga_clear_address_counter = 0x10000000;
static const uint32_t test_register_track_writeval = 0x55AA; static const uint32_t test_register_track_writeval = 0x55AA;

4
src/core/libs/gnss_sdr_fpga_sample_counter.cc
View File

@ -146,7 +146,7 @@ void gnss_sdr_fpga_sample_counter::open_device()
LOG(WARNING) << "Cannot open deviceio" << device_io_name; LOG(WARNING) << "Cannot open deviceio" << device_io_name;
std::cout << "Counter-Intr: cannot open deviceio" << device_io_name << '\n'; std::cout << "Counter-Intr: cannot open deviceio" << device_io_name << '\n';
} }
map_base = reinterpret_cast<volatile uint32_t *>(mmap(nullptr, page_size, map_base = reinterpret_cast<volatile uint32_t *>(mmap(nullptr, FPGA_PAGE_SIZE,
PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0)); PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0));
if (map_base == reinterpret_cast<void *>(-1)) if (map_base == reinterpret_cast<void *>(-1))
@ -176,7 +176,7 @@ void gnss_sdr_fpga_sample_counter::close_device()
map_base[2] = 0; // disable the generation of the interrupt in the device map_base[2] = 0; // disable the generation of the interrupt in the device
auto *aux = const_cast<uint32_t *>(map_base); auto *aux = const_cast<uint32_t *>(map_base);
if (munmap(static_cast<void *>(aux), page_size) == -1) if (munmap(static_cast<void *>(aux), FPGA_PAGE_SIZE) == -1)
{ {
std::cout << "Failed to unmap memory uio\n"; std::cout << "Failed to unmap memory uio\n";
} }

2
src/core/libs/gnss_sdr_fpga_sample_counter.h
View File

@ -49,7 +49,7 @@ public:
private: private:
const std::string device_name = "counter"; // UIO device name const std::string device_name = "counter"; // UIO device name
static const uint32_t page_size = 0x10000; // default page size for the multicorrelator memory map static const uint32_t FPGA_PAGE_SIZE = 0x1000; // default page size for the multicorrelator memory map
static const uint32_t test_reg_sanity_check = 0x55AA; // value to check the presence of the test register (to detect the hw) static const uint32_t test_reg_sanity_check = 0x55AA; // value to check the presence of the test register (to detect the hw)
friend gnss_sdr_fpga_sample_counter_sptr gnss_sdr_make_fpga_sample_counter(double _fs, int32_t _interval_ms); friend gnss_sdr_fpga_sample_counter_sptr gnss_sdr_make_fpga_sample_counter(double _fs, int32_t _interval_ms);