From 7aa19d9642bcc730087681cc2e982106fedb05ca Mon Sep 17 00:00:00 2001 From: Carles Fernandez Date: Sun, 18 Aug 2024 10:57:40 +0200 Subject: [PATCH] Use lock_guard instead of unique_lock --- .../adrv9361_z7035_signal_source_fpga.cc | 35 +++++++++---------- .../adrv9361_z7035_signal_source_fpga.h | 10 +++--- .../adapters/fmcomms5_signal_source_fpga.cc | 35 +++++++++---------- .../adapters/fmcomms5_signal_source_fpga.h | 11 +++--- .../max2771_evkit_signal_source_fpga.cc | 21 +++++------ .../max2771_evkit_signal_source_fpga.h | 4 +-- 6 files changed, 52 insertions(+), 64 deletions(-) diff --git a/src/algorithms/signal_source/adapters/adrv9361_z7035_signal_source_fpga.cc b/src/algorithms/signal_source/adapters/adrv9361_z7035_signal_source_fpga.cc index 9d29e2de2..392d91b13 100644 --- a/src/algorithms/signal_source/adapters/adrv9361_z7035_signal_source_fpga.cc +++ b/src/algorithms/signal_source/adapters/adrv9361_z7035_signal_source_fpga.cc @@ -1,6 +1,6 @@ /*! * \file adrv9361_z7035_signal_source_fpga.cc - * \brief signal source for the Analog Devices ADRV9361-Z7035 evaluation board + * \brief Signal source for the Analog Devices ADRV9361-Z7035 evaluation board * directly connected to the FPGA accelerators. * This source implements only the AD9361 control. It is NOT compatible with * conventional SDR acquisition and tracking blocks. @@ -257,7 +257,6 @@ Adrv9361z7035SignalSourceFPGA::Adrv9361z7035SignalSourceFPGA(const Configuration buffer_monitor_fpga = std::make_shared(num_freq_bands, dump_, dump_filename); thread_buffer_monitor = std::thread([&] { run_buffer_monitor_process(); }); - // dynamic bits selection if (enable_dynamic_bit_selection_) { @@ -278,8 +277,7 @@ Adrv9361z7035SignalSourceFPGA::Adrv9361z7035SignalSourceFPGA(const Configuration Adrv9361z7035SignalSourceFPGA::~Adrv9361z7035SignalSourceFPGA() { - /* cleanup and exit */ - + // cleanup and exit if (rf_shutdown_) { std::cout << "* AD9361 Disabling RX streaming channels\n"; @@ -301,24 +299,27 @@ Adrv9361z7035SignalSourceFPGA::~Adrv9361z7035SignalSourceFPGA() } // disable buffer overflow checking and buffer monitoring - std::unique_lock lock_buffer_monitor(buffer_monitor_mutex); - enable_ovf_check_buffer_monitor_active_ = false; - lock_buffer_monitor.unlock(); + { + std::lock_guard lock_buffer_monitor(buffer_monitor_mutex); + enable_ovf_check_buffer_monitor_active_ = false; + } if (thread_buffer_monitor.joinable()) { thread_buffer_monitor.join(); } - - std::unique_lock lock_dyn_bit_sel(dynamic_bit_selection_mutex); - bool bit_selection_enabled = enable_dynamic_bit_selection_; - lock_dyn_bit_sel.unlock(); + bool bit_selection_enabled = false; + { + std::lock_guard lock_dyn_bit_sel(dynamic_bit_selection_mutex); + bit_selection_enabled = enable_dynamic_bit_selection_; + } if (bit_selection_enabled == true) { - std::unique_lock lock(dynamic_bit_selection_mutex); - enable_dynamic_bit_selection_ = false; - lock.unlock(); + { + std::lock_guard lock(dynamic_bit_selection_mutex); + enable_dynamic_bit_selection_ = false; + } if (thread_dynamic_bit_selection.joinable()) { @@ -337,12 +338,11 @@ void Adrv9361z7035SignalSourceFPGA::run_dynamic_bit_selection_process() // setting the bit selection to the top bits dynamic_bit_selection_fpga->bit_selection(); std::this_thread::sleep_for(std::chrono::milliseconds(Gain_control_period_ms)); - std::unique_lock lock(dynamic_bit_selection_mutex); + std::lock_guard lock(dynamic_bit_selection_mutex); if (enable_dynamic_bit_selection_ == false) { dynamic_bit_selection_active = false; } - lock.unlock(); } } @@ -357,12 +357,11 @@ void Adrv9361z7035SignalSourceFPGA::run_buffer_monitor_process() { buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status(); std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms)); - std::unique_lock lock(buffer_monitor_mutex); + std::lock_guard lock(buffer_monitor_mutex); if (enable_ovf_check_buffer_monitor_active_ == false) { enable_ovf_check_buffer_monitor_active = false; } - lock.unlock(); } } diff --git a/src/algorithms/signal_source/adapters/adrv9361_z7035_signal_source_fpga.h b/src/algorithms/signal_source/adapters/adrv9361_z7035_signal_source_fpga.h index 5e7e8b7e4..beffb3c70 100644 --- a/src/algorithms/signal_source/adapters/adrv9361_z7035_signal_source_fpga.h +++ b/src/algorithms/signal_source/adapters/adrv9361_z7035_signal_source_fpga.h @@ -1,6 +1,6 @@ /*! * \file adrv9361_z7035_signal_source_fpga.h - * \brief signal source for the Analog Devices ADRV9361-Z7035 evaluation board + * \brief Signal source for the Analog Devices ADRV9361-Z7035 evaluation board * directly connected to the FPGA accelerators. * This source implements only the AD9361 control. It is NOT compatible with * conventional SDR acquisition and tracking blocks. @@ -78,13 +78,14 @@ private: const uint32_t buffer_monitor_period_ms = 1000; // buffer overflow and buffer monitoring initial delay const uint32_t buffer_monitoring_initial_delay_ms = 2000; - // sample block size when running in post-processing mode - const int sample_block_size = 16384; const int32_t switch_to_real_time_mode = 2; void run_dynamic_bit_selection_process(); void run_buffer_monitor_process(); + mutable std::mutex dynamic_bit_selection_mutex; + mutable std::mutex buffer_monitor_mutex; + std::thread thread_dynamic_bit_selection; std::thread thread_buffer_monitor; @@ -92,9 +93,6 @@ private: std::shared_ptr dynamic_bit_selection_fpga; std::shared_ptr buffer_monitor_fpga; - std::mutex dynamic_bit_selection_mutex; - std::mutex buffer_monitor_mutex; - std::string gain_mode_rx1_; std::string gain_mode_rx2_; std::string rf_port_select_; diff --git a/src/algorithms/signal_source/adapters/fmcomms5_signal_source_fpga.cc b/src/algorithms/signal_source/adapters/fmcomms5_signal_source_fpga.cc index d8c5a65c0..096e422db 100644 --- a/src/algorithms/signal_source/adapters/fmcomms5_signal_source_fpga.cc +++ b/src/algorithms/signal_source/adapters/fmcomms5_signal_source_fpga.cc @@ -1,6 +1,6 @@ /*! * \file fmcomms5_signal_source_fpga.cc - * \brief signal source for the Analog Devices FMCOMMS5 directly connected + * \brief Signal source for the Analog Devices FMCOMMS5 directly connected * to the FPGA accelerators. * This source implements only the AD9361 control. It is NOT compatible with * conventional SDR acquisition and tracking blocks. @@ -217,7 +217,6 @@ Fmcomms5SignalSourceFPGA::Fmcomms5SignalSourceFPGA(const ConfigurationInterface buffer_monitor_fpga = std::make_shared(num_freq_bands, dump_, dump_filename); thread_buffer_monitor = std::thread([&] { run_buffer_monitor_process(); }); - // dynamic bits selection if (enable_dynamic_bit_selection_) { @@ -238,8 +237,7 @@ Fmcomms5SignalSourceFPGA::Fmcomms5SignalSourceFPGA(const ConfigurationInterface Fmcomms5SignalSourceFPGA::~Fmcomms5SignalSourceFPGA() { - /* cleanup and exit */ - + // cleanup and exit if (rf_shutdown_) { std::cout << "* Disabling RX streaming channels\n"; @@ -250,24 +248,27 @@ Fmcomms5SignalSourceFPGA::~Fmcomms5SignalSourceFPGA() } // disable buffer overflow checking and buffer monitoring - std::unique_lock lock_buffer_monitor(buffer_monitor_mutex); - enable_ovf_check_buffer_monitor_active_ = false; - lock_buffer_monitor.unlock(); + { + std::lock_guard lock_buffer_monitor(buffer_monitor_mutex); + enable_ovf_check_buffer_monitor_active_ = false; + } if (thread_buffer_monitor.joinable()) { thread_buffer_monitor.join(); } - - std::unique_lock lock_dyn_bit_sel(dynamic_bit_selection_mutex); - bool bit_selection_enabled = enable_dynamic_bit_selection_; - lock_dyn_bit_sel.unlock(); + bool bit_selection_enabled = false; + { + std::lock_guard lock_dyn_bit_sel(dynamic_bit_selection_mutex); + bit_selection_enabled = enable_dynamic_bit_selection_; + } if (bit_selection_enabled == true) { - std::unique_lock lock(dynamic_bit_selection_mutex); - enable_dynamic_bit_selection_ = false; - lock.unlock(); + { + std::lock_guard lock(dynamic_bit_selection_mutex); + enable_dynamic_bit_selection_ = false; + } if (thread_dynamic_bit_selection.joinable()) { @@ -286,12 +287,11 @@ void Fmcomms5SignalSourceFPGA::run_dynamic_bit_selection_process() // setting the bit selection to the top bits dynamic_bit_selection_fpga->bit_selection(); std::this_thread::sleep_for(std::chrono::milliseconds(Gain_control_period_ms)); - std::unique_lock lock(dynamic_bit_selection_mutex); + std::lock_guard lock(dynamic_bit_selection_mutex); if (enable_dynamic_bit_selection_ == false) { dynamic_bit_selection_active = false; } - lock.unlock(); } } @@ -306,12 +306,11 @@ void Fmcomms5SignalSourceFPGA::run_buffer_monitor_process() { buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status(); std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms)); - std::unique_lock lock(buffer_monitor_mutex); + std::lock_guard lock(buffer_monitor_mutex); if (enable_ovf_check_buffer_monitor_active_ == false) { enable_ovf_check_buffer_monitor_active = false; } - lock.unlock(); } } diff --git a/src/algorithms/signal_source/adapters/fmcomms5_signal_source_fpga.h b/src/algorithms/signal_source/adapters/fmcomms5_signal_source_fpga.h index 1bdcf4e6f..1c5c37c73 100644 --- a/src/algorithms/signal_source/adapters/fmcomms5_signal_source_fpga.h +++ b/src/algorithms/signal_source/adapters/fmcomms5_signal_source_fpga.h @@ -1,6 +1,6 @@ /*! * \file fmcomms5_signal_source_fpga.h - * \brief signal source for the Analog Devices FMCOMMS5 directly connected + * \brief Signal source for the Analog Devices FMCOMMS5 directly connected * to the FPGA accelerators. * This source implements only the AD9361 control. It is NOT compatible with * conventional SDR acquisition and tracking blocks. @@ -67,7 +67,6 @@ private: const std::string default_dump_filename = std::string("FPGA_buffer_monitor_dump.dat"); const std::string default_rf_port_select = std::string("A_BALANCED"); const std::string default_gain_mode = std::string("slow_attack"); - const double default_tx_attenuation_db = -10.0; const double default_manual_gain_rx1 = 64.0; const double default_manual_gain_rx2 = 64.0; const uint64_t default_bandwidth = 12500000; @@ -78,13 +77,14 @@ private: const uint32_t buffer_monitor_period_ms = 1000; // buffer overflow and buffer monitoring initial delay const uint32_t buffer_monitoring_initial_delay_ms = 2000; - // sample block size when running in post-processing mode - const int sample_block_size = 16384; const int32_t switch_to_real_time_mode = 2; void run_dynamic_bit_selection_process(); void run_buffer_monitor_process(); + mutable std::mutex dynamic_bit_selection_mutex; + mutable std::mutex buffer_monitor_mutex; + std::thread thread_dynamic_bit_selection; std::thread thread_buffer_monitor; @@ -92,9 +92,6 @@ private: std::shared_ptr dynamic_bit_selection_fpga; std::shared_ptr buffer_monitor_fpga; - std::mutex dynamic_bit_selection_mutex; - std::mutex buffer_monitor_mutex; - std::string gain_mode_rx1_; std::string gain_mode_rx2_; std::string rf_port_select_; diff --git a/src/algorithms/signal_source/adapters/max2771_evkit_signal_source_fpga.cc b/src/algorithms/signal_source/adapters/max2771_evkit_signal_source_fpga.cc index 788b50e77..80b310034 100644 --- a/src/algorithms/signal_source/adapters/max2771_evkit_signal_source_fpga.cc +++ b/src/algorithms/signal_source/adapters/max2771_evkit_signal_source_fpga.cc @@ -140,13 +140,11 @@ MAX2771EVKITSignalSourceFPGA::MAX2771EVKITSignalSourceFPGA(const ConfigurationIn } } + std::vector MAX2771EVKITSignalSourceFPGA::setup_regs(void) { - std::vector register_values = std::vector(MAX2771_NUM_REGS); - - + auto register_values = std::vector(MAX2771_NUM_REGS); uint32_t LNA_mode = (LNA_active_) ? 0x0 : 0x2; - uint32_t Filter_Bandwidth; switch (bandwidth_) @@ -376,10 +374,10 @@ bool MAX2771EVKITSignalSourceFPGA::configure(std::vector register_valu return 0; } + MAX2771EVKITSignalSourceFPGA::~MAX2771EVKITSignalSourceFPGA() { - /* cleanup and exit */ - + // cleanup and exit if (rf_shutdown_) { chipen_ = false; @@ -392,7 +390,6 @@ MAX2771EVKITSignalSourceFPGA::~MAX2771EVKITSignalSourceFPGA() return; } - if (configure(register_values)) { std::cerr << "Error disabling the MAX2771 device " << '\n'; @@ -405,9 +402,10 @@ MAX2771EVKITSignalSourceFPGA::~MAX2771EVKITSignalSourceFPGA() } // disable buffer overflow checking and buffer monitoring - std::unique_lock lock_buffer_monitor(buffer_monitor_mutex); - enable_ovf_check_buffer_monitor_active_ = false; - lock_buffer_monitor.unlock(); + { + std::lock_guard lock_buffer_monitor(buffer_monitor_mutex); + enable_ovf_check_buffer_monitor_active_ = false; + } if (thread_buffer_monitor.joinable()) { @@ -426,12 +424,11 @@ void MAX2771EVKITSignalSourceFPGA::run_buffer_monitor_process() { buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status(); std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms)); - std::unique_lock lock(buffer_monitor_mutex); + std::lock_guard lock(buffer_monitor_mutex); if (enable_ovf_check_buffer_monitor_active_ == false) { enable_ovf_check_buffer_monitor_active = false; } - lock.unlock(); } } diff --git a/src/algorithms/signal_source/adapters/max2771_evkit_signal_source_fpga.h b/src/algorithms/signal_source/adapters/max2771_evkit_signal_source_fpga.h index 3008aa384..5ba036ca3 100644 --- a/src/algorithms/signal_source/adapters/max2771_evkit_signal_source_fpga.h +++ b/src/algorithms/signal_source/adapters/max2771_evkit_signal_source_fpga.h @@ -53,7 +53,6 @@ public: std::vector setup_regs(void); - inline size_t item_size() override { return item_size_; @@ -130,14 +129,13 @@ private: bool configure(std::vector register_values); void run_buffer_monitor_process(); + mutable std::mutex buffer_monitor_mutex; std::thread thread_buffer_monitor; std::shared_ptr buffer_monitor_fpga; std::shared_ptr spidev_fpga; - std::mutex buffer_monitor_mutex; - uint64_t freq_; // frequency of local oscillator uint64_t sample_rate_;