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https://github.com/gnss-sdr/gnss-sdr
synced 2025-01-18 21:23:02 +00:00
Improve constructors: prefer member initializers to member initializations in the constructor body
This commit is contained in:
parent
3d6cfdbcbe
commit
6e96b41025
@ -72,12 +72,55 @@ dll_pll_veml_tracking_sptr dll_pll_veml_make_tracking(const Dll_Pll_Conf &conf_)
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}
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}
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dll_pll_veml_tracking::dll_pll_veml_tracking(const Dll_Pll_Conf &conf_) : gr::block("dll_pll_veml_tracking", gr::io_signature::make(1, 1, sizeof(gr_complex)),
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dll_pll_veml_tracking::dll_pll_veml_tracking(const Dll_Pll_Conf &conf_)
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gr::io_signature::make(1, 1, sizeof(Gnss_Synchro)))
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: gr::block("dll_pll_veml_tracking", gr::io_signature::make(1, 1, sizeof(gr_complex)),
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gr::io_signature::make(1, 1, sizeof(Gnss_Synchro))),
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d_trk_parameters(conf_),
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d_acquisition_gnss_synchro(nullptr),
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d_code_chip_rate(0.0),
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d_acq_code_phase_samples(0.0),
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d_acq_carrier_doppler_hz(0.0),
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d_current_correlation_time_s(0.0),
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d_carrier_doppler_hz(0.0),
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d_acc_carrier_phase_rad(0.0),
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d_rem_code_phase_chips(0.0),
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d_T_chip_seconds(0.0),
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d_T_prn_seconds(0.0),
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d_T_prn_samples(0.0),
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d_K_blk_samples(0.0),
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d_carrier_lock_test(1.0),
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d_CN0_SNV_dB_Hz(0.0),
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d_carrier_lock_threshold(d_trk_parameters.carrier_lock_th),
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d_carrier_phase_step_rad(0.0),
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d_carrier_phase_rate_step_rad(0.0),
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d_code_phase_step_chips(0.0),
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d_code_phase_rate_step_chips(0.0),
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d_rem_code_phase_samples(0.0), // Residual code phase (in chips)
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d_sample_counter(0ULL),
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d_acq_sample_stamp(0ULL),
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d_rem_carr_phase_rad(0.0), // Residual carrier phase
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d_state(0), // initial state: standby
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d_current_prn_length_samples(static_cast<int32_t>(d_trk_parameters.vector_length)),
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d_extend_correlation_symbols_count(0),
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d_cn0_estimation_counter(0),
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d_carrier_lock_fail_counter(0),
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d_code_lock_fail_counter(0),
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d_channel(0),
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d_secondary_code_length(0U),
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d_data_secondary_code_length(0U),
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d_pull_in_transitory(true),
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d_corrected_doppler(false),
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d_interchange_iq(false),
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d_veml(false),
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d_cloop(true),
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d_dump(d_trk_parameters.dump),
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d_dump_mat(d_trk_parameters.dump_mat && d_dump),
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d_acc_carrier_phase_initialized(false),
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d_Flag_PLL_180_deg_phase_locked(false)
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{
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{
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// prevent telemetry symbols accumulation in output buffers
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// prevent telemetry symbols accumulation in output buffers
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this->set_max_noutput_items(1);
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this->set_max_noutput_items(1);
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d_trk_parameters = conf_;
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// Telemetry bit synchronization message port input
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// Telemetry bit synchronization message port input
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this->message_port_register_out(pmt::mp("events"));
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this->message_port_register_out(pmt::mp("events"));
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this->set_relative_rate(1.0 / static_cast<double>(d_trk_parameters.vector_length));
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this->set_relative_rate(1.0 / static_cast<double>(d_trk_parameters.vector_length));
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@ -98,14 +141,6 @@ dll_pll_veml_tracking::dll_pll_veml_tracking(const Dll_Pll_Conf &conf_) : gr::bl
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// initialize internal vars
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// initialize internal vars
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d_dll_filt_history.set_capacity(1000);
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d_dll_filt_history.set_capacity(1000);
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d_veml = false;
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d_cloop = true;
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d_pull_in_transitory = true;
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d_code_chip_rate = 0.0;
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d_secondary_code_length = 0U;
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d_data_secondary_code_length = 0U;
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d_preamble_length_symbols = 0;
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d_interchange_iq = false;
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d_signal_type = std::string(d_trk_parameters.signal);
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d_signal_type = std::string(d_trk_parameters.signal);
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std::map<std::string, std::string> map_signal_pretty_name;
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std::map<std::string, std::string> map_signal_pretty_name;
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@ -410,10 +445,9 @@ dll_pll_veml_tracking::dll_pll_veml_tracking(const Dll_Pll_Conf &conf_) : gr::bl
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d_code_samples_per_chip = 0U;
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d_code_samples_per_chip = 0U;
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d_symbols_per_bit = 0;
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d_symbols_per_bit = 0;
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}
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}
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d_T_chip_seconds = 0.0;
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d_T_prn_seconds = 0.0;
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// Initial code frequency basis of NCO
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d_T_prn_samples = 0.0;
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d_code_freq_chips = d_code_chip_rate;
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d_K_blk_samples = 0.0;
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// Initialize tracking ==========================================
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// Initialize tracking ==========================================
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d_code_loop_filter = Tracking_loop_filter(static_cast<float>(d_code_period), d_trk_parameters.dll_bw_hz, d_trk_parameters.dll_filter_order, false);
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d_code_loop_filter = Tracking_loop_filter(static_cast<float>(d_code_period), d_trk_parameters.dll_bw_hz, d_trk_parameters.dll_filter_order, false);
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@ -488,28 +522,9 @@ dll_pll_veml_tracking::dll_pll_veml_tracking(const Dll_Pll_Conf &conf_) : gr::bl
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// --- Initializations ---
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// --- Initializations ---
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d_Prompt_circular_buffer.set_capacity(d_secondary_code_length);
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d_Prompt_circular_buffer.set_capacity(d_secondary_code_length);
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d_multicorrelator_cpu.set_high_dynamics_resampler(d_trk_parameters.high_dyn);
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d_multicorrelator_cpu.set_high_dynamics_resampler(d_trk_parameters.high_dyn);
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// Initial code frequency basis of NCO
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d_code_freq_chips = d_code_chip_rate;
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// Residual code phase (in chips)
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d_rem_code_phase_samples = 0.0;
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// Residual carrier phase
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d_rem_carr_phase_rad = 0.0;
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// sample synchronization
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d_sample_counter = 0ULL;
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d_acq_sample_stamp = 0ULL;
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d_current_prn_length_samples = static_cast<int32_t>(d_trk_parameters.vector_length);
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d_current_correlation_time_s = 0.0;
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// CN0 estimation and lock detector buffers
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// CN0 estimation and lock detector buffers
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d_cn0_estimation_counter = 0;
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d_Prompt_buffer = volk_gnsssdr::vector<gr_complex>(d_trk_parameters.cn0_samples);
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d_Prompt_buffer = volk_gnsssdr::vector<gr_complex>(d_trk_parameters.cn0_samples);
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d_carrier_lock_test = 1.0;
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d_CN0_SNV_dB_Hz = 0.0;
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d_carrier_lock_fail_counter = 0;
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d_code_lock_fail_counter = 0;
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d_carrier_lock_threshold = d_trk_parameters.carrier_lock_th;
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d_Prompt_Data = volk_gnsssdr::vector<gr_complex>(1);
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d_Prompt_Data = volk_gnsssdr::vector<gr_complex>(1);
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d_cn0_smoother = Exponential_Smoother();
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d_cn0_smoother = Exponential_Smoother();
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d_cn0_smoother.set_alpha(d_trk_parameters.cn0_smoother_alpha);
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d_cn0_smoother.set_alpha(d_trk_parameters.cn0_smoother_alpha);
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@ -525,21 +540,8 @@ dll_pll_veml_tracking::dll_pll_veml_tracking(const Dll_Pll_Conf &conf_) : gr::bl
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d_carrier_lock_test_smoother.set_offset(0.0);
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d_carrier_lock_test_smoother.set_offset(0.0);
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d_carrier_lock_test_smoother.set_samples_for_initialization(d_trk_parameters.carrier_lock_test_smoother_samples);
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d_carrier_lock_test_smoother.set_samples_for_initialization(d_trk_parameters.carrier_lock_test_smoother_samples);
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d_acquisition_gnss_synchro = nullptr;
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d_channel = 0;
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d_acq_code_phase_samples = 0.0;
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d_acq_carrier_doppler_hz = 0.0;
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d_carrier_doppler_hz = 0.0;
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d_acc_carrier_phase_rad = 0.0;
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d_extend_correlation_symbols_count = 0;
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d_code_phase_step_chips = 0.0;
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d_code_phase_rate_step_chips = 0.0;
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d_carrier_phase_step_rad = 0.0;
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d_carrier_phase_rate_step_rad = 0.0;
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d_rem_code_phase_chips = 0.0;
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d_state = 0; // initial state: standby
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clear_tracking_vars();
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clear_tracking_vars();
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if (d_trk_parameters.smoother_length > 0)
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if (d_trk_parameters.smoother_length > 0)
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{
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{
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d_carr_ph_history.set_capacity(d_trk_parameters.smoother_length * 2);
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d_carr_ph_history.set_capacity(d_trk_parameters.smoother_length * 2);
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@ -551,8 +553,6 @@ dll_pll_veml_tracking::dll_pll_veml_tracking(const Dll_Pll_Conf &conf_) : gr::bl
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d_code_ph_history.set_capacity(1);
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d_code_ph_history.set_capacity(1);
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}
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}
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d_dump = d_trk_parameters.dump;
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d_dump_mat = d_trk_parameters.dump_mat and d_dump;
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if (d_dump)
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if (d_dump)
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{
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{
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d_dump_filename = d_trk_parameters.dump_filename;
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d_dump_filename = d_trk_parameters.dump_filename;
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@ -586,9 +586,6 @@ dll_pll_veml_tracking::dll_pll_veml_tracking(const Dll_Pll_Conf &conf_) : gr::bl
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d_dump = false;
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d_dump = false;
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}
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}
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}
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}
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d_corrected_doppler = false;
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d_acc_carrier_phase_initialized = false;
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d_Flag_PLL_180_deg_phase_locked = false;
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}
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}
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@ -57,7 +57,7 @@ dll_pll_veml_tracking_sptr dll_pll_veml_make_tracking(const Dll_Pll_Conf &conf_)
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class dll_pll_veml_tracking : public gr::block
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class dll_pll_veml_tracking : public gr::block
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{
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{
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public:
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public:
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~dll_pll_veml_tracking();
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~dll_pll_veml_tracking() override;
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void set_channel(uint32_t channel);
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void set_channel(uint32_t channel);
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void set_gnss_synchro(Gnss_Synchro *p_gnss_synchro);
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void set_gnss_synchro(Gnss_Synchro *p_gnss_synchro);
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@ -65,9 +65,9 @@ public:
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void stop_tracking();
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void stop_tracking();
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int general_work(int noutput_items, gr_vector_int &ninput_items,
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int general_work(int noutput_items, gr_vector_int &ninput_items,
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gr_vector_const_void_star &input_items, gr_vector_void_star &output_items);
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gr_vector_const_void_star &input_items, gr_vector_void_star &output_items) override;
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void forecast(int noutput_items, gr_vector_int &ninput_items_required);
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void forecast(int noutput_items, gr_vector_int &ninput_items_required) override;
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private:
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private:
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friend dll_pll_veml_tracking_sptr dll_pll_veml_make_tracking(const Dll_Pll_Conf &conf_);
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friend dll_pll_veml_tracking_sptr dll_pll_veml_make_tracking(const Dll_Pll_Conf &conf_);
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@ -170,7 +170,6 @@ private:
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float d_rem_carr_phase_rad;
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float d_rem_carr_phase_rad;
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int32_t d_symbols_per_bit;
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int32_t d_symbols_per_bit;
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int32_t d_preamble_length_symbols;
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int32_t d_state;
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int32_t d_state;
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int32_t d_correlation_length_ms;
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int32_t d_correlation_length_ms;
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int32_t d_n_correlator_taps;
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int32_t d_n_correlator_taps;
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@ -61,13 +61,67 @@ dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(const Dll_Pll_Co
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}
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}
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dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &conf_) : gr::block("dll_pll_veml_tracking_fpga", gr::io_signature::make(0, 0, sizeof(lv_16sc_t)),
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dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &conf_)
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gr::io_signature::make(1, 1, sizeof(Gnss_Synchro)))
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: gr::block("dll_pll_veml_tracking_fpga", gr::io_signature::make(0, 0, sizeof(lv_16sc_t)),
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gr::io_signature::make(1, 1, sizeof(Gnss_Synchro))),
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d_trk_parameters(conf_),
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d_acquisition_gnss_synchro(nullptr),
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d_code_chip_rate(0.0),
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d_code_phase_step_chips(0.0),
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d_code_phase_rate_step_chips(0.0),
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d_carrier_phase_step_rad(0.0),
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d_carrier_phase_rate_step_rad(0.0),
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d_acq_code_phase_samples(0.0),
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d_acq_carrier_doppler_hz(0.0),
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d_rem_code_phase_samples(0.0),
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d_rem_code_phase_samples_prev(0.0),
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d_current_correlation_time_s(0.0),
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d_carrier_doppler_hz(0.0),
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d_acc_carrier_phase_rad(0.0),
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d_rem_code_phase_chips(0.0),
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d_T_chip_seconds(0.0),
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d_T_prn_seconds(0.0),
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d_T_prn_samples(0.0),
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d_K_blk_samples(0.0),
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d_carrier_lock_test(1.0),
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d_CN0_SNV_dB_Hz(0.0),
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d_carrier_lock_threshold(d_trk_parameters.carrier_lock_th),
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d_sample_counter(0ULL),
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d_acq_sample_stamp(0ULL),
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d_sample_counter_next(0ULL),
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d_rem_carr_phase_rad(0.0),
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d_state(1),
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d_extend_correlation_symbols_count(0),
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d_current_integration_length_samples(static_cast<int32_t>(d_trk_parameters.vector_length)),
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d_cn0_estimation_counter(0),
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d_carrier_lock_fail_counter(0),
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d_code_lock_fail_counter(0),
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d_extend_fpga_integration_periods(d_trk_parameters.extend_fpga_integration_periods),
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d_channel(0),
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d_secondary_code_length(0U),
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d_data_secondary_code_length(0U),
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d_code_length_chips(d_trk_parameters.code_length_chips),
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d_code_samples_per_chip(d_trk_parameters.code_samples_per_chip),
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d_fpga_integration_period(d_trk_parameters.fpga_integration_period),
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d_current_fpga_integration_period(1),
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d_veml(false),
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d_cloop(true),
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d_dump(d_trk_parameters.dump),
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d_dump_mat(d_trk_parameters.dump_mat && d_dump),
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d_pull_in_transitory(true),
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d_corrected_doppler(false),
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d_interchange_iq(false),
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d_acc_carrier_phase_initialized(false),
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d_worker_is_done(false),
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d_extended_correlation_in_fpga(d_trk_parameters.extended_correlation_in_fpga),
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d_current_extended_correlation_in_fpga(false),
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d_stop_tracking(false),
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d_sc_demodulate_enabled(false),
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d_Flag_PLL_180_deg_phase_locked(false)
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{
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{
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// prevent telemetry symbols accumulation in output buffers
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// prevent telemetry symbols accumulation in output buffers
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this->set_max_noutput_items(1);
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this->set_max_noutput_items(1);
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d_trk_parameters = conf_;
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// Telemetry bit synchronization message port input
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// Telemetry bit synchronization message port input
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this->message_port_register_out(pmt::mp("events"));
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this->message_port_register_out(pmt::mp("events"));
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this->set_relative_rate(1.0 / static_cast<double>(d_trk_parameters.vector_length));
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this->set_relative_rate(1.0 / static_cast<double>(d_trk_parameters.vector_length));
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@ -86,14 +140,8 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
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#endif
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#endif
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// initialize internal vars
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// initialize internal vars
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d_dll_filt_history.set_capacity(1000);
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d_dll_filt_history.set_capacity(1000);
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d_veml = false;
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d_cloop = true;
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d_pull_in_transitory = true;
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d_code_chip_rate = 0.0;
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d_secondary_code_length = 0U;
|
|
||||||
d_data_secondary_code_length = 0U;
|
|
||||||
d_signal_type = std::string(d_trk_parameters.signal);
|
d_signal_type = std::string(d_trk_parameters.signal);
|
||||||
d_interchange_iq = false;
|
|
||||||
|
|
||||||
std::map<std::string, std::string> map_signal_pretty_name;
|
std::map<std::string, std::string> map_signal_pretty_name;
|
||||||
map_signal_pretty_name["1C"] = "L1 C/A";
|
map_signal_pretty_name["1C"] = "L1 C/A";
|
||||||
@ -106,15 +154,6 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
|
|||||||
|
|
||||||
d_signal_pretty_name = map_signal_pretty_name[d_signal_type];
|
d_signal_pretty_name = map_signal_pretty_name[d_signal_type];
|
||||||
|
|
||||||
d_code_samples_per_chip = d_trk_parameters.code_samples_per_chip; // number of samples per chip
|
|
||||||
d_code_length_chips = d_trk_parameters.code_length_chips;
|
|
||||||
d_extended_correlation_in_fpga = d_trk_parameters.extended_correlation_in_fpga;
|
|
||||||
d_current_extended_correlation_in_fpga = false;
|
|
||||||
d_extend_fpga_integration_periods = d_trk_parameters.extend_fpga_integration_periods; // by default
|
|
||||||
d_fpga_integration_period = d_trk_parameters.fpga_integration_period; // by default
|
|
||||||
d_current_fpga_integration_period = 1;
|
|
||||||
d_sc_demodulate_enabled = false;
|
|
||||||
|
|
||||||
if (d_trk_parameters.system == 'G')
|
if (d_trk_parameters.system == 'G')
|
||||||
{
|
{
|
||||||
d_systemName = "GPS";
|
d_systemName = "GPS";
|
||||||
@ -290,10 +329,6 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
|
|||||||
d_code_period = 0.0;
|
d_code_period = 0.0;
|
||||||
d_symbols_per_bit = 0;
|
d_symbols_per_bit = 0;
|
||||||
}
|
}
|
||||||
d_T_chip_seconds = 0.0;
|
|
||||||
d_T_prn_seconds = 0.0;
|
|
||||||
d_T_prn_samples = 0.0;
|
|
||||||
d_K_blk_samples = 0.0;
|
|
||||||
|
|
||||||
// Initialize tracking ==========================================
|
// Initialize tracking ==========================================
|
||||||
d_code_loop_filter = Tracking_loop_filter(static_cast<float>(d_code_period), d_trk_parameters.dll_bw_hz, d_trk_parameters.dll_filter_order, false);
|
d_code_loop_filter = Tracking_loop_filter(static_cast<float>(d_code_period), d_trk_parameters.dll_bw_hz, d_trk_parameters.dll_filter_order, false);
|
||||||
@ -353,30 +388,13 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
|
|||||||
|
|
||||||
// --- Initializations ---
|
// --- Initializations ---
|
||||||
d_Prompt_circular_buffer.set_capacity(d_secondary_code_length);
|
d_Prompt_circular_buffer.set_capacity(d_secondary_code_length);
|
||||||
|
|
||||||
// Initial code frequency basis of NCO
|
// Initial code frequency basis of NCO
|
||||||
d_code_freq_chips = d_code_chip_rate;
|
d_code_freq_chips = d_code_chip_rate;
|
||||||
// Residual code phase (in chips)
|
|
||||||
d_rem_code_phase_samples = 0.0;
|
|
||||||
d_rem_code_phase_samples_prev = 0.0; // previously calculated d_rem_code_phase_samples
|
|
||||||
// Residual carrier phase
|
|
||||||
d_rem_carr_phase_rad = 0.0;
|
|
||||||
|
|
||||||
// sample synchronization
|
|
||||||
d_sample_counter = 0ULL;
|
|
||||||
d_acq_sample_stamp = 0ULL;
|
|
||||||
|
|
||||||
d_current_integration_length_samples = static_cast<int32_t>(d_trk_parameters.vector_length);
|
|
||||||
d_next_integration_length_samples = d_current_integration_length_samples;
|
d_next_integration_length_samples = d_current_integration_length_samples;
|
||||||
d_current_correlation_time_s = 0.0;
|
|
||||||
|
|
||||||
// CN0 estimation and lock detector buffers
|
// CN0 estimation and lock detector buffers
|
||||||
d_cn0_estimation_counter = 0;
|
|
||||||
d_Prompt_buffer = volk_gnsssdr::vector<gr_complex>(d_trk_parameters.cn0_samples);
|
d_Prompt_buffer = volk_gnsssdr::vector<gr_complex>(d_trk_parameters.cn0_samples);
|
||||||
d_carrier_lock_test = 1.0;
|
|
||||||
d_CN0_SNV_dB_Hz = 0.0;
|
|
||||||
d_carrier_lock_fail_counter = 0;
|
|
||||||
d_code_lock_fail_counter = 0;
|
|
||||||
d_carrier_lock_threshold = d_trk_parameters.carrier_lock_th;
|
|
||||||
d_Prompt_Data = volk_gnsssdr::vector<gr_complex>(1);
|
d_Prompt_Data = volk_gnsssdr::vector<gr_complex>(1);
|
||||||
d_cn0_smoother = Exponential_Smoother();
|
d_cn0_smoother = Exponential_Smoother();
|
||||||
d_cn0_smoother.set_alpha(d_trk_parameters.cn0_smoother_alpha);
|
d_cn0_smoother.set_alpha(d_trk_parameters.cn0_smoother_alpha);
|
||||||
@ -391,20 +409,6 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
|
|||||||
d_carrier_lock_test_smoother.set_offset(0.0);
|
d_carrier_lock_test_smoother.set_offset(0.0);
|
||||||
d_carrier_lock_test_smoother.set_samples_for_initialization(d_trk_parameters.carrier_lock_test_smoother_samples);
|
d_carrier_lock_test_smoother.set_samples_for_initialization(d_trk_parameters.carrier_lock_test_smoother_samples);
|
||||||
|
|
||||||
d_acquisition_gnss_synchro = nullptr;
|
|
||||||
d_channel = 0;
|
|
||||||
d_acq_code_phase_samples = 0.0;
|
|
||||||
d_acq_carrier_doppler_hz = 0.0;
|
|
||||||
d_carrier_doppler_hz = 0.0;
|
|
||||||
d_acc_carrier_phase_rad = 0.0;
|
|
||||||
|
|
||||||
d_extend_correlation_symbols_count = 0;
|
|
||||||
d_code_phase_step_chips = 0.0;
|
|
||||||
d_code_phase_rate_step_chips = 0.0;
|
|
||||||
d_carrier_phase_step_rad = 0.0;
|
|
||||||
d_carrier_phase_rate_step_rad = 0.0;
|
|
||||||
d_rem_code_phase_chips = 0.0;
|
|
||||||
d_state = 1; // initial state: standby
|
|
||||||
clear_tracking_vars();
|
clear_tracking_vars();
|
||||||
if (d_trk_parameters.smoother_length > 0)
|
if (d_trk_parameters.smoother_length > 0)
|
||||||
{
|
{
|
||||||
@ -417,8 +421,12 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
|
|||||||
d_code_ph_history.set_capacity(1);
|
d_code_ph_history.set_capacity(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
d_dump = d_trk_parameters.dump;
|
// create multicorrelator class
|
||||||
d_dump_mat = d_trk_parameters.dump_mat and d_dump;
|
int32_t *ca_codes = d_trk_parameters.ca_codes;
|
||||||
|
int32_t *data_codes = d_trk_parameters.data_codes;
|
||||||
|
d_multicorrelator_fpga = std::make_shared<Fpga_Multicorrelator_8sc>(d_n_correlator_taps, ca_codes, data_codes, d_code_length_chips, d_trk_parameters.track_pilot, d_code_samples_per_chip);
|
||||||
|
d_multicorrelator_fpga->set_output_vectors(d_correlator_outs.data(), d_Prompt_Data.data());
|
||||||
|
|
||||||
if (d_dump)
|
if (d_dump)
|
||||||
{
|
{
|
||||||
d_dump_filename = d_trk_parameters.dump_filename;
|
d_dump_filename = d_trk_parameters.dump_filename;
|
||||||
@ -452,21 +460,6 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
|
|||||||
d_dump = false;
|
d_dump = false;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
// create multicorrelator class
|
|
||||||
int32_t *ca_codes = d_trk_parameters.ca_codes;
|
|
||||||
int32_t *data_codes = d_trk_parameters.data_codes;
|
|
||||||
d_multicorrelator_fpga = std::make_shared<Fpga_Multicorrelator_8sc>(d_n_correlator_taps, ca_codes, data_codes, d_code_length_chips, d_trk_parameters.track_pilot, d_code_samples_per_chip);
|
|
||||||
d_multicorrelator_fpga->set_output_vectors(d_correlator_outs.data(), d_Prompt_Data.data());
|
|
||||||
d_sample_counter_next = 0ULL;
|
|
||||||
|
|
||||||
d_corrected_doppler = false;
|
|
||||||
|
|
||||||
d_worker_is_done = false;
|
|
||||||
|
|
||||||
d_stop_tracking = false;
|
|
||||||
|
|
||||||
d_acc_carrier_phase_initialized = false;
|
|
||||||
d_Flag_PLL_180_deg_phase_locked = false;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -757,7 +750,7 @@ void dll_pll_veml_tracking_fpga::run_dll_pll()
|
|||||||
if (d_dll_filt_history.full())
|
if (d_dll_filt_history.full())
|
||||||
{
|
{
|
||||||
const float avg_code_error_chips_s = static_cast<float>(std::accumulate(d_dll_filt_history.begin(), d_dll_filt_history.end(), 0.0)) / static_cast<float>(d_dll_filt_history.capacity());
|
const float avg_code_error_chips_s = static_cast<float>(std::accumulate(d_dll_filt_history.begin(), d_dll_filt_history.end(), 0.0)) / static_cast<float>(d_dll_filt_history.capacity());
|
||||||
if (fabs(avg_code_error_chips_s) > 1.0)
|
if (std::fabs(avg_code_error_chips_s) > 1.0)
|
||||||
{
|
{
|
||||||
const float carrier_doppler_error_hz = static_cast<float>(d_signal_carrier_freq) * avg_code_error_chips_s / static_cast<float>(d_code_chip_rate);
|
const float carrier_doppler_error_hz = static_cast<float>(d_signal_carrier_freq) * avg_code_error_chips_s / static_cast<float>(d_code_chip_rate);
|
||||||
LOG(INFO) << "Detected and corrected carrier doppler error: " << carrier_doppler_error_hz << " [Hz] on sat " << Gnss_Satellite(d_systemName, d_acquisition_gnss_synchro->PRN);
|
LOG(INFO) << "Detected and corrected carrier doppler error: " << carrier_doppler_error_hz << " [Hz] on sat " << Gnss_Satellite(d_systemName, d_acquisition_gnss_synchro->PRN);
|
||||||
|
@ -23,18 +23,6 @@
|
|||||||
#include <cmath>
|
#include <cmath>
|
||||||
|
|
||||||
|
|
||||||
Cpu_Multicorrelator::Cpu_Multicorrelator()
|
|
||||||
{
|
|
||||||
d_sig_in = nullptr;
|
|
||||||
d_local_code_in = nullptr;
|
|
||||||
d_shifts_chips = nullptr;
|
|
||||||
d_corr_out = nullptr;
|
|
||||||
d_local_codes_resampled = nullptr;
|
|
||||||
d_code_length_chips = 0;
|
|
||||||
d_n_correlators = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
Cpu_Multicorrelator::~Cpu_Multicorrelator()
|
Cpu_Multicorrelator::~Cpu_Multicorrelator()
|
||||||
{
|
{
|
||||||
if (d_local_codes_resampled != nullptr)
|
if (d_local_codes_resampled != nullptr)
|
||||||
|
@ -37,7 +37,7 @@
|
|||||||
class Cpu_Multicorrelator
|
class Cpu_Multicorrelator
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
Cpu_Multicorrelator();
|
Cpu_Multicorrelator() = default;
|
||||||
~Cpu_Multicorrelator();
|
~Cpu_Multicorrelator();
|
||||||
bool init(int max_signal_length_samples, int n_correlators);
|
bool init(int max_signal_length_samples, int n_correlators);
|
||||||
bool set_local_code_and_taps(int code_length_chips, const std::complex<float> *local_code_in, float *shifts_chips);
|
bool set_local_code_and_taps(int code_length_chips, const std::complex<float> *local_code_in, float *shifts_chips);
|
||||||
@ -48,13 +48,13 @@ public:
|
|||||||
|
|
||||||
private:
|
private:
|
||||||
// Allocate the device input vectors
|
// Allocate the device input vectors
|
||||||
const std::complex<float> *d_sig_in;
|
const std::complex<float> *d_sig_in{nullptr};
|
||||||
const std::complex<float> *d_local_code_in;
|
const std::complex<float> *d_local_code_in{nullptr};
|
||||||
std::complex<float> **d_local_codes_resampled;
|
std::complex<float> **d_local_codes_resampled{nullptr};
|
||||||
std::complex<float> *d_corr_out;
|
std::complex<float> *d_corr_out{nullptr};
|
||||||
float *d_shifts_chips;
|
float *d_shifts_chips{nullptr};
|
||||||
int d_code_length_chips;
|
int d_code_length_chips{0};
|
||||||
int d_n_correlators;
|
int d_n_correlators{0};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -91,18 +91,6 @@ bool Cpu_Multicorrelator_16sc::Carrier_wipeoff_multicorrelator_resampler(
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
Cpu_Multicorrelator_16sc::Cpu_Multicorrelator_16sc()
|
|
||||||
{
|
|
||||||
d_sig_in = nullptr;
|
|
||||||
d_local_code_in = nullptr;
|
|
||||||
d_shifts_chips = nullptr;
|
|
||||||
d_corr_out = nullptr;
|
|
||||||
d_local_codes_resampled = nullptr;
|
|
||||||
d_code_length_chips = 0;
|
|
||||||
d_n_correlators = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
Cpu_Multicorrelator_16sc::~Cpu_Multicorrelator_16sc()
|
Cpu_Multicorrelator_16sc::~Cpu_Multicorrelator_16sc()
|
||||||
{
|
{
|
||||||
if (d_local_codes_resampled != nullptr)
|
if (d_local_codes_resampled != nullptr)
|
||||||
|
@ -35,7 +35,7 @@
|
|||||||
class Cpu_Multicorrelator_16sc
|
class Cpu_Multicorrelator_16sc
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
Cpu_Multicorrelator_16sc();
|
Cpu_Multicorrelator_16sc() = default;
|
||||||
~Cpu_Multicorrelator_16sc();
|
~Cpu_Multicorrelator_16sc();
|
||||||
bool init(int max_signal_length_samples, int n_correlators);
|
bool init(int max_signal_length_samples, int n_correlators);
|
||||||
bool set_local_code_and_taps(int code_length_chips, const lv_16sc_t *local_code_in, float *shifts_chips);
|
bool set_local_code_and_taps(int code_length_chips, const lv_16sc_t *local_code_in, float *shifts_chips);
|
||||||
@ -46,13 +46,13 @@ public:
|
|||||||
|
|
||||||
private:
|
private:
|
||||||
// Allocate the device input vectors
|
// Allocate the device input vectors
|
||||||
const lv_16sc_t *d_sig_in;
|
const lv_16sc_t *d_sig_in{nullptr};
|
||||||
const lv_16sc_t *d_local_code_in;
|
const lv_16sc_t *d_local_code_in{nullptr};
|
||||||
lv_16sc_t **d_local_codes_resampled;
|
lv_16sc_t **d_local_codes_resampled{nullptr};
|
||||||
lv_16sc_t *d_corr_out;
|
lv_16sc_t *d_corr_out{nullptr};
|
||||||
float *d_shifts_chips;
|
float *d_shifts_chips{nullptr};
|
||||||
int d_code_length_chips;
|
int d_code_length_chips{0};
|
||||||
int d_n_correlators;
|
int d_n_correlators{0};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -23,18 +23,6 @@
|
|||||||
#include <volk_gnsssdr/volk_gnsssdr.h>
|
#include <volk_gnsssdr/volk_gnsssdr.h>
|
||||||
#include <cmath>
|
#include <cmath>
|
||||||
|
|
||||||
Cpu_Multicorrelator_Real_Codes::Cpu_Multicorrelator_Real_Codes()
|
|
||||||
{
|
|
||||||
d_sig_in = nullptr;
|
|
||||||
d_local_code_in = nullptr;
|
|
||||||
d_shifts_chips = nullptr;
|
|
||||||
d_corr_out = nullptr;
|
|
||||||
d_local_codes_resampled = nullptr;
|
|
||||||
d_code_length_chips = 0;
|
|
||||||
d_n_correlators = 0;
|
|
||||||
d_use_high_dynamics_resampler = true;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
Cpu_Multicorrelator_Real_Codes::~Cpu_Multicorrelator_Real_Codes()
|
Cpu_Multicorrelator_Real_Codes::~Cpu_Multicorrelator_Real_Codes()
|
||||||
{
|
{
|
||||||
|
@ -37,7 +37,7 @@
|
|||||||
class Cpu_Multicorrelator_Real_Codes
|
class Cpu_Multicorrelator_Real_Codes
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
Cpu_Multicorrelator_Real_Codes();
|
Cpu_Multicorrelator_Real_Codes() = default;
|
||||||
void set_high_dynamics_resampler(bool use_high_dynamics_resampler);
|
void set_high_dynamics_resampler(bool use_high_dynamics_resampler);
|
||||||
~Cpu_Multicorrelator_Real_Codes();
|
~Cpu_Multicorrelator_Real_Codes();
|
||||||
bool init(int max_signal_length_samples, int n_correlators);
|
bool init(int max_signal_length_samples, int n_correlators);
|
||||||
@ -50,14 +50,14 @@ public:
|
|||||||
|
|
||||||
private:
|
private:
|
||||||
// Allocate the device input vectors
|
// Allocate the device input vectors
|
||||||
const std::complex<float> *d_sig_in;
|
const std::complex<float> *d_sig_in{nullptr};
|
||||||
const float *d_local_code_in;
|
const float *d_local_code_in{nullptr};
|
||||||
std::complex<float> *d_corr_out;
|
std::complex<float> *d_corr_out{nullptr};
|
||||||
float **d_local_codes_resampled;
|
float **d_local_codes_resampled{nullptr};
|
||||||
float *d_shifts_chips;
|
float *d_shifts_chips{nullptr};
|
||||||
int d_code_length_chips;
|
int d_code_length_chips{0};
|
||||||
int d_n_correlators;
|
int d_n_correlators{0};
|
||||||
bool d_use_high_dynamics_resampler;
|
bool d_use_high_dynamics_resampler{true};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -21,55 +21,15 @@
|
|||||||
#include <glog/logging.h>
|
#include <glog/logging.h>
|
||||||
|
|
||||||
|
|
||||||
Dll_Pll_Conf::Dll_Pll_Conf()
|
Dll_Pll_Conf::Dll_Pll_Conf() : carrier_lock_th(FLAGS_carrier_lock_th),
|
||||||
|
cn0_samples(FLAGS_cn0_samples),
|
||||||
|
cn0_min(FLAGS_cn0_min),
|
||||||
|
max_code_lock_fail(FLAGS_max_lock_fail),
|
||||||
|
max_carrier_lock_fail(FLAGS_max_carrier_lock_fail)
|
||||||
{
|
{
|
||||||
/* DLL/PLL tracking configuration */
|
|
||||||
high_dyn = false;
|
|
||||||
smoother_length = 10;
|
|
||||||
fs_in = 2000000.0;
|
|
||||||
vector_length = 0U;
|
|
||||||
dump = false;
|
|
||||||
dump_mat = true;
|
|
||||||
dump_filename = std::string("./dll_pll_dump.dat");
|
|
||||||
enable_fll_pull_in = false;
|
|
||||||
enable_fll_steady_state = false;
|
|
||||||
pull_in_time_s = 10;
|
|
||||||
bit_synchronization_time_limit_s = pull_in_time_s + 10;
|
|
||||||
fll_filter_order = 1;
|
|
||||||
pll_filter_order = 3;
|
|
||||||
dll_filter_order = 2;
|
|
||||||
fll_bw_hz = 35.0;
|
|
||||||
pll_pull_in_bw_hz = 50.0;
|
|
||||||
dll_pull_in_bw_hz = 3.0;
|
|
||||||
pll_bw_hz = 35.0;
|
|
||||||
dll_bw_hz = 2.0;
|
|
||||||
pll_bw_narrow_hz = 5.0;
|
|
||||||
dll_bw_narrow_hz = 0.75;
|
|
||||||
early_late_space_chips = 0.25;
|
|
||||||
very_early_late_space_chips = 0.5;
|
|
||||||
early_late_space_narrow_chips = 0.15;
|
|
||||||
very_early_late_space_narrow_chips = 0.5;
|
|
||||||
slope = 1.0;
|
|
||||||
spc = 0.5;
|
|
||||||
y_intercept = 1.0;
|
|
||||||
carrier_aiding = true;
|
|
||||||
extend_correlation_symbols = 1;
|
|
||||||
cn0_samples = FLAGS_cn0_samples;
|
|
||||||
cn0_smoother_samples = 200;
|
|
||||||
cn0_smoother_alpha = 0.002;
|
|
||||||
carrier_lock_test_smoother_alpha = 0.002;
|
|
||||||
carrier_lock_test_smoother_samples = 25;
|
|
||||||
cn0_min = FLAGS_cn0_min;
|
|
||||||
max_carrier_lock_fail = FLAGS_max_carrier_lock_fail;
|
|
||||||
max_code_lock_fail = FLAGS_max_lock_fail;
|
|
||||||
carrier_lock_th = FLAGS_carrier_lock_th;
|
|
||||||
track_pilot = true;
|
|
||||||
enable_doppler_correction = false;
|
|
||||||
system = 'G';
|
|
||||||
signal[0] = '1';
|
signal[0] = '1';
|
||||||
signal[1] = 'C';
|
signal[1] = 'C';
|
||||||
signal[2] = '\0';
|
signal[2] = '\0';
|
||||||
item_type = std::string("gr_complex");
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -36,50 +36,50 @@ public:
|
|||||||
void SetFromConfiguration(const ConfigurationInterface *configuration, const std::string &role);
|
void SetFromConfiguration(const ConfigurationInterface *configuration, const std::string &role);
|
||||||
|
|
||||||
/* DLL/PLL tracking configuration */
|
/* DLL/PLL tracking configuration */
|
||||||
std::string item_type;
|
std::string item_type{"gr_complex"};
|
||||||
std::string dump_filename;
|
std::string dump_filename{"./dll_pll_dump.dat"};
|
||||||
double fs_in;
|
double fs_in{2000000.0};
|
||||||
double carrier_lock_th;
|
double carrier_lock_th{0.0};
|
||||||
float pll_pull_in_bw_hz;
|
float pll_pull_in_bw_hz{50.0};
|
||||||
float dll_pull_in_bw_hz;
|
float dll_pull_in_bw_hz{3.0};
|
||||||
float fll_bw_hz;
|
float fll_bw_hz{35.0};
|
||||||
float pll_bw_hz;
|
float pll_bw_hz{35.0};
|
||||||
float dll_bw_hz;
|
float dll_bw_hz{2.0};
|
||||||
float pll_bw_narrow_hz;
|
float pll_bw_narrow_hz{5.0};
|
||||||
float dll_bw_narrow_hz;
|
float dll_bw_narrow_hz{0.75};
|
||||||
float early_late_space_chips;
|
float early_late_space_chips{0.25};
|
||||||
float very_early_late_space_chips;
|
float very_early_late_space_chips{0.5};
|
||||||
float early_late_space_narrow_chips;
|
float early_late_space_narrow_chips{0.15};
|
||||||
float very_early_late_space_narrow_chips;
|
float very_early_late_space_narrow_chips{0.5};
|
||||||
float slope;
|
float slope{1.0};
|
||||||
float spc;
|
float spc{0.5};
|
||||||
float y_intercept;
|
float y_intercept{1.0};
|
||||||
float cn0_smoother_alpha;
|
float cn0_smoother_alpha{0.002};
|
||||||
float carrier_lock_test_smoother_alpha;
|
float carrier_lock_test_smoother_alpha{0.002};
|
||||||
uint32_t pull_in_time_s;
|
uint32_t pull_in_time_s{10U};
|
||||||
uint32_t bit_synchronization_time_limit_s;
|
uint32_t bit_synchronization_time_limit_s{20U};
|
||||||
uint32_t vector_length;
|
uint32_t vector_length{0U};
|
||||||
uint32_t smoother_length;
|
uint32_t smoother_length{10U};
|
||||||
int32_t fll_filter_order;
|
int32_t fll_filter_order{1};
|
||||||
int32_t pll_filter_order;
|
int32_t pll_filter_order{3};
|
||||||
int32_t dll_filter_order;
|
int32_t dll_filter_order{2};
|
||||||
int32_t extend_correlation_symbols;
|
int32_t extend_correlation_symbols{1};
|
||||||
int32_t cn0_samples;
|
int32_t cn0_samples{0};
|
||||||
int32_t cn0_smoother_samples;
|
int32_t cn0_smoother_samples{200};
|
||||||
int32_t carrier_lock_test_smoother_samples;
|
int32_t carrier_lock_test_smoother_samples{25};
|
||||||
int32_t cn0_min;
|
int32_t cn0_min{0};
|
||||||
int32_t max_code_lock_fail;
|
int32_t max_code_lock_fail{0};
|
||||||
int32_t max_carrier_lock_fail;
|
int32_t max_carrier_lock_fail{0};
|
||||||
char signal[3]{};
|
char signal[3]{};
|
||||||
char system;
|
char system{'G'};
|
||||||
bool enable_fll_pull_in;
|
bool enable_fll_pull_in{false};
|
||||||
bool enable_fll_steady_state;
|
bool enable_fll_steady_state{false};
|
||||||
bool track_pilot;
|
bool track_pilot{true};
|
||||||
bool enable_doppler_correction;
|
bool enable_doppler_correction{false};
|
||||||
bool carrier_aiding;
|
bool carrier_aiding{true};
|
||||||
bool high_dyn;
|
bool high_dyn{false};
|
||||||
bool dump;
|
bool dump{false};
|
||||||
bool dump_mat;
|
bool dump_mat{true};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -22,63 +22,15 @@
|
|||||||
#include <glog/logging.h>
|
#include <glog/logging.h>
|
||||||
|
|
||||||
|
|
||||||
Dll_Pll_Conf_Fpga::Dll_Pll_Conf_Fpga()
|
Dll_Pll_Conf_Fpga::Dll_Pll_Conf_Fpga() : carrier_lock_th(FLAGS_carrier_lock_th),
|
||||||
|
cn0_samples(FLAGS_cn0_samples),
|
||||||
|
cn0_min(FLAGS_cn0_min),
|
||||||
|
max_code_lock_fail(FLAGS_max_lock_fail),
|
||||||
|
max_carrier_lock_fail(FLAGS_max_carrier_lock_fail)
|
||||||
{
|
{
|
||||||
/* DLL/PLL tracking configuration */
|
|
||||||
high_dyn = false;
|
|
||||||
smoother_length = 10;
|
|
||||||
fs_in = 12500000.0;
|
|
||||||
vector_length = 0U;
|
|
||||||
dump = false;
|
|
||||||
dump_mat = true;
|
|
||||||
dump_filename = std::string("./dll_pll_dump.dat");
|
|
||||||
enable_fll_pull_in = false;
|
|
||||||
enable_fll_steady_state = false;
|
|
||||||
pull_in_time_s = 10;
|
|
||||||
bit_synchronization_time_limit_s = pull_in_time_s + 60;
|
|
||||||
fll_filter_order = 1;
|
|
||||||
pll_filter_order = 3;
|
|
||||||
dll_filter_order = 2;
|
|
||||||
fll_bw_hz = 35.0;
|
|
||||||
pll_pull_in_bw_hz = 50.0;
|
|
||||||
dll_pull_in_bw_hz = 3.0;
|
|
||||||
pll_bw_hz = 5.0;
|
|
||||||
dll_bw_hz = 0.5;
|
|
||||||
pll_bw_narrow_hz = 2.0;
|
|
||||||
dll_bw_narrow_hz = 0.25;
|
|
||||||
early_late_space_chips = 0.25;
|
|
||||||
very_early_late_space_chips = 0.5;
|
|
||||||
early_late_space_narrow_chips = 0.15;
|
|
||||||
very_early_late_space_narrow_chips = 0.5;
|
|
||||||
slope = 1.0;
|
|
||||||
spc = 0.5;
|
|
||||||
y_intercept = 1.0;
|
|
||||||
carrier_aiding = true;
|
|
||||||
extend_correlation_symbols = 1;
|
|
||||||
cn0_samples = FLAGS_cn0_samples;
|
|
||||||
cn0_smoother_samples = 200;
|
|
||||||
cn0_smoother_alpha = 0.002;
|
|
||||||
carrier_lock_test_smoother_alpha = 0.002;
|
|
||||||
carrier_lock_test_smoother_samples = 25;
|
|
||||||
cn0_min = FLAGS_cn0_min;
|
|
||||||
max_carrier_lock_fail = FLAGS_max_carrier_lock_fail;
|
|
||||||
max_code_lock_fail = FLAGS_max_lock_fail;
|
|
||||||
carrier_lock_th = FLAGS_carrier_lock_th;
|
|
||||||
// max_lock_fail = 50;
|
|
||||||
enable_doppler_correction = false;
|
|
||||||
track_pilot = true;
|
|
||||||
system = 'G';
|
|
||||||
signal[0] = '1';
|
signal[0] = '1';
|
||||||
signal[1] = 'C';
|
signal[1] = 'C';
|
||||||
signal[2] = '\0';
|
signal[2] = '\0';
|
||||||
device_name = std::string("/dev/uio");
|
|
||||||
code_length_chips = 0U;
|
|
||||||
code_samples_per_chip = 0U;
|
|
||||||
ca_codes = nullptr;
|
|
||||||
data_codes = nullptr;
|
|
||||||
extended_correlation_in_fpga = false;
|
|
||||||
extend_fpga_integration_periods = 1;
|
|
||||||
fpga_integration_period = 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -38,65 +38,65 @@ public:
|
|||||||
void SetFromConfiguration(const ConfigurationInterface* configuration, const std::string& role);
|
void SetFromConfiguration(const ConfigurationInterface* configuration, const std::string& role);
|
||||||
|
|
||||||
/* DLL/PLL tracking configuration */
|
/* DLL/PLL tracking configuration */
|
||||||
std::string device_name;
|
std::string device_name{"/dev/uio"};
|
||||||
std::string dump_filename;
|
std::string dump_filename{"./dll_pll_dump.dat"};
|
||||||
|
|
||||||
double fs_in;
|
double fs_in{12500000.0};
|
||||||
double carrier_lock_th;
|
double carrier_lock_th{0.0};
|
||||||
|
|
||||||
float pll_pull_in_bw_hz;
|
float pll_pull_in_bw_hz{50.0};
|
||||||
float dll_pull_in_bw_hz;
|
float dll_pull_in_bw_hz{3.0};
|
||||||
float fll_bw_hz;
|
float fll_bw_hz{35.0};
|
||||||
float pll_bw_hz;
|
float pll_bw_hz{5.0};
|
||||||
float dll_bw_hz;
|
float dll_bw_hz{0.5};
|
||||||
float pll_bw_narrow_hz;
|
float pll_bw_narrow_hz{2.0};
|
||||||
float dll_bw_narrow_hz;
|
float dll_bw_narrow_hz{0.25};
|
||||||
float early_late_space_chips;
|
float early_late_space_chips{0.25};
|
||||||
float very_early_late_space_chips;
|
float very_early_late_space_chips{0.5};
|
||||||
float early_late_space_narrow_chips;
|
float early_late_space_narrow_chips{0.15};
|
||||||
float very_early_late_space_narrow_chips;
|
float very_early_late_space_narrow_chips{0.5};
|
||||||
float slope;
|
float slope{1.0};
|
||||||
float spc;
|
float spc{0.5};
|
||||||
float y_intercept;
|
float y_intercept{1.0};
|
||||||
float cn0_smoother_alpha;
|
float cn0_smoother_alpha{0.002};
|
||||||
float carrier_lock_test_smoother_alpha;
|
float carrier_lock_test_smoother_alpha{0.002};
|
||||||
|
|
||||||
uint32_t pull_in_time_s; // signed integer, when pull in time is not yet reached it has to be compared against a negative number
|
uint32_t pull_in_time_s{10U}; // signed integer, when pull in time is not yet reached it has to be compared against a negative number
|
||||||
uint32_t bit_synchronization_time_limit_s;
|
uint32_t bit_synchronization_time_limit_s{70U};
|
||||||
uint32_t vector_length;
|
uint32_t vector_length{0U};
|
||||||
uint32_t smoother_length;
|
uint32_t smoother_length{10U};
|
||||||
uint32_t code_length_chips;
|
uint32_t code_length_chips{0U};
|
||||||
uint32_t code_samples_per_chip;
|
uint32_t code_samples_per_chip{0U};
|
||||||
uint32_t extend_fpga_integration_periods;
|
uint32_t extend_fpga_integration_periods{1};
|
||||||
uint32_t fpga_integration_period;
|
uint32_t fpga_integration_period{0};
|
||||||
|
|
||||||
int32_t fll_filter_order;
|
int32_t fll_filter_order{1};
|
||||||
int32_t pll_filter_order;
|
int32_t pll_filter_order{3};
|
||||||
int32_t dll_filter_order;
|
int32_t dll_filter_order{2};
|
||||||
int32_t extend_correlation_symbols;
|
int32_t extend_correlation_symbols{1};
|
||||||
int32_t cn0_samples;
|
int32_t cn0_samples{0};
|
||||||
int32_t cn0_min;
|
int32_t cn0_min{0};
|
||||||
int32_t max_code_lock_fail;
|
int32_t max_code_lock_fail{0};
|
||||||
int32_t max_carrier_lock_fail;
|
int32_t max_carrier_lock_fail{0};
|
||||||
int32_t cn0_smoother_samples;
|
int32_t cn0_smoother_samples{200};
|
||||||
int32_t carrier_lock_test_smoother_samples;
|
int32_t carrier_lock_test_smoother_samples{25};
|
||||||
// int32_t max_lock_fail;
|
// int32_t max_lock_fail;
|
||||||
|
|
||||||
int32_t* ca_codes;
|
int32_t* ca_codes{nullptr};
|
||||||
int32_t* data_codes;
|
int32_t* data_codes{nullptr};
|
||||||
|
|
||||||
char signal[3];
|
char signal[3]{};
|
||||||
char system;
|
char system{'G'};
|
||||||
|
|
||||||
bool extended_correlation_in_fpga;
|
bool extended_correlation_in_fpga{false};
|
||||||
bool track_pilot;
|
bool track_pilot{true};
|
||||||
bool enable_doppler_correction;
|
bool enable_doppler_correction{false};
|
||||||
bool enable_fll_pull_in;
|
bool enable_fll_pull_in{false};
|
||||||
bool enable_fll_steady_state;
|
bool enable_fll_steady_state{false};
|
||||||
bool carrier_aiding;
|
bool carrier_aiding{true};
|
||||||
bool high_dyn;
|
bool high_dyn{false};
|
||||||
bool dump;
|
bool dump{false};
|
||||||
bool dump_mat;
|
bool dump_mat{true};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -22,14 +22,6 @@
|
|||||||
|
|
||||||
Exponential_Smoother::Exponential_Smoother()
|
Exponential_Smoother::Exponential_Smoother()
|
||||||
{
|
{
|
||||||
alpha_ = 0.001;
|
|
||||||
old_value_ = 0.0;
|
|
||||||
one_minus_alpha_ = 1.0F - alpha_;
|
|
||||||
samples_for_initialization_ = 200;
|
|
||||||
initializing_ = true;
|
|
||||||
init_counter_ = 0;
|
|
||||||
min_value_ = 25.0;
|
|
||||||
offset_ = 12.0;
|
|
||||||
init_buffer_.reserve(samples_for_initialization_);
|
init_buffer_.reserve(samples_for_initialization_);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -55,14 +55,14 @@ public:
|
|||||||
|
|
||||||
private:
|
private:
|
||||||
std::vector<float> init_buffer_;
|
std::vector<float> init_buffer_;
|
||||||
float alpha_; // takes value 0.0001 if not set
|
float alpha_{0.001};
|
||||||
float one_minus_alpha_;
|
float one_minus_alpha_{0.999};
|
||||||
float old_value_;
|
float old_value_{0.0};
|
||||||
float min_value_;
|
float min_value_{25.0};
|
||||||
float offset_;
|
float offset_{12.0};
|
||||||
int samples_for_initialization_;
|
int samples_for_initialization_{200};
|
||||||
int init_counter_;
|
int init_counter_{0};
|
||||||
bool initializing_;
|
bool initializing_{true};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -52,12 +52,28 @@ Fpga_Multicorrelator_8sc::Fpga_Multicorrelator_8sc(int32_t n_correlators,
|
|||||||
uint32_t code_length_chips,
|
uint32_t code_length_chips,
|
||||||
bool track_pilot,
|
bool track_pilot,
|
||||||
uint32_t code_samples_per_chip)
|
uint32_t code_samples_per_chip)
|
||||||
|
: d_initial_sample_counter(0),
|
||||||
|
d_corr_out(nullptr),
|
||||||
|
d_Prompt_Data(nullptr),
|
||||||
|
d_shifts_chips(nullptr),
|
||||||
|
d_prompt_data_shift(nullptr),
|
||||||
|
d_rem_code_phase_chips(0),
|
||||||
|
d_code_phase_step_chips(0),
|
||||||
|
d_rem_carrier_phase_in_rad(0),
|
||||||
|
d_phase_step_rad(0),
|
||||||
|
d_code_length_samples(code_length_chips * code_samples_per_chip),
|
||||||
|
d_n_correlators(n_correlators),
|
||||||
|
d_device_descriptor(0),
|
||||||
|
d_map_base(nullptr),
|
||||||
|
d_correlator_length_samples(0),
|
||||||
|
d_code_phase_step_chips_num(0),
|
||||||
|
d_rem_carr_phase_rad_int(0),
|
||||||
|
d_phase_step_rad_int(0),
|
||||||
|
d_ca_codes(ca_codes),
|
||||||
|
d_data_codes(data_codes),
|
||||||
|
d_track_pilot(track_pilot),
|
||||||
|
d_secondary_code_enabled(false)
|
||||||
{
|
{
|
||||||
d_n_correlators = n_correlators;
|
|
||||||
d_track_pilot = track_pilot;
|
|
||||||
d_device_descriptor = 0;
|
|
||||||
d_map_base = nullptr;
|
|
||||||
|
|
||||||
// instantiate variable length vectors
|
// instantiate variable length vectors
|
||||||
if (d_track_pilot)
|
if (d_track_pilot)
|
||||||
{
|
{
|
||||||
@ -69,26 +85,6 @@ Fpga_Multicorrelator_8sc::Fpga_Multicorrelator_8sc(int32_t n_correlators,
|
|||||||
d_initial_index = volk_gnsssdr::vector<uint32_t>(n_correlators);
|
d_initial_index = volk_gnsssdr::vector<uint32_t>(n_correlators);
|
||||||
d_initial_interp_counter = volk_gnsssdr::vector<uint32_t>(n_correlators);
|
d_initial_interp_counter = volk_gnsssdr::vector<uint32_t>(n_correlators);
|
||||||
}
|
}
|
||||||
d_shifts_chips = nullptr;
|
|
||||||
d_prompt_data_shift = nullptr;
|
|
||||||
d_Prompt_Data = nullptr;
|
|
||||||
d_corr_out = nullptr;
|
|
||||||
d_code_length_chips = 0;
|
|
||||||
d_rem_code_phase_chips = 0;
|
|
||||||
d_code_phase_step_chips = 0;
|
|
||||||
d_rem_carrier_phase_in_rad = 0;
|
|
||||||
d_phase_step_rad = 0;
|
|
||||||
d_rem_carr_phase_rad_int = 0;
|
|
||||||
d_phase_step_rad_int = 0;
|
|
||||||
d_initial_sample_counter = 0;
|
|
||||||
d_correlator_length_samples = 0;
|
|
||||||
d_code_phase_step_chips_num = 0;
|
|
||||||
d_code_length_chips = code_length_chips;
|
|
||||||
d_ca_codes = ca_codes;
|
|
||||||
d_data_codes = data_codes;
|
|
||||||
d_code_samples_per_chip = code_samples_per_chip;
|
|
||||||
d_code_length_samples = d_code_length_chips * d_code_samples_per_chip;
|
|
||||||
d_secondary_code_enabled = false;
|
|
||||||
|
|
||||||
DLOG(INFO) << "TRACKING FPGA CLASS CREATED";
|
DLOG(INFO) << "TRACKING FPGA CLASS CREATED";
|
||||||
}
|
}
|
||||||
|
@ -221,7 +221,6 @@ private:
|
|||||||
float d_phase_step_rad;
|
float d_phase_step_rad;
|
||||||
float d_carrier_phase_rate_step_rad;
|
float d_carrier_phase_rate_step_rad;
|
||||||
|
|
||||||
uint32_t d_code_length_chips;
|
|
||||||
uint32_t d_code_length_samples;
|
uint32_t d_code_length_samples;
|
||||||
uint32_t d_n_correlators; // number of correlators
|
uint32_t d_n_correlators; // number of correlators
|
||||||
|
|
||||||
@ -231,7 +230,6 @@ private:
|
|||||||
|
|
||||||
// configuration data received from the interface
|
// configuration data received from the interface
|
||||||
uint32_t d_correlator_length_samples;
|
uint32_t d_correlator_length_samples;
|
||||||
uint32_t d_code_samples_per_chip;
|
|
||||||
|
|
||||||
uint32_t d_code_phase_step_chips_num;
|
uint32_t d_code_phase_step_chips_num;
|
||||||
uint32_t d_code_phase_rate_step_chips_num;
|
uint32_t d_code_phase_rate_step_chips_num;
|
||||||
|
@ -59,17 +59,15 @@ float Tracking_2nd_DLL_filter::get_code_nco(float DLL_discriminator)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
Tracking_2nd_DLL_filter::Tracking_2nd_DLL_filter(float pdi_code)
|
Tracking_2nd_DLL_filter::Tracking_2nd_DLL_filter(float pdi_code) : d_pdi_code(pdi_code),
|
||||||
|
d_dlldampingratio(0.7)
|
||||||
{
|
{
|
||||||
d_pdi_code = pdi_code; // Summation interval for code
|
|
||||||
d_dlldampingratio = 0.7;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
Tracking_2nd_DLL_filter::Tracking_2nd_DLL_filter()
|
Tracking_2nd_DLL_filter::Tracking_2nd_DLL_filter() : d_pdi_code(0.001),
|
||||||
|
d_dlldampingratio(0.7)
|
||||||
{
|
{
|
||||||
d_pdi_code = 0.001; // Summation interval for code
|
|
||||||
d_dlldampingratio = 0.7;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -63,19 +63,15 @@ float Tracking_2nd_PLL_filter::get_carrier_nco(float PLL_discriminator)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
Tracking_2nd_PLL_filter::Tracking_2nd_PLL_filter(float pdi_carr)
|
Tracking_2nd_PLL_filter::Tracking_2nd_PLL_filter(float pdi_carr) : d_pdi_carr(pdi_carr),
|
||||||
|
d_plldampingratio(0.7)
|
||||||
{
|
{
|
||||||
// PLL variables
|
|
||||||
d_pdi_carr = pdi_carr; // Summation interval for carrier
|
|
||||||
d_plldampingratio = 0.7;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
Tracking_2nd_PLL_filter::Tracking_2nd_PLL_filter()
|
Tracking_2nd_PLL_filter::Tracking_2nd_PLL_filter() : d_pdi_carr(0.001),
|
||||||
|
d_plldampingratio(0.7)
|
||||||
{
|
{
|
||||||
// PLL variables
|
|
||||||
d_pdi_carr = 0.001; // Summation interval for carrier
|
|
||||||
d_plldampingratio = 0.7;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -20,22 +20,6 @@
|
|||||||
#include "tracking_FLL_PLL_filter.h"
|
#include "tracking_FLL_PLL_filter.h"
|
||||||
|
|
||||||
|
|
||||||
Tracking_FLL_PLL_filter::Tracking_FLL_PLL_filter()
|
|
||||||
{
|
|
||||||
d_order = 0;
|
|
||||||
d_pll_w = 0.0;
|
|
||||||
d_pll_w0p3 = 0.0;
|
|
||||||
d_pll_w0f2 = 0.0;
|
|
||||||
d_pll_x = 0.0;
|
|
||||||
d_pll_a2 = 0.0;
|
|
||||||
d_pll_w0f = 0.0;
|
|
||||||
d_pll_a3 = 0.0;
|
|
||||||
d_pll_w0p2 = 0.0;
|
|
||||||
d_pll_b3 = 0.0;
|
|
||||||
d_pll_w0p = 0.0;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void Tracking_FLL_PLL_filter::set_params(float fll_bw_hz, float pll_bw_hz, int order)
|
void Tracking_FLL_PLL_filter::set_params(float fll_bw_hz, float pll_bw_hz, int order)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
|
@ -29,7 +29,7 @@
|
|||||||
class Tracking_FLL_PLL_filter
|
class Tracking_FLL_PLL_filter
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
Tracking_FLL_PLL_filter();
|
Tracking_FLL_PLL_filter() = default;
|
||||||
~Tracking_FLL_PLL_filter() = default;
|
~Tracking_FLL_PLL_filter() = default;
|
||||||
void set_params(float fll_bw_hz, float pll_bw_hz, int order);
|
void set_params(float fll_bw_hz, float pll_bw_hz, int order);
|
||||||
void initialize(float d_acq_carrier_doppler_hz);
|
void initialize(float d_acq_carrier_doppler_hz);
|
||||||
@ -37,17 +37,17 @@ public:
|
|||||||
|
|
||||||
private:
|
private:
|
||||||
// FLL + PLL filter parameters
|
// FLL + PLL filter parameters
|
||||||
float d_pll_w;
|
float d_pll_w{0.0};
|
||||||
float d_pll_w0p3;
|
float d_pll_w0p3{0.0};
|
||||||
float d_pll_w0f2;
|
float d_pll_w0f2{0.0};
|
||||||
float d_pll_x;
|
float d_pll_x{0.0};
|
||||||
float d_pll_a2;
|
float d_pll_a2{0.0};
|
||||||
float d_pll_w0f;
|
float d_pll_w0f{0.0};
|
||||||
float d_pll_a3;
|
float d_pll_a3{0.0};
|
||||||
float d_pll_w0p2;
|
float d_pll_w0p2{0.0};
|
||||||
float d_pll_b3;
|
float d_pll_b3{0.0};
|
||||||
float d_pll_w0p;
|
float d_pll_w0p{0.0};
|
||||||
int d_order;
|
int d_order{0};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user