mirrors/gnss-sdr
1
0
Fork 0
mirror of https://github.com/gnss-sdr/gnss-sdr synced 2024-11-05 01:26:24 +00:00
Code Issues Releases Wiki Activity

- set output vectors is only done in the class constructor, no need to do it continuously

Browse Source 
- no need to multiply by two the results of the multicorrelator HW accelerators
This commit is contained in:
mmajoral 2018-04-19 12:09:08 +02:00
parent ab534e7791
commit 6a3770c762
2 changed files with 2 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/algorithms/tracking/gnuradio_blocks/gps_l1_ca_dll_pll_tracking_fpga_sc.cc
View File

@ -172,6 +172,8 @@ Gps_L1_Ca_Dll_Pll_Tracking_fpga_sc::Gps_L1_Ca_Dll_Pll_Tracking_fpga_sc(
d_carrier_phase_step_rad = 0.0;
set_relative_rate(1.0 / static_cast<double>(d_vector_length));
multicorrelator_fpga_8sc->set_output_vectors(d_correlator_outs);
}
void Gps_L1_Ca_Dll_Pll_Tracking_fpga_sc::start_tracking()
@ -320,7 +322,6 @@ int Gps_L1_Ca_Dll_Pll_Tracking_fpga_sc::general_work (int noutput_items __attrib
// ################# CARRIER WIPEOFF AND CORRELATORS ##############################
// perform carrier wipe-off and compute Early, Prompt and Late correlation
multicorrelator_fpga_8sc->set_output_vectors(d_correlator_outs);
multicorrelator_fpga_8sc->Carrier_wipeoff_multicorrelator_resampler(
d_rem_carr_phase_rad, d_carrier_phase_step_rad,
d_rem_code_phase_chips, d_code_phase_step_chips,

2
src/algorithms/tracking/libs/fpga_multicorrelator_8sc.cc
View File

@ -403,14 +403,12 @@ void fpga_multicorrelator_8sc::read_tracking_gps_results(void)
{
readval_real = -2097152 + readval_real;
}
readval_real = readval_real * 2; // the results are shifted two bits to the left due to the complex multiplier in the FPGA
readval_imag = d_map_base[1 + d_n_correlators + k];
if (readval_imag >= 1048576) // 0x100000 (21 bits two's complement)
{
readval_imag = -2097152 + readval_imag;
}
readval_imag = readval_imag * 2; // the results are shifted two bits to the left due to the complex multiplier in the FPGA
d_corr_out[k] = gr_complex(readval_real,readval_imag);
}
}