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https://github.com/gnss-sdr/gnss-sdr
synced 2024-12-16 13:10:35 +00:00
Add carrier frequency variable
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@ -174,6 +174,7 @@ Glonass_L1_Ca_Dll_Pll_Tracking_cc::Glonass_L1_Ca_Dll_Pll_Tracking_cc(
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d_acq_code_phase_samples = 0.0;
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d_acq_carrier_doppler_hz = 0.0;
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d_carrier_doppler_hz = 0.0;
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d_carrier_frequency_hz = 0.0;
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d_acc_carrier_phase_rad = 0.0;
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d_code_phase_samples = 0.0;
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d_rem_code_phase_chips = 0.0;
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@ -228,9 +229,9 @@ void Glonass_L1_Ca_Dll_Pll_Tracking_cc::start_tracking()
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d_acq_code_phase_samples = corrected_acq_phase_samples;
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d_carrier_doppler_hz = d_acq_carrier_doppler_hz + d_if_freq + (DFRQ1_GLO * GLONASS_PRN.at(d_acquisition_gnss_synchro->PRN));
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// d_carrier_doppler_hz = d_acq_carrier_doppler_hz;
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d_carrier_phase_step_rad = GLONASS_TWO_PI * d_carrier_doppler_hz / static_cast<double>(d_fs_in);
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d_carrier_frequency_hz = d_acq_carrier_doppler_hz + d_if_freq + (DFRQ1_GLO * GLONASS_PRN.at(d_acquisition_gnss_synchro->PRN));
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d_carrier_doppler_hz = d_acq_carrier_doppler_hz;
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d_carrier_phase_step_rad = GLONASS_TWO_PI * d_carrier_frequency_hz / static_cast<double>(d_fs_in);
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// DLL/PLL filter initialization
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d_carrier_loop_filter.initialize(); // initialize the carrier filter
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@ -264,7 +265,7 @@ void Glonass_L1_Ca_Dll_Pll_Tracking_cc::start_tracking()
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d_pull_in = true;
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d_enable_tracking = true;
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LOG(INFO) << "PULL-IN Doppler [Hz]=" << d_carrier_doppler_hz
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LOG(INFO) << "PULL-IN Doppler [Hz]=" << d_carrier_frequency_hz
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<< " Code Phase correction [samples]=" << delay_correction_samples
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<< " PULL-IN Code Phase [samples]=" << d_acq_code_phase_samples;
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}
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@ -334,7 +335,7 @@ int Glonass_L1_Ca_Dll_Pll_Tracking_cc::general_work (int noutput_items __attribu
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// take into account the carrier cycles accumulated in the pull in signal alignment
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d_acc_carrier_phase_rad -= d_carrier_phase_step_rad * samples_offset;
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current_synchro_data.Carrier_phase_rads = d_acc_carrier_phase_rad;
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current_synchro_data.Carrier_Doppler_hz = d_carrier_doppler_hz;
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current_synchro_data.Carrier_Doppler_hz = d_carrier_frequency_hz;
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current_synchro_data.fs = d_fs_in;
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current_synchro_data.correlation_length_ms = 1;
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*out[0] = current_synchro_data;
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@ -358,6 +359,7 @@ int Glonass_L1_Ca_Dll_Pll_Tracking_cc::general_work (int noutput_items __attribu
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// Carrier discriminator filter
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carr_error_filt_hz = d_carrier_loop_filter.get_carrier_nco(carr_error_hz);
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// New carrier Doppler frequency estimation
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d_carrier_frequency_hz += carr_error_filt_hz;
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d_carrier_doppler_hz = d_acq_carrier_doppler_hz + carr_error_filt_hz;
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d_code_freq_chips = GLONASS_L1_CA_CODE_RATE_HZ + ((d_carrier_doppler_hz * GLONASS_L1_CA_CODE_RATE_HZ) / d_glonass_freq_ch);
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@ -382,7 +384,7 @@ int Glonass_L1_Ca_Dll_Pll_Tracking_cc::general_work (int noutput_items __attribu
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//################### PLL COMMANDS #################################################
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// carrier phase step (NCO phase increment per sample) [rads/sample]
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d_carrier_phase_step_rad = GLONASS_TWO_PI * d_carrier_doppler_hz / static_cast<double>(d_fs_in);
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d_carrier_phase_step_rad = GLONASS_TWO_PI * d_carrier_frequency_hz / static_cast<double>(d_fs_in);
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// remnant carrier phase to prevent overflow in the code NCO
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d_rem_carr_phase_rad = d_rem_carr_phase_rad + d_carrier_phase_step_rad * d_current_prn_length_samples;
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d_rem_carr_phase_rad = fmod(d_rem_carr_phase_rad, GLONASS_TWO_PI);
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@ -434,7 +436,7 @@ int Glonass_L1_Ca_Dll_Pll_Tracking_cc::general_work (int noutput_items __attribu
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current_synchro_data.Tracking_sample_counter = d_sample_counter + d_current_prn_length_samples;
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current_synchro_data.Code_phase_samples = d_rem_code_phase_samples;
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current_synchro_data.Carrier_phase_rads = d_acc_carrier_phase_rad;
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current_synchro_data.Carrier_Doppler_hz = d_carrier_doppler_hz;
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current_synchro_data.Carrier_Doppler_hz = d_carrier_frequency_hz;
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current_synchro_data.CN0_dB_hz = d_CN0_SNV_dB_Hz;
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current_synchro_data.Flag_valid_symbol_output = true;
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current_synchro_data.correlation_length_ms = 1;
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@ -483,7 +485,7 @@ int Glonass_L1_Ca_Dll_Pll_Tracking_cc::general_work (int noutput_items __attribu
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d_dump_file.write(reinterpret_cast<char*>(&d_acc_carrier_phase_rad), sizeof(double));
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// carrier and code frequency
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d_dump_file.write(reinterpret_cast<char*>(&d_carrier_doppler_hz), sizeof(double));
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d_dump_file.write(reinterpret_cast<char*>(&d_carrier_frequency_hz), sizeof(double));
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d_dump_file.write(reinterpret_cast<char*>(&d_code_freq_chips), sizeof(double));
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// PLL commands
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@ -140,6 +140,7 @@ private:
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double d_code_freq_chips;
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double d_code_phase_step_chips;
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double d_carrier_doppler_hz;
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double d_carrier_frequency_hz;
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double d_carrier_phase_step_rad;
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double d_acc_carrier_phase_rad;
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double d_code_phase_samples;
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