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https://github.com/gnss-sdr/gnss-sdr
synced 2025-11-06 18:23:05 +00:00
Minor code cleaning.
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@@ -33,9 +33,6 @@
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* -------------------------------------------------------------------------
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*/
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#include "fpga_acquisition.h"
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#include "gps_sdr_signal_processing.h"
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// libraries used by the GIPO
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#include <fcntl.h>
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#include <sys/mman.h>
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@@ -46,9 +43,23 @@
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// GPS L1
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#include "GPS_L1_CA.h"
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#define PAGE_SIZE 0x10000
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#define MAX_PHASE_STEP_RAD 0.999999999534339 // 1 - pow(2,-31);
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#define TEST_REG_SANITY_CHECK 0x55AA
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#include "fpga_acquisition.h"
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#include "gps_sdr_signal_processing.h"
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#define PAGE_SIZE 0x10000 // default page size for the multicorrelator memory map
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#define MAX_PHASE_STEP_RAD 0.999999999534339 // 1 - pow(2,-31);
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#define RESET_ACQUISITION 2 // command to reset the multicorrelator
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#define LAUNCH_ACQUISITION 1 // command to launch the multicorrelator
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#define TEST_REG_SANITY_CHECK 0x55AA // value to check the presence of the test register (to detect the hw)
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#define LOCAL_CODE_CLEAR_MEM 0x10000000 // command to clear the internal memory of the multicorrelator
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#define MEM_LOCAL_CODE_WR_ENABLE 0x0C000000 // command to enable the ENA and WR pins of the internal memory of the multicorrelator
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#define POW_2_2 4 // 2^2 (used for the conversion of floating point numbers to integers)
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#define POW_2_29 536870912 // 2^29 (used for the conversion of floating point numbers to integers)
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#define SELECT_LSB 0x00FF // value to select the least significant byte
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#define SELECT_MSB 0XFF00 // value to select the most significant byte
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#define SELECT_16_BITS 0xFFFF // value to select 16 bits
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#define SHL_8_BITS 256 // value used to shift a value 8 bits to the left
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bool fpga_acquisition::init()
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{
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@@ -144,14 +155,14 @@ void fpga_acquisition::fpga_configure_acquisition_local_code(lv_16sc_t fft_local
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unsigned int k, tmp, tmp2;
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unsigned int fft_data;
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// clear memory address counter
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d_map_base[4] = 0x10000000;
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d_map_base[4] = LOCAL_CODE_CLEAR_MEM;
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// write local code
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for (k = 0; k < d_vector_length; k++)
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{
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tmp = fft_local_code[k].real();
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tmp2 = fft_local_code[k].imag();
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local_code = (tmp & 0xFF) | ((tmp2 * 256) & 0xFF00); // put together the real part and the imaginary part
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fft_data = 0x0C000000 | (local_code & 0xFFFF);
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local_code = (tmp & SELECT_LSB) | ((tmp2 * SHL_8_BITS) & SELECT_MSB); // put together the real part and the imaginary part
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fft_data = MEM_LOCAL_CODE_WR_ENABLE | (local_code & SELECT_16_BITS);
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d_map_base[4] = fft_data;
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}
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}
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@@ -162,7 +173,7 @@ void fpga_acquisition::run_acquisition(void)
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int reenable = 1;
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write(d_fd, reinterpret_cast<void*>(&reenable), sizeof(int));
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// launch the acquisition process
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d_map_base[6] = 1; // writing anything to reg 6 launches the acquisition process
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d_map_base[6] = LAUNCH_ACQUISITION; // writing anything to reg 6 launches the acquisition process
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int irq_count;
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ssize_t nb;
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@@ -201,8 +212,8 @@ void fpga_acquisition::set_phase_step(unsigned int doppler_index)
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{
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phase_step_rad_real = MAX_PHASE_STEP_RAD;
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}
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phase_step_rad_int_temp = phase_step_rad_real * 4; // * 2^2
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phase_step_rad_int = (int32_t) (phase_step_rad_int_temp * (536870912)); // * 2^29 (in total it makes x2^31 in two steps to avoid the warnings
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phase_step_rad_int_temp = phase_step_rad_real * POW_2_2; // * 2^2
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phase_step_rad_int = (int32_t) (phase_step_rad_int_temp * (POW_2_29)); // * 2^29 (in total it makes x2^31 in two steps to avoid the warnings
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d_map_base[3] = phase_step_rad_int;
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}
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@@ -243,5 +254,5 @@ void fpga_acquisition::close_device()
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void fpga_acquisition::reset_acquisition(void)
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{
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d_map_base[6] = 2; // writing a 2 to d_map_base[6] resets the multicorrelator
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d_map_base[6] = RESET_ACQUISITION; // writing a 2 to d_map_base[6] resets the multicorrelator
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}
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