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https://github.com/gnss-sdr/gnss-sdr
synced 2024-12-14 04:00:34 +00:00
added the bit synchronization time limit and the doppler correction
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fc18eba4dd
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3095176524
@ -58,6 +58,7 @@
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#include <exception>
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#include <iostream>
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#include <map>
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#include <numeric>
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#include <vector>
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#if HAS_STD_FILESYSTEM
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@ -96,6 +97,7 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
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this->set_msg_handler(pmt::mp("telemetry_to_trk"), boost::bind(&dll_pll_veml_tracking_fpga::msg_handler_telemetry_to_trk, this, _1));
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// initialize internal vars
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d_dll_filt_history.set_capacity(2000);
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d_veml = false;
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d_cloop = true;
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d_pull_in_transitory = true;
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@ -563,11 +565,15 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
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d_num_current_syncrho_repetitions = 1;
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d_corrected_doppler = false;
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// debug - erase previous outfile contents
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std::ofstream outfile;
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outfile.open("trk_out.txt", std::ios_base::trunc);
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outfile.close();
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d_worker_is_done = false;
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}
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void dll_pll_veml_tracking_fpga::msg_handler_telemetry_to_trk(const pmt::pmt_t &msg)
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@ -623,6 +629,8 @@ void dll_pll_veml_tracking_fpga::start_tracking()
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d_carrier_loop_filter.initialize(static_cast<float>(d_acq_carrier_doppler_hz)); // initialize the carrier filter
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d_corrected_doppler = false;
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boost::mutex::scoped_lock lock(d_mutex);
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d_worker_is_done = true;
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m_condition.notify_one();
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@ -847,6 +855,29 @@ void dll_pll_veml_tracking_fpga::run_dll_pll()
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// New code Doppler frequency estimation
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d_code_freq_chips = (1.0 + (d_carrier_doppler_hz / d_signal_carrier_freq)) * d_code_chip_rate - d_code_error_filt_chips;
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// Experimental: detect Carrier Doppler vs. Code Doppler incoherence and correct the Carrier Doppler
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if (trk_parameters.enable_doppler_correction == true)
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{
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if (d_pull_in_transitory == false and d_corrected_doppler == false)
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{
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d_dll_filt_history.push_back(static_cast<float>(d_code_error_filt_chips));
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if (d_dll_filt_history.full())
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{
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float avg_code_error_chips_s = std::accumulate(d_dll_filt_history.begin(), d_dll_filt_history.end(), 0.0) / static_cast<float>(d_dll_filt_history.capacity());
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if (fabs(avg_code_error_chips_s) > 1.0)
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{
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float carrier_doppler_error_hz = static_cast<float>(d_signal_carrier_freq) * avg_code_error_chips_s / static_cast<float>(d_code_chip_rate);
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LOG(INFO) << "Detected and corrected carrier doppler error: " << carrier_doppler_error_hz << " [Hz] on sat " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN);
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d_carrier_loop_filter.initialize(d_carrier_doppler_hz - carrier_doppler_error_hz);
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d_corrected_doppler = true;
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}
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d_dll_filt_history.clear();
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}
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}
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}
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}
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@ -1974,6 +2005,14 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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d_P_accu = *d_Prompt;
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d_L_accu = *d_Late;
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//fail-safe: check if the secondary code or bit synchronization has not succedded in a limited time period
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if (trk_parameters.bit_synchronization_time_limit_s < (d_sample_counter - d_acq_sample_stamp) / static_cast<int>(trk_parameters.fs_in))
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{
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d_carrier_lock_fail_counter = 300000; //force loss-of-lock condition
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LOG(INFO) << systemName << " " << signal_pretty_name << " tracking synchronization time limit reached in channel " << d_channel
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<< " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << std::endl;
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}
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// Check lock status
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if (!cn0_and_tracking_lock_status(d_code_period))
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@ -124,6 +124,8 @@ private:
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int32_t d_preamble_length_symbols;
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boost::circular_buffer<float> d_symbol_history;
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// dll filter buffer
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boost::circular_buffer<float> d_dll_filt_history;
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// tracking state machine
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int32_t d_state;
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@ -180,6 +182,7 @@ private:
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// tracking vars
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bool d_pull_in_transitory;
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bool d_corrected_doppler;
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double d_current_correlation_time_s;
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double d_carr_phase_error_hz;
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double d_carr_freq_error_hz;
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@ -46,7 +46,8 @@ Dll_Pll_Conf_Fpga::Dll_Pll_Conf_Fpga()
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dump_filename = std::string("./dll_pll_dump.dat");
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enable_fll_pull_in = false;
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enable_fll_steady_state = false;
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pull_in_time_s = 2;
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pull_in_time_s = 10;
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bit_synchronization_time_limit_s = pull_in_time_s + 60;
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fll_filter_order = 1;
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pll_filter_order = 3;
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dll_filter_order = 2;
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@ -66,6 +67,7 @@ Dll_Pll_Conf_Fpga::Dll_Pll_Conf_Fpga()
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cn0_min = 25;
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max_lock_fail = 50;
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carrier_lock_th = 0.85;
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enable_doppler_correction = false;
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track_pilot = false;
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system = 'G';
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char sig_[3] = "1C";
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@ -46,6 +46,7 @@ public:
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bool enable_fll_pull_in;
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bool enable_fll_steady_state;
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unsigned int pull_in_time_s; // signed integer, when pull in time is not yet reached it has to be compared against a negative number
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unsigned int bit_synchronization_time_limit_s;
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int pll_filter_order;
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int dll_filter_order;
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@ -74,6 +75,7 @@ public:
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uint32_t smoother_length;
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double carrier_lock_th;
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bool track_pilot;
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bool enable_doppler_correction;
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char system;
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char signal[3];
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std::string device_name;
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