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The dynamic bit selector modules determine the uio device file that is assigned to them using the hardware accelerator device name in the FPGA. The Switch device name is not configurable.

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This commit is contained in:
Marc Majoral 2020-11-27 11:24:44 +01:00
parent 630f1932f2
commit 3047051835
2 changed files with 17 additions and 9 deletions
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23
src/algorithms/signal_source/adapters/ad9361_fpga_signal_source.cc
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@ -94,11 +94,10 @@ Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *con
// Switch UIO device file
std::string device_io_name;
std::string device_name = configuration->property(role + ".devicename", default_device_name);
// find the uio device file corresponding to the GNSS reset module
if (find_uio_dev_file_name(device_io_name, device_name, 0) < 0)
if (find_uio_dev_file_name(device_io_name, switch_device_name, 0) < 0)
{
std::cout << "Cannot find the FPGA uio device file corresponding to device name " << device_name << std::endl;
std::cout << "Cannot find the FPGA uio device file corresponding to device name " << switch_device_name << std::endl;
throw std::exception();
}
@ -302,11 +301,19 @@ Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *con
enable_dynamic_bit_selection_ = configuration->property(role + ".enable_dynamic_bit_selection", true);
if (enable_dynamic_bit_selection_)
{
const std::string dynamic_bit_selection_default_device_name1("/dev/uio48");
std::string device_name1 = configuration->property(role + ".dyn_bits_sel_devicename", dynamic_bit_selection_default_device_name1);
const std::string dynamic_bit_selection_default_device_name2("/dev/uio49");
std::string device_name2 = configuration->property(role + ".dyn_bits_sel_devicename", dynamic_bit_selection_default_device_name2);
dynamic_bit_selection_fpga = std::make_shared<Fpga_dynamic_bit_selection>(device_name1, device_name2);
std::string device_io_name_dyn_bit_sel_0, device_io_name_dyn_bit_sel_1;
if (find_uio_dev_file_name(device_io_name_dyn_bit_sel_0, dyn_bit_sel_device_name, 0) < 0)
{
std::cout << "Cannot find the FPGA uio device file corresponding to device name " << dyn_bit_sel_device_name << std::endl;
throw std::exception();
}
if (find_uio_dev_file_name(device_io_name_dyn_bit_sel_1, dyn_bit_sel_device_name, 1) < 0)
{
std::cout << "Cannot find the FPGA uio device file corresponding to device name " << dyn_bit_sel_device_name << std::endl;
throw std::exception();
}
dynamic_bit_selection_fpga = std::make_shared<Fpga_dynamic_bit_selection>(device_io_name_dyn_bit_sel_0, device_io_name_dyn_bit_sel_1);
thread_dynamic_bit_selection = std::thread([&] { run_dynamic_bit_selection_process(); });
}

3
src/algorithms/signal_source/adapters/ad9361_fpga_signal_source.h
View File

@ -76,7 +76,8 @@ public:
gr::basic_block_sptr get_right_block() override;
private:
const std::string default_device_name = "AXIS_Switch_v1_0_0"; // Switch UIO device name
const std::string switch_device_name = "AXIS_Switch_v1_0_0"; // Switch UIO device name
const std::string dyn_bit_sel_device_name = "dynamic_bits_selector"; // Switch UIO device name
// perform dynamic bit selection every 500 ms by default
static const uint32_t Gain_control_period_ms = 500;