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set up the receiver to work with the FPGA

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This commit is contained in:
mmajoral 2017-05-05 17:08:49 +02:00
parent 2ee29af3bd
commit 28058000de
5 changed files with 27 additions and 55 deletions
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1
conf/gnss-sdr_GPS_L1_FPGA.conf
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@ -31,6 +31,7 @@ SignalConditioner.enable_FPGA=true
Channels_1C.count=8
Channels.in_acquisition=1
Channel.signal=1C
Channel.enable_FPGA=true
;######### ACQUISITION GLOBAL CONFIG ############

27
src/algorithms/acquisition/libs/gps_fpga_acquisition_8sc.cc
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@ -36,7 +36,7 @@
#include "gps_fpga_acquisition_8sc.h"
#include <cmath>
// FPGA stuff
// allocate memory dynamically
#include <new>
// libraries used by DMA test code and GIPO test code
@ -62,7 +62,6 @@
#include "GPS_L1_CA.h"
#define PAGE_SIZE 0x10000
//#define MAX_LENGTH_DEVICEIO_NAME 50
#define CODE_RESAMPLER_NUM_BITS_PRECISION 20
#define CODE_PHASE_STEP_CHIPS_NUM_NBITS CODE_RESAMPLER_NUM_BITS_PRECISION
#define pwrtwo(x) (1 << (x))
@ -228,25 +227,9 @@ void gps_fpga_acquisition_8sc::fpga_configure_acquisition_local_code(lv_16sc_t f
tmp = fft_local_code[k].real();
tmp2 = fft_local_code[k].imag();
local_code = (tmp & 0xFF) | ((tmp2*256) & 0xFF00); // put together the real part and the imaginary part
if (k < 20)
{
printf("tmp tmp2 local_code = %d %d %d\n", tmp, tmp2, local_code);
}
d_map_base[4] = 0x0C000000 | (local_code & 0xFFFF);
}
FILE *f;
f = fopen("captured_local_code_dec.txt", "w");
if (!f)
{
printf("Unable to open file!");
}
for(k=0;k< d_nsamples_total;k++)
{
fprintf(f,"%d\n",fft_local_code[k].real()); // real part
fprintf(f,"%d\n",fft_local_code[k].imag()); // real part
}
fclose(f);
}
@ -282,9 +265,6 @@ void gps_fpga_acquisition_8sc::configure_acquisition()
d_map_base[1] = d_nsamples_total;
d_map_base[2] = d_nsamples;
printf("nsamples = %d\n", d_nsamples);
printf("nsamples_total = %d\n", d_nsamples_total);
printf("d_select_queue = %d\n", d_select_queue);
}
@ -307,19 +287,14 @@ void gps_fpga_acquisition_8sc::read_acquisition_results(uint32_t* max_index, flo
{
unsigned readval = 0;
readval = d_map_base[0];
printf("RESULT : result valid = %d\n", readval);
readval = d_map_base[1];
*initial_sample = readval;
printf("RESULT : initial sample = %d\n", *initial_sample);
readval = d_map_base[2];
*max_magnitude = (float) readval;
printf("RESULT : max_magnitude = %f\n", *max_magnitude);
readval = d_map_base[4];
*power_sum = (float) readval;
printf("RESULT : power sum = %f\n", *power_sum);
readval = d_map_base[3];
*max_index = readval;
printf("RESULT : max_index = %d\n", *max_index); // to avoid result_read line to stay high
}

22
src/algorithms/acquisition/libs/gps_fpga_acquisition_8sc.h
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@ -1,9 +1,8 @@
/*!
* \file fpga_acquisition_8sc.h
* \brief High optimized FPGA vector correlator class for lv_16sc_t (short int complex)
* \brief High optimized FPGA vector correlator class for lv_16sc_t (short int complex).
* \authors <ul>
* <li> Marc Majoral, 2017. mmajoral(at)cttc.cat
* <li> Javier Arribas, 2016. jarribas(at)cttc.es
* </ul>
*
* Class that controls and executes a high optimized vector correlator
@ -50,7 +49,6 @@ class gps_fpga_acquisition_8sc
public:
gps_fpga_acquisition_8sc();
~gps_fpga_acquisition_8sc();
//bool init(int max_signal_length_samples, int n_correlators);
bool init(unsigned int fft_size, unsigned int nsamples_total, long d_freq, unsigned int doppler_max, unsigned int doppler_step, int num_doppler_bins, long fs_in, unsigned select_queue);
bool set_local_code(gr_complex* fft_codes); //int code_length_chips, const lv_16sc_t* local_code_in, float *shifts_chips);
bool free();
@ -79,29 +77,11 @@ private:
unsigned int d_nsamples; // number of samples not including padding
unsigned int d_select_queue =0; // queue selection
// unsigned int d_channel; // channel number
// unsigned d_ncorrelators; // number of correlators
// unsigned d_correlator_length_samples;
// float d_rem_code_phase_chips;
// float d_code_phase_step_chips;
// float d_rem_carrier_phase_in_rad;
// float d_phase_step_rad;
// configuration data computed in the format that the FPGA expects
// unsigned *d_initial_index;
// unsigned *d_initial_interp_counter;
// unsigned d_code_phase_step_chips_num;
// int d_rem_carr_phase_rad_int;
// int d_phase_step_rad_int;
// unsigned d_initial_sample_counter;
// FPGA private functions
unsigned fpga_acquisition_test_register(unsigned writeval);
void fpga_configure_acquisition_local_code(lv_16sc_t fft_local_code[]);
void configure_acquisition();
//void fpga_acquisition_8sc::run_acquisition(void);
};

31
src/algorithms/channel/adapters/channel.cc
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@ -56,6 +56,7 @@ Channel::Channel(ConfigurationInterface *configuration, unsigned int channel,
channel_ = channel;
queue_ = queue;
flag_enable_fpga=configuration->property("Channel.enable_FPGA", false);
acq_->set_channel(channel_);
trk_->set_channel(channel_);
nav_->set_channel(channel_);
@ -108,16 +109,22 @@ void Channel::connect(gr::top_block_sptr top_block)
LOG(WARNING) << "channel already connected internally";
return;
}
pass_through_->connect(top_block);
if (flag_enable_fpga==false)
{
pass_through_->connect(top_block);
}
acq_->connect(top_block);
trk_->connect(top_block);
nav_->connect(top_block);
//Synchronous ports
top_block->connect(pass_through_->get_right_block(), 0, acq_->get_left_block(), 0);
DLOG(INFO) << "pass_through_ -> acquisition";
top_block->connect(pass_through_->get_right_block(), 0, trk_->get_left_block(), 0);
DLOG(INFO) << "pass_through_ -> tracking";
if (flag_enable_fpga==false)
{
top_block->connect(pass_through_->get_right_block(), 0, acq_->get_left_block(), 0);
DLOG(INFO) << "pass_through_ -> acquisition";
top_block->connect(pass_through_->get_right_block(), 0, trk_->get_left_block(), 0);
DLOG(INFO) << "pass_through_ -> tracking";
}
top_block->connect(trk_->get_right_block(), 0, nav_->get_left_block(), 0);
DLOG(INFO) << "tracking -> telemetry_decoder";
@ -140,10 +147,18 @@ void Channel::disconnect(gr::top_block_sptr top_block)
LOG(WARNING) << "Channel already disconnected internally";
return;
}
top_block->disconnect(pass_through_->get_right_block(), 0, acq_->get_left_block(), 0);
top_block->disconnect(pass_through_->get_right_block(), 0, trk_->get_left_block(), 0);
if (flag_enable_fpga==false)
{
top_block->disconnect(pass_through_->get_right_block(), 0, acq_->get_left_block(), 0);
top_block->disconnect(pass_through_->get_right_block(), 0, trk_->get_left_block(), 0);
}
top_block->disconnect(trk_->get_right_block(), 0, nav_->get_left_block(), 0);
pass_through_->disconnect(top_block);
if (flag_enable_fpga==false)
{
pass_through_->disconnect(top_block);
}
acq_->disconnect(top_block);
trk_->disconnect(top_block);
nav_->disconnect(top_block);

1
src/algorithms/channel/adapters/channel.h
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@ -94,6 +94,7 @@ private:
std::shared_ptr<TelemetryDecoderInterface> nav_;
std::string role_;
std::string implementation_;
bool flag_enable_fpga;
unsigned int channel_;
Gnss_Synchro gnss_synchro_;
Gnss_Signal gnss_signal_;