mirror of
https://github.com/gnss-sdr/gnss-sdr
synced 2025-01-19 05:33:02 +00:00
Merge branch 'cf_test' into next
This commit is contained in:
Carles Fernandez
commit
20aeb282e0
@ -85,6 +85,7 @@ macro(add_cpu_features_headers_and_sources HDRS_LIST_NAME SRCS_LIST_NAME)
|
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list(APPEND ${HDRS_LIST_NAME} ${PROJECT_SOURCE_DIR}/include/cpuinfo_arm.h)
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elseif(PROCESSOR_IS_AARCH64)
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list(APPEND ${HDRS_LIST_NAME} ${PROJECT_SOURCE_DIR}/include/cpuinfo_aarch64.h)
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list(APPEND ${SRCS_LIST_NAME} ${PROJECT_SOURCE_DIR}/include/internal/windows_utils.h)
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elseif(PROCESSOR_IS_X86)
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list(APPEND ${HDRS_LIST_NAME} ${PROJECT_SOURCE_DIR}/include/cpuinfo_x86.h)
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list(APPEND ${SRCS_LIST_NAME} ${PROJECT_SOURCE_DIR}/include/internal/cpuid_x86.h)
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@ -185,9 +186,9 @@ if(BUILD_TESTING)
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# found.
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enable_language(CXX)
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set(CMAKE_CXX_STANDARD 11)
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set(CMAKE_CXX_STANDARD 14)
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set(CMAKE_CXX_STANDARD_REQUIRED ON)
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set(CMAKE_CXX_EXTENSIONS OFF) # prefer use of -std11 instead of -gnustd11
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set(CMAKE_CXX_EXTENSIONS OFF) # prefer use of -std14 instead of -gnustd14
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if(NOT TARGET gtest OR NOT TARGET gmock_main)
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# Download and unpack googletest at configure time.
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@ -28,7 +28,7 @@
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#define CPU_FEATURES_ARCH_ARM
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#endif
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#if defined(__aarch64__)
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#if (defined(__aarch64__) || defined(_M_ARM64))
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#define CPU_FEATURES_ARCH_AARCH64
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#endif
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@ -1,6 +1,100 @@
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// SPDX-FileCopyrightText: 2017 Google LLC
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// SPDX-License-Identifier: Apache-2.0
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////////////////////////////////////////////////////////////////////////////////
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// A note on Windows AArch64 implementation
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////////////////////////////////////////////////////////////////////////////////
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// Getting cpu info via EL1 system registers is not possible, so we delegate it
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// to the Windows API (i.e., IsProcessorFeaturePresent and GetNativeSystemInfo).
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// The `implementer`, `variant` and `part` fields of the `Aarch64Info` struct
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// are not used, so they are set to 0. To get `revision` we use
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// `wProcessorRevision` from `SYSTEM_INFO`.
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//
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// Cryptographic Extension:
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// -----------------------------------------------------------------------------
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// According to documentation Arm Architecture Reference Manual for
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// A-profile architecture. A2.3 The Armv8 Cryptographic Extension. The Armv8.0
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// Cryptographic Extension provides instructions for the acceleration of
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// encryption and decryption, and includes the following features: FEAT_AES,
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// FEAT_PMULL, FEAT_SHA1, FEAT_SHA256.
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// see: https://developer.arm.com/documentation/ddi0487/latest
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//
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// We use `PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE` to detect all Armv8.0 crypto
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// features. This value reports all features or nothing, so even if you only
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// have support FEAT_AES and FEAT_PMULL, it will still return false.
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//
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// From Armv8.2, an implementation of the Armv8.0 Cryptographic Extension can
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// include either or both of:
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//
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// • The AES functionality, including support for multiplication of 64-bit
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// polynomials. The ID_AA64ISAR0_EL1.AES field indicates whether this
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// functionality is supported.
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// • The SHA1 and SHA2-256 functionality. The ID_AA64ISAR0_EL1.{SHA2, SHA1}
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// fields indicate whether this functionality is supported.
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//
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// ID_AA64ISAR0_EL1.AES, bits [7:4]:
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// Indicates support for AES instructions in AArch64 state. Defined values are:
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// - 0b0000 No AES instructions implemented.
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// - 0b0001 AESE, AESD, AESMC, and AESIMC instructions implemented.
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// - 0b0010 As for 0b0001, plus PMULL/PMULL2 instructions operating on 64-bit
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// data quantities.
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//
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// FEAT_AES implements the functionality identified by the value 0b0001.
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// FEAT_PMULL implements the functionality identified by the value 0b0010.
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// From Armv8, the permitted values are 0b0000 and 0b0010.
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//
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// ID_AA64ISAR0_EL1.SHA1, bits [11:8]:
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// Indicates support for SHA1 instructions in AArch64 state. Defined values are:
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// - 0b0000 No SHA1 instructions implemented.
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// - 0b0001 SHA1C, SHA1P, SHA1M, SHA1H, SHA1SU0, and SHA1SU1 instructions
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// implemented.
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//
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// FEAT_SHA1 implements the functionality identified by the value 0b0001.
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// From Armv8, the permitted values are 0b0000 and 0b0001.
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// If the value of ID_AA64ISAR0_EL1.SHA2 is 0b0000, this field must have the
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// value 0b0000.
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//
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// ID_AA64ISAR0_EL1.SHA2, bits [15:12]:
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// Indicates support for SHA2 instructions in AArch64 state. Defined values are:
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// - 0b0000 No SHA2 instructions implemented.
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// - 0b0001 Implements instructions: SHA256H, SHA256H2, SHA256SU0, and
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// SHA256SU1.
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// - 0b0010 Implements instructions:
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// • SHA256H, SHA256H2, SHA256SU0, and SHA256SU1.
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// • SHA512H, SHA512H2, SHA512SU0, and SHA512SU1.
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//
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// FEAT_SHA256 implements the functionality identified by the value 0b0001.
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// FEAT_SHA512 implements the functionality identified by the value 0b0010.
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//
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// In Armv8, the permitted values are 0b0000 and 0b0001.
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// From Armv8.2, the permitted values are 0b0000, 0b0001, and 0b0010.
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//
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// If the value of ID_AA64ISAR0_EL1.SHA1 is 0b0000, this field must have the
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// value 0b0000.
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//
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// If the value of this field is 0b0010, ID_AA64ISAR0_EL1.SHA3
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// must have the value 0b0001.
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//
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// Other cryptographic features that we cannot detect such as sha512, sha3, sm3,
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// sm4, sveaes, svepmull, svesha3, svesm4 we set to 0.
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//
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// FP/SIMD:
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// -----------------------------------------------------------------------------
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// FP/SIMD must be implemented on all Armv8.0 implementations, but
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// implementations targeting specialized markets may support the following
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// combinations:
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//
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// • No NEON or floating-point.
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// • Full floating-point and SIMD support with exception trapping.
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// • Full floating-point and SIMD support without exception trapping.
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//
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// ref:
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// https://developer.arm.com/documentation/den0024/a/AArch64-Floating-point-and-NEON
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//
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// So, we use `PF_ARM_VFP_32_REGISTERS_AVAILABLE`,
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// `PF_ARM_NEON_INSTRUCTIONS_AVAILABLE` to detect `asimd` and `fp`
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#ifndef CPU_FEATURES_INCLUDE_CPUINFO_AARCH64_H_
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#define CPU_FEATURES_INCLUDE_CPUINFO_AARCH64_H_
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@ -72,10 +166,11 @@ typedef struct
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typedef struct
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{
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Aarch64Features features;
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int implementer;
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int variant;
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int part;
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int revision;
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int implementer; // We set 0 for Windows.
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int variant; // We set 0 for Windows.
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int part; // We set 0 for Windows.
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int revision; // We use GetNativeSystemInfo to get processor revision for
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// Windows.
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} Aarch64Info;
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Aarch64Info GetAarch64Info(void);
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@ -22,5 +22,37 @@
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#define PF_SSE4_2_INSTRUCTIONS_AVAILABLE 38
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#endif
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#if !defined(PF_ARM_VFP_32_REGISTERS_AVAILABLE)
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#define PF_ARM_VFP_32_REGISTERS_AVAILABLE 18
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#endif
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#if !defined(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE)
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#define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
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#endif
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#if !defined(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE)
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#define PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE 30
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#endif
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#if !defined(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE)
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#define PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE 31
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#endif
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#if !defined(PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE)
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#define PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE 34
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#endif
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#if !defined(PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE)
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#define PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE 43
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#endif
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#if !defined(PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE)
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#define PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE 44
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#endif
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#if !defined(PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE)
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#define PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE 45
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#endif
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#endif // CPU_FEATURES_OS_WINDOWS
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#endif // CPU_FEATURES_INCLUDE_INTERNAL_WINDOWS_UTILS_H_
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@ -0,0 +1,130 @@
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// SPDX-FileCopyrightText: 2023 Google LLC
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// SPDX-License-Identifier: Apache-2.0
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#include "cpu_features_macros.h"
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#ifdef CPU_FEATURES_ARCH_AARCH64
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#ifdef CPU_FEATURES_OS_WINDOWS
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#include "cpuinfo_aarch64.h"
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////////////////////////////////////////////////////////////////////////////////
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// Definitions for introspection.
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////////////////////////////////////////////////////////////////////////////////
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#define INTROSPECTION_TABLE \
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LINE(AARCH64_FP, fp, , , ) \
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LINE(AARCH64_ASIMD, asimd, , , ) \
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LINE(AARCH64_EVTSTRM, evtstrm, , , ) \
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LINE(AARCH64_AES, aes, , , ) \
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LINE(AARCH64_PMULL, pmull, , , ) \
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LINE(AARCH64_SHA1, sha1, , , ) \
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LINE(AARCH64_SHA2, sha2, , , ) \
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LINE(AARCH64_CRC32, crc32, , , ) \
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LINE(AARCH64_ATOMICS, atomics, , , ) \
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LINE(AARCH64_FPHP, fphp, , , ) \
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LINE(AARCH64_ASIMDHP, asimdhp, , , ) \
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LINE(AARCH64_CPUID, cpuid, , , ) \
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LINE(AARCH64_ASIMDRDM, asimdrdm, , , ) \
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LINE(AARCH64_JSCVT, jscvt, , , ) \
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LINE(AARCH64_FCMA, fcma, , , ) \
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LINE(AARCH64_LRCPC, lrcpc, , , ) \
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LINE(AARCH64_DCPOP, dcpop, , , ) \
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LINE(AARCH64_SHA3, sha3, , , ) \
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LINE(AARCH64_SM3, sm3, , , ) \
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LINE(AARCH64_SM4, sm4, , , ) \
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LINE(AARCH64_ASIMDDP, asimddp, , , ) \
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LINE(AARCH64_SHA512, sha512, , , ) \
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LINE(AARCH64_SVE, sve, , , ) \
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LINE(AARCH64_ASIMDFHM, asimdfhm, , , ) \
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LINE(AARCH64_DIT, dit, , , ) \
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LINE(AARCH64_USCAT, uscat, , , ) \
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LINE(AARCH64_ILRCPC, ilrcpc, , , ) \
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LINE(AARCH64_FLAGM, flagm, , , ) \
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LINE(AARCH64_SSBS, ssbs, , , ) \
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LINE(AARCH64_SB, sb, , , ) \
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LINE(AARCH64_PACA, paca, , , ) \
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LINE(AARCH64_PACG, pacg, , , ) \
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LINE(AARCH64_DCPODP, dcpodp, , , ) \
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LINE(AARCH64_SVE2, sve2, , , ) \
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LINE(AARCH64_SVEAES, sveaes, , , ) \
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LINE(AARCH64_SVEPMULL, svepmull, , , ) \
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LINE(AARCH64_SVEBITPERM, svebitperm, , , ) \
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||||
LINE(AARCH64_SVESHA3, svesha3, , , ) \
|
||||
LINE(AARCH64_SVESM4, svesm4, , , ) \
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||||
LINE(AARCH64_FLAGM2, flagm2, , , ) \
|
||||
LINE(AARCH64_FRINT, frint, , , ) \
|
||||
LINE(AARCH64_SVEI8MM, svei8mm, , , ) \
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LINE(AARCH64_SVEF32MM, svef32mm, , , ) \
|
||||
LINE(AARCH64_SVEF64MM, svef64mm, , , ) \
|
||||
LINE(AARCH64_SVEBF16, svebf16, , , ) \
|
||||
LINE(AARCH64_I8MM, i8mm, , , ) \
|
||||
LINE(AARCH64_BF16, bf16, , , ) \
|
||||
LINE(AARCH64_DGH, dgh, , , ) \
|
||||
LINE(AARCH64_RNG, rng, , , ) \
|
||||
LINE(AARCH64_BTI, bti, , , ) \
|
||||
LINE(AARCH64_MTE, mte, , , ) \
|
||||
LINE(AARCH64_ECV, ecv, , , ) \
|
||||
LINE(AARCH64_AFP, afp, , , ) \
|
||||
LINE(AARCH64_RPRES, rpres, , , )
|
||||
#define INTROSPECTION_PREFIX Aarch64
|
||||
#define INTROSPECTION_ENUM_PREFIX AARCH64
|
||||
#include "define_introspection.inl"
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
// Implementation.
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#include "internal/windows_utils.h"
|
||||
#include <stdbool.h>
|
||||
|
||||
#ifdef CPU_FEATURES_MOCK_CPUID_AARCH64
|
||||
extern bool GetWindowsIsProcessorFeaturePresent(DWORD);
|
||||
extern WORD GetWindowsNativeSystemInfoProcessorRevision();
|
||||
#else // CPU_FEATURES_MOCK_CPUID_AARCH64
|
||||
static bool
|
||||
GetWindowsIsProcessorFeaturePresent(DWORD dwProcessorFeature)
|
||||
{
|
||||
return IsProcessorFeaturePresent(dwProcessorFeature);
|
||||
}
|
||||
|
||||
static WORD GetWindowsNativeSystemInfoProcessorRevision()
|
||||
{
|
||||
SYSTEM_INFO system_info;
|
||||
GetNativeSystemInfo(&system_info);
|
||||
return system_info.wProcessorRevision;
|
||||
}
|
||||
#endif
|
||||
|
||||
static const Aarch64Info kEmptyAarch64Info;
|
||||
|
||||
Aarch64Info GetAarch64Info(void)
|
||||
{
|
||||
Aarch64Info info = kEmptyAarch64Info;
|
||||
info.revision = GetWindowsNativeSystemInfoProcessorRevision();
|
||||
info.features.fp =
|
||||
GetWindowsIsProcessorFeaturePresent(PF_ARM_VFP_32_REGISTERS_AVAILABLE);
|
||||
info.features.asimd =
|
||||
GetWindowsIsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE);
|
||||
info.features.crc32 = GetWindowsIsProcessorFeaturePresent(
|
||||
PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE);
|
||||
info.features.asimddp =
|
||||
GetWindowsIsProcessorFeaturePresent(PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE);
|
||||
info.features.jscvt = GetWindowsIsProcessorFeaturePresent(
|
||||
PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE);
|
||||
info.features.lrcpc = GetWindowsIsProcessorFeaturePresent(
|
||||
PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE);
|
||||
info.features.atomics = GetWindowsIsProcessorFeaturePresent(
|
||||
PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE);
|
||||
|
||||
|
||||
bool is_crypto_available = GetWindowsIsProcessorFeaturePresent(
|
||||
PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE);
|
||||
info.features.aes = is_crypto_available;
|
||||
info.features.sha1 = is_crypto_available;
|
||||
info.features.sha2 = is_crypto_available;
|
||||
info.features.pmull = is_crypto_available;
|
||||
return info;
|
||||
}
|
||||
|
||||
#endif // CPU_FEATURES_OS_WINDOWS
|
||||
#endif // CPU_FEATURES_ARCH_AARCH64
|
||||
@ -74,7 +74,11 @@ endif()
|
||||
##------------------------------------------------------------------------------
|
||||
## cpuinfo_aarch64_test
|
||||
if(PROCESSOR_IS_AARCH64)
|
||||
add_executable(cpuinfo_aarch64_test cpuinfo_aarch64_test.cc ../src/impl_aarch64_linux_or_android.c)
|
||||
add_executable(cpuinfo_aarch64_test
|
||||
cpuinfo_aarch64_test.cc
|
||||
../src/impl_aarch64_linux_or_android.c
|
||||
../src/impl_aarch64_windows.c)
|
||||
target_compile_definitions(cpuinfo_aarch64_test PUBLIC CPU_FEATURES_MOCK_CPUID_AARCH64)
|
||||
target_link_libraries(cpuinfo_aarch64_test all_libraries)
|
||||
add_test(NAME cpuinfo_aarch64_test COMMAND cpuinfo_aarch64_test)
|
||||
endif()
|
||||
|
||||
@ -5,150 +5,103 @@
|
||||
#include "filesystem_for_testing.h"
|
||||
#include "gtest/gtest.h"
|
||||
#include "hwcaps_for_testing.h"
|
||||
#include <set>
|
||||
|
||||
#if defined(CPU_FEATURES_OS_WINDOWS)
|
||||
#include "internal/windows_utils.h"
|
||||
#endif // CPU_FEATURES_OS_WINDOWS
|
||||
|
||||
namespace cpu_features
|
||||
{
|
||||
namespace
|
||||
{
|
||||
#if defined(CPU_FEATURES_OS_DARWIN)
|
||||
|
||||
class FakeCpu
|
||||
class FakeCpuAarch64
|
||||
{
|
||||
public:
|
||||
bool GetDarwinSysCtlByName(std::string name) const
|
||||
#if defined(CPU_FEATURES_OS_WINDOWS)
|
||||
bool GetWindowsIsProcessorFeaturePresent(DWORD dwProcessorFeature)
|
||||
{
|
||||
return darwin_sysctlbyname_.count(name);
|
||||
return windows_isprocessorfeaturepresent_.count(dwProcessorFeature);
|
||||
}
|
||||
|
||||
int GetDarwinSysCtlByNameValue(std::string name) const
|
||||
void SetWindowsIsProcessorFeaturePresent(DWORD dwProcessorFeature)
|
||||
{
|
||||
std::map<std::string, int>::const_iterator iter =
|
||||
darwin_sysctlbynamevalue_.find(name);
|
||||
if (iter != std::end(darwin_sysctlbynamevalue_))
|
||||
{
|
||||
return iter->second;
|
||||
}
|
||||
|
||||
return 0;
|
||||
windows_isprocessorfeaturepresent_.insert(dwProcessorFeature);
|
||||
}
|
||||
|
||||
void SetDarwinSysCtlByName(std::string name)
|
||||
WORD GetWindowsNativeSystemInfoProcessorRevision() const
|
||||
{
|
||||
darwin_sysctlbyname_.insert(name);
|
||||
return processor_revision_;
|
||||
}
|
||||
|
||||
void SetDarwinSysCtlByNameValue(std::string name, int value)
|
||||
void SetWindowsNativeSystemInfoProcessorRevision(WORD wProcessorRevision)
|
||||
{
|
||||
darwin_sysctlbynamevalue_[name] = value;
|
||||
processor_revision_ = wProcessorRevision;
|
||||
}
|
||||
|
||||
private:
|
||||
std::set<std::string> darwin_sysctlbyname_;
|
||||
std::map<std::string, int> darwin_sysctlbynamevalue_;
|
||||
std::set<DWORD> windows_isprocessorfeaturepresent_;
|
||||
WORD processor_revision_{};
|
||||
#endif // CPU_FEATURES_OS_WINDOWS
|
||||
};
|
||||
|
||||
FakeCpu* g_fake_cpu = nullptr;
|
||||
static FakeCpuAarch64* g_fake_cpu_instance = nullptr;
|
||||
|
||||
extern "C" bool GetDarwinSysCtlByName(const char* name)
|
||||
static FakeCpuAarch64& cpu()
|
||||
{
|
||||
return g_fake_cpu->GetDarwinSysCtlByName(name);
|
||||
assert(g_fake_cpu_instance != nullptr);
|
||||
return *g_fake_cpu_instance;
|
||||
}
|
||||
|
||||
extern "C" int GetDarwinSysCtlByNameValue(const char* name)
|
||||
#if defined(CPU_FEATURES_OS_WINDOWS)
|
||||
extern "C" bool GetWindowsIsProcessorFeaturePresent(DWORD dwProcessorFeature)
|
||||
{
|
||||
return g_fake_cpu->GetDarwinSysCtlByNameValue(name);
|
||||
return cpu().GetWindowsIsProcessorFeaturePresent(dwProcessorFeature);
|
||||
}
|
||||
|
||||
class CpuinfoAarch64Test : public ::testing::Test
|
||||
extern "C" WORD GetWindowsNativeSystemInfoProcessorRevision()
|
||||
{
|
||||
return cpu().GetWindowsNativeSystemInfoProcessorRevision();
|
||||
}
|
||||
#endif // CPU_FEATURES_OS_WINDOWS
|
||||
|
||||
namespace
|
||||
{
|
||||
|
||||
class CpuidAarch64Test : public ::testing::Test
|
||||
{
|
||||
protected:
|
||||
void SetUp() override { g_fake_cpu = new FakeCpu(); }
|
||||
void TearDown() override { delete g_fake_cpu; }
|
||||
void SetUp() override
|
||||
{
|
||||
assert(g_fake_cpu_instance == nullptr);
|
||||
g_fake_cpu_instance = new FakeCpuAarch64();
|
||||
}
|
||||
void TearDown() override
|
||||
{
|
||||
delete g_fake_cpu_instance;
|
||||
g_fake_cpu_instance = nullptr;
|
||||
}
|
||||
};
|
||||
|
||||
TEST_F(CpuinfoAarch64Test, FromDarwinSysctlFromName)
|
||||
{
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.floatingpoint");
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.neon");
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.neon_hpfp");
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.neon_fp16");
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.armv8_1_atomics");
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.armv8_crc32");
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.armv8_2_fhm");
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.armv8_2_sha512");
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.armv8_2_sha3");
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.amx_version");
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.ucnormal_mem");
|
||||
g_fake_cpu->SetDarwinSysCtlByName("hw.optional.arm64");
|
||||
|
||||
g_fake_cpu->SetDarwinSysCtlByNameValue("hw.cputype", 16777228);
|
||||
g_fake_cpu->SetDarwinSysCtlByNameValue("hw.cpusubtype", 2);
|
||||
g_fake_cpu->SetDarwinSysCtlByNameValue("hw.cpu64bit", 1);
|
||||
g_fake_cpu->SetDarwinSysCtlByNameValue("hw.cpufamily", 458787763);
|
||||
g_fake_cpu->SetDarwinSysCtlByNameValue("hw.cpusubfamily", 2);
|
||||
|
||||
const auto info = GetAarch64Info();
|
||||
|
||||
EXPECT_EQ(info.implementer, 0x100000C);
|
||||
EXPECT_EQ(info.variant, 2);
|
||||
EXPECT_EQ(info.part, 0x1B588BB3);
|
||||
EXPECT_EQ(info.revision, 2);
|
||||
|
||||
EXPECT_TRUE(info.features.fp);
|
||||
EXPECT_FALSE(info.features.asimd);
|
||||
EXPECT_FALSE(info.features.evtstrm);
|
||||
EXPECT_FALSE(info.features.aes);
|
||||
EXPECT_FALSE(info.features.pmull);
|
||||
EXPECT_FALSE(info.features.sha1);
|
||||
EXPECT_FALSE(info.features.sha2);
|
||||
EXPECT_TRUE(info.features.crc32);
|
||||
EXPECT_TRUE(info.features.atomics);
|
||||
EXPECT_TRUE(info.features.fphp);
|
||||
EXPECT_FALSE(info.features.asimdhp);
|
||||
EXPECT_FALSE(info.features.cpuid);
|
||||
EXPECT_FALSE(info.features.asimdrdm);
|
||||
EXPECT_FALSE(info.features.jscvt);
|
||||
EXPECT_FALSE(info.features.fcma);
|
||||
EXPECT_FALSE(info.features.lrcpc);
|
||||
EXPECT_FALSE(info.features.dcpop);
|
||||
EXPECT_TRUE(info.features.sha3);
|
||||
EXPECT_FALSE(info.features.sm3);
|
||||
EXPECT_FALSE(info.features.sm4);
|
||||
EXPECT_FALSE(info.features.asimddp);
|
||||
EXPECT_TRUE(info.features.sha512);
|
||||
EXPECT_FALSE(info.features.sve);
|
||||
EXPECT_TRUE(info.features.asimdfhm);
|
||||
EXPECT_FALSE(info.features.dit);
|
||||
EXPECT_FALSE(info.features.uscat);
|
||||
EXPECT_FALSE(info.features.ilrcpc);
|
||||
EXPECT_FALSE(info.features.flagm);
|
||||
EXPECT_FALSE(info.features.ssbs);
|
||||
EXPECT_FALSE(info.features.sb);
|
||||
EXPECT_FALSE(info.features.paca);
|
||||
EXPECT_FALSE(info.features.pacg);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
void DisableHardwareCapabilities()
|
||||
{
|
||||
SetHardwareCapabilities(0, 0);
|
||||
}
|
||||
|
||||
TEST(CpuinfoAarch64Test, Aarch64FeaturesEnum)
|
||||
{
|
||||
const char *last_name = GetAarch64FeaturesEnumName(AARCH64_LAST_);
|
||||
const char* last_name = GetAarch64FeaturesEnumName(AARCH64_LAST_);
|
||||
EXPECT_STREQ(last_name, "unknown_feature");
|
||||
for (int i = static_cast<int>(AARCH64_FP); i != static_cast<int>(AARCH64_LAST_); ++i)
|
||||
for (int i = static_cast<int>(AARCH64_FP);
|
||||
i != static_cast<int>(AARCH64_LAST_); ++i)
|
||||
{
|
||||
const auto feature = static_cast<Aarch64FeaturesEnum>(i);
|
||||
const char *name = GetAarch64FeaturesEnumName(feature);
|
||||
const char* name = GetAarch64FeaturesEnumName(feature);
|
||||
ASSERT_FALSE(name == nullptr);
|
||||
EXPECT_STRNE(name, "");
|
||||
EXPECT_STRNE(name, last_name);
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CPU_FEATURES_OS_LINUX)
|
||||
void DisableHardwareCapabilities()
|
||||
{
|
||||
SetHardwareCapabilities(0, 0);
|
||||
}
|
||||
|
||||
TEST(CpuinfoAarch64Test, FromHardwareCap)
|
||||
{
|
||||
ResetHwcaps();
|
||||
@ -222,7 +175,7 @@ TEST(CpuinfoAarch64Test, FromHardwareCap2)
|
||||
TEST(CpuinfoAarch64Test, ARMCortexA53)
|
||||
{
|
||||
ResetHwcaps();
|
||||
auto &fs = GetEmptyFilesystem();
|
||||
auto& fs = GetEmptyFilesystem();
|
||||
fs.CreateFile("/proc/cpuinfo",
|
||||
R"(Processor : AArch64 Processor rev 3 (aarch64)
|
||||
processor : 0
|
||||
@ -301,8 +254,33 @@ CPU revision : 3)");
|
||||
EXPECT_FALSE(info.features.afp);
|
||||
EXPECT_FALSE(info.features.rpres);
|
||||
}
|
||||
#endif // CPU_FEATURES_OS_LINUX
|
||||
|
||||
#endif
|
||||
#if defined(CPU_FEATURES_OS_WINDOWS)
|
||||
TEST_F(CpuidAarch64Test, WINDOWS_AARCH64_RPI4)
|
||||
{
|
||||
cpu().SetWindowsNativeSystemInfoProcessorRevision(0x03);
|
||||
cpu().SetWindowsIsProcessorFeaturePresent(PF_ARM_VFP_32_REGISTERS_AVAILABLE);
|
||||
cpu().SetWindowsIsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE);
|
||||
cpu().SetWindowsIsProcessorFeaturePresent(
|
||||
PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE);
|
||||
|
||||
const auto info = GetAarch64Info();
|
||||
|
||||
EXPECT_EQ(info.revision, 0x03);
|
||||
EXPECT_TRUE(info.features.fp);
|
||||
EXPECT_TRUE(info.features.asimd);
|
||||
EXPECT_TRUE(info.features.crc32);
|
||||
EXPECT_FALSE(info.features.aes);
|
||||
EXPECT_FALSE(info.features.sha1);
|
||||
EXPECT_FALSE(info.features.sha2);
|
||||
EXPECT_FALSE(info.features.pmull);
|
||||
EXPECT_FALSE(info.features.atomics);
|
||||
EXPECT_FALSE(info.features.asimddp);
|
||||
EXPECT_FALSE(info.features.jscvt);
|
||||
EXPECT_FALSE(info.features.lrcpc);
|
||||
}
|
||||
#endif // CPU_FEATURES_OS_WINDOWS
|
||||
|
||||
} // namespace
|
||||
} // namespace cpu_features
|
||||
} // namespace cpu_features
|
||||
@ -1708,6 +1708,41 @@ TEST_F(CpuidX86Test, INTEL_HASWELL_LZCNT)
|
||||
EXPECT_TRUE(info.features.lzcnt);
|
||||
}
|
||||
|
||||
// http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00B06A2_RaptorLakeP_03_CPUID.txt
|
||||
TEST_F(CpuidX86Test, INTEL_RAPTOR_LAKE_P)
|
||||
{
|
||||
cpu().SetLeaves({
|
||||
{{0x00000000, 0}, Leaf{0x00000020, 0x756E6547, 0x6C65746E, 0x49656E69}},
|
||||
{{0x00000001, 0}, Leaf{0x000B06A3, 0x00400800, 0x7FFAFBFF, 0xBFEBFBFF}},
|
||||
{{0x80000000, 0}, Leaf{0x80000008, 0x00000000, 0x00000000, 0x00000000}},
|
||||
{{0x80000001, 0}, Leaf{0x00000000, 0x00000000, 0x00000121, 0x2C100000}},
|
||||
});
|
||||
const auto info = GetX86Info();
|
||||
|
||||
EXPECT_STREQ(info.vendor, CPU_FEATURES_VENDOR_GENUINE_INTEL);
|
||||
EXPECT_EQ(info.family, 0x06);
|
||||
EXPECT_EQ(info.model, 0xBA);
|
||||
EXPECT_EQ(GetX86Microarchitecture(&info), X86Microarchitecture::INTEL_RPL);
|
||||
}
|
||||
|
||||
// http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00B06F2_RaptorLakeS_02_CPUID.txt
|
||||
TEST_F(CpuidX86Test, INTEL_RAPTOR_LAKE_S)
|
||||
{
|
||||
cpu().SetLeaves({
|
||||
{{0x00000000, 0}, Leaf{0x00000020, 0x756E6547, 0x6C65746E, 0x49656E69}},
|
||||
{{0x00000001, 0}, Leaf{0x000B06F2, 0x00800800, 0x7FFAFBFF, 0xBFEBFBFF}},
|
||||
{{0x80000000, 0}, Leaf{0x80000008, 0x00000000, 0x00000000, 0x00000000}},
|
||||
{{0x80000001, 0}, Leaf{0x00000000, 0x00000000, 0x00000121, 0x2C100000}},
|
||||
});
|
||||
const auto info = GetX86Info();
|
||||
|
||||
EXPECT_STREQ(info.vendor, CPU_FEATURES_VENDOR_GENUINE_INTEL);
|
||||
EXPECT_EQ(info.family, 0x06);
|
||||
EXPECT_EQ(info.model, 0xBF);
|
||||
EXPECT_EQ(GetX86Microarchitecture(&info), X86Microarchitecture::INTEL_RPL);
|
||||
}
|
||||
|
||||
|
||||
// https://github.com/google/cpu_features/issues/200
|
||||
// http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00206F2_Eagleton_CPUID.txt
|
||||
#if defined(CPU_FEATURES_OS_WINDOWS)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user