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mirror of https://github.com/gnss-sdr/gnss-sdr synced 2024-11-10 20:10:05 +00:00

Merge remote-tracking branch 'carlesfernandez/castle055-ft/ion-metadata-standard-signal-source' into ft/ion-metadata-standard-signal-source

This commit is contained in:
Victor Castillo 2024-08-21 17:10:07 +02:00
commit 1c2fbb74fa
No known key found for this signature in database
GPG Key ID: 8EF1FC8B7182F608
18 changed files with 133 additions and 110 deletions

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@ -1424,6 +1424,7 @@ else()
endif() endif()
################################################################################ ################################################################################
# Abseil C++ - https://abseil.io/docs/cpp/ # Abseil C++ - https://abseil.io/docs/cpp/
################################################################################ ################################################################################
@ -3339,7 +3340,7 @@ set_package_properties(LIBIIO PROPERTIES
PURPOSE "Used for communication with the AD9361 chipset." PURPOSE "Used for communication with the AD9361 chipset."
TYPE OPTIONAL TYPE OPTIONAL
) )
if(ENABLE_AD9361 OR ENABLE_FMCOMMS2) if(ENABLE_AD9361 OR ENABLE_FMCOMMS2 OR ENABLE_PLUTOSDR)
if(NOT LIBIIO_FOUND) if(NOT LIBIIO_FOUND)
message(STATUS "libiio not found, its installation is required.") message(STATUS "libiio not found, its installation is required.")
message(STATUS "Please build and install the following projects:") message(STATUS "Please build and install the following projects:")
@ -3360,6 +3361,9 @@ endif()
################################################################################ ################################################################################
# ION GNSS-SDR Metadata Standard https://sdr.ion.org/ (OPTIONAL) # ION GNSS-SDR Metadata Standard https://sdr.ion.org/ (OPTIONAL)
################################################################################ ################################################################################
if(CMAKE_VERSION VERSION_LESS 3.14)
set(ENABLE_ION OFF) # FetchContent_MakeAvailable is available from CMake 3.14
endif()
if(ENABLE_ION) if(ENABLE_ION)
include(FetchContent) include(FetchContent)
set(CMAKE_POLICY_DEFAULT_CMP0063 NEW) set(CMAKE_POLICY_DEFAULT_CMP0063 NEW)

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@ -244,7 +244,7 @@ if(ENABLE_LIMESDR AND GRLIMESDR_FOUND)
) )
endif() endif()
if(ENABLE_AD9361 AND LIBIIO_FOUND) if(LIBIIO_FOUND)
target_link_libraries(signal_source_adapters target_link_libraries(signal_source_adapters
PRIVATE PRIVATE
Iio::iio Iio::iio

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@ -1,6 +1,6 @@
/*! /*!
* \file adrv9361_z7035_signal_source_fpga.cc * \file adrv9361_z7035_signal_source_fpga.cc
* \brief signal source for the Analog Devices ADRV9361-Z7035 evaluation board * \brief Signal source for the Analog Devices ADRV9361-Z7035 evaluation board
* directly connected to the FPGA accelerators. * directly connected to the FPGA accelerators.
* This source implements only the AD9361 control. It is NOT compatible with * This source implements only the AD9361 control. It is NOT compatible with
* conventional SDR acquisition and tracking blocks. * conventional SDR acquisition and tracking blocks.
@ -257,7 +257,6 @@ Adrv9361z7035SignalSourceFPGA::Adrv9361z7035SignalSourceFPGA(const Configuration
buffer_monitor_fpga = std::make_shared<Fpga_buffer_monitor>(num_freq_bands, dump_, dump_filename); buffer_monitor_fpga = std::make_shared<Fpga_buffer_monitor>(num_freq_bands, dump_, dump_filename);
thread_buffer_monitor = std::thread([&] { run_buffer_monitor_process(); }); thread_buffer_monitor = std::thread([&] { run_buffer_monitor_process(); });
// dynamic bits selection // dynamic bits selection
if (enable_dynamic_bit_selection_) if (enable_dynamic_bit_selection_)
{ {
@ -278,15 +277,23 @@ Adrv9361z7035SignalSourceFPGA::Adrv9361z7035SignalSourceFPGA(const Configuration
Adrv9361z7035SignalSourceFPGA::~Adrv9361z7035SignalSourceFPGA() Adrv9361z7035SignalSourceFPGA::~Adrv9361z7035SignalSourceFPGA()
{ {
/* cleanup and exit */ // cleanup and exit
if (rf_shutdown_) if (rf_shutdown_)
{ {
std::cout << "* AD9361 Disabling RX streaming channels\n"; std::cout << "* AD9361 Disabling RX streaming channels\n";
if (!disable_ad9361_rx_local()) try
{ {
LOG(WARNING) << "Problem shutting down the AD9361 RX channels"; if (!disable_ad9361_rx_local())
{
LOG(WARNING) << "Problem shutting down the AD9361 RX channels";
}
} }
catch (const std::exception &e)
{
LOG(WARNING) << "Problem shutting down the AD9361 RX channels: " << e.what();
std::cerr << "Problem shutting down the AD9361 RX channels: " << e.what() << '\n';
}
if (enable_dds_lo_) if (enable_dds_lo_)
{ {
try try
@ -301,24 +308,27 @@ Adrv9361z7035SignalSourceFPGA::~Adrv9361z7035SignalSourceFPGA()
} }
// disable buffer overflow checking and buffer monitoring // disable buffer overflow checking and buffer monitoring
std::unique_lock<std::mutex> lock_buffer_monitor(buffer_monitor_mutex); {
enable_ovf_check_buffer_monitor_active_ = false; std::lock_guard<std::mutex> lock_buffer_monitor(buffer_monitor_mutex);
lock_buffer_monitor.unlock(); enable_ovf_check_buffer_monitor_active_ = false;
}
if (thread_buffer_monitor.joinable()) if (thread_buffer_monitor.joinable())
{ {
thread_buffer_monitor.join(); thread_buffer_monitor.join();
} }
bool bit_selection_enabled = false;
std::unique_lock<std::mutex> lock_dyn_bit_sel(dynamic_bit_selection_mutex); {
bool bit_selection_enabled = enable_dynamic_bit_selection_; std::lock_guard<std::mutex> lock_dyn_bit_sel(dynamic_bit_selection_mutex);
lock_dyn_bit_sel.unlock(); bit_selection_enabled = enable_dynamic_bit_selection_;
}
if (bit_selection_enabled == true) if (bit_selection_enabled == true)
{ {
std::unique_lock<std::mutex> lock(dynamic_bit_selection_mutex); {
enable_dynamic_bit_selection_ = false; std::lock_guard<std::mutex> lock(dynamic_bit_selection_mutex);
lock.unlock(); enable_dynamic_bit_selection_ = false;
}
if (thread_dynamic_bit_selection.joinable()) if (thread_dynamic_bit_selection.joinable())
{ {
@ -337,12 +347,11 @@ void Adrv9361z7035SignalSourceFPGA::run_dynamic_bit_selection_process()
// setting the bit selection to the top bits // setting the bit selection to the top bits
dynamic_bit_selection_fpga->bit_selection(); dynamic_bit_selection_fpga->bit_selection();
std::this_thread::sleep_for(std::chrono::milliseconds(Gain_control_period_ms)); std::this_thread::sleep_for(std::chrono::milliseconds(Gain_control_period_ms));
std::unique_lock<std::mutex> lock(dynamic_bit_selection_mutex); std::lock_guard<std::mutex> lock(dynamic_bit_selection_mutex);
if (enable_dynamic_bit_selection_ == false) if (enable_dynamic_bit_selection_ == false)
{ {
dynamic_bit_selection_active = false; dynamic_bit_selection_active = false;
} }
lock.unlock();
} }
} }
@ -357,12 +366,11 @@ void Adrv9361z7035SignalSourceFPGA::run_buffer_monitor_process()
{ {
buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status(); buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status();
std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms)); std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms));
std::unique_lock<std::mutex> lock(buffer_monitor_mutex); std::lock_guard<std::mutex> lock(buffer_monitor_mutex);
if (enable_ovf_check_buffer_monitor_active_ == false) if (enable_ovf_check_buffer_monitor_active_ == false)
{ {
enable_ovf_check_buffer_monitor_active = false; enable_ovf_check_buffer_monitor_active = false;
} }
lock.unlock();
} }
} }

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@ -1,6 +1,6 @@
/*! /*!
* \file adrv9361_z7035_signal_source_fpga.h * \file adrv9361_z7035_signal_source_fpga.h
* \brief signal source for the Analog Devices ADRV9361-Z7035 evaluation board * \brief Signal source for the Analog Devices ADRV9361-Z7035 evaluation board
* directly connected to the FPGA accelerators. * directly connected to the FPGA accelerators.
* This source implements only the AD9361 control. It is NOT compatible with * This source implements only the AD9361 control. It is NOT compatible with
* conventional SDR acquisition and tracking blocks. * conventional SDR acquisition and tracking blocks.
@ -78,13 +78,14 @@ private:
const uint32_t buffer_monitor_period_ms = 1000; const uint32_t buffer_monitor_period_ms = 1000;
// buffer overflow and buffer monitoring initial delay // buffer overflow and buffer monitoring initial delay
const uint32_t buffer_monitoring_initial_delay_ms = 2000; const uint32_t buffer_monitoring_initial_delay_ms = 2000;
// sample block size when running in post-processing mode
const int sample_block_size = 16384;
const int32_t switch_to_real_time_mode = 2; const int32_t switch_to_real_time_mode = 2;
void run_dynamic_bit_selection_process(); void run_dynamic_bit_selection_process();
void run_buffer_monitor_process(); void run_buffer_monitor_process();
mutable std::mutex dynamic_bit_selection_mutex;
mutable std::mutex buffer_monitor_mutex;
std::thread thread_dynamic_bit_selection; std::thread thread_dynamic_bit_selection;
std::thread thread_buffer_monitor; std::thread thread_buffer_monitor;
@ -92,9 +93,6 @@ private:
std::shared_ptr<Fpga_dynamic_bit_selection> dynamic_bit_selection_fpga; std::shared_ptr<Fpga_dynamic_bit_selection> dynamic_bit_selection_fpga;
std::shared_ptr<Fpga_buffer_monitor> buffer_monitor_fpga; std::shared_ptr<Fpga_buffer_monitor> buffer_monitor_fpga;
std::mutex dynamic_bit_selection_mutex;
std::mutex buffer_monitor_mutex;
std::string gain_mode_rx1_; std::string gain_mode_rx1_;
std::string gain_mode_rx2_; std::string gain_mode_rx2_;
std::string rf_port_select_; std::string rf_port_select_;

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@ -1,6 +1,6 @@
/*! /*!
* \file fmcomms5_signal_source_fpga.cc * \file fmcomms5_signal_source_fpga.cc
* \brief signal source for the Analog Devices FMCOMMS5 directly connected * \brief Signal source for the Analog Devices FMCOMMS5 directly connected
* to the FPGA accelerators. * to the FPGA accelerators.
* This source implements only the AD9361 control. It is NOT compatible with * This source implements only the AD9361 control. It is NOT compatible with
* conventional SDR acquisition and tracking blocks. * conventional SDR acquisition and tracking blocks.
@ -217,7 +217,6 @@ Fmcomms5SignalSourceFPGA::Fmcomms5SignalSourceFPGA(const ConfigurationInterface
buffer_monitor_fpga = std::make_shared<Fpga_buffer_monitor>(num_freq_bands, dump_, dump_filename); buffer_monitor_fpga = std::make_shared<Fpga_buffer_monitor>(num_freq_bands, dump_, dump_filename);
thread_buffer_monitor = std::thread([&] { run_buffer_monitor_process(); }); thread_buffer_monitor = std::thread([&] { run_buffer_monitor_process(); });
// dynamic bits selection // dynamic bits selection
if (enable_dynamic_bit_selection_) if (enable_dynamic_bit_selection_)
{ {
@ -238,36 +237,45 @@ Fmcomms5SignalSourceFPGA::Fmcomms5SignalSourceFPGA(const ConfigurationInterface
Fmcomms5SignalSourceFPGA::~Fmcomms5SignalSourceFPGA() Fmcomms5SignalSourceFPGA::~Fmcomms5SignalSourceFPGA()
{ {
/* cleanup and exit */ // cleanup and exit
if (rf_shutdown_) if (rf_shutdown_)
{ {
std::cout << "* Disabling RX streaming channels\n"; std::cout << "* Disabling RX streaming channels\n";
if (!disable_ad9361_rx_local()) try
{ {
LOG(WARNING) << "Problem shutting down the AD9361 RX channels"; if (!disable_ad9361_rx_local())
{
LOG(WARNING) << "Problem shutting down the AD9361 RX channels";
}
}
catch (const std::exception &e)
{
std::cerr << "Problem shutting down the AD9361 RX channels: " << e.what() << '\n';
} }
} }
// disable buffer overflow checking and buffer monitoring // disable buffer overflow checking and buffer monitoring
std::unique_lock<std::mutex> lock_buffer_monitor(buffer_monitor_mutex); {
enable_ovf_check_buffer_monitor_active_ = false; std::lock_guard<std::mutex> lock_buffer_monitor(buffer_monitor_mutex);
lock_buffer_monitor.unlock(); enable_ovf_check_buffer_monitor_active_ = false;
}
if (thread_buffer_monitor.joinable()) if (thread_buffer_monitor.joinable())
{ {
thread_buffer_monitor.join(); thread_buffer_monitor.join();
} }
bool bit_selection_enabled = false;
std::unique_lock<std::mutex> lock_dyn_bit_sel(dynamic_bit_selection_mutex); {
bool bit_selection_enabled = enable_dynamic_bit_selection_; std::lock_guard<std::mutex> lock_dyn_bit_sel(dynamic_bit_selection_mutex);
lock_dyn_bit_sel.unlock(); bit_selection_enabled = enable_dynamic_bit_selection_;
}
if (bit_selection_enabled == true) if (bit_selection_enabled == true)
{ {
std::unique_lock<std::mutex> lock(dynamic_bit_selection_mutex); {
enable_dynamic_bit_selection_ = false; std::lock_guard<std::mutex> lock(dynamic_bit_selection_mutex);
lock.unlock(); enable_dynamic_bit_selection_ = false;
}
if (thread_dynamic_bit_selection.joinable()) if (thread_dynamic_bit_selection.joinable())
{ {
@ -286,12 +294,11 @@ void Fmcomms5SignalSourceFPGA::run_dynamic_bit_selection_process()
// setting the bit selection to the top bits // setting the bit selection to the top bits
dynamic_bit_selection_fpga->bit_selection(); dynamic_bit_selection_fpga->bit_selection();
std::this_thread::sleep_for(std::chrono::milliseconds(Gain_control_period_ms)); std::this_thread::sleep_for(std::chrono::milliseconds(Gain_control_period_ms));
std::unique_lock<std::mutex> lock(dynamic_bit_selection_mutex); std::lock_guard<std::mutex> lock(dynamic_bit_selection_mutex);
if (enable_dynamic_bit_selection_ == false) if (enable_dynamic_bit_selection_ == false)
{ {
dynamic_bit_selection_active = false; dynamic_bit_selection_active = false;
} }
lock.unlock();
} }
} }
@ -306,12 +313,11 @@ void Fmcomms5SignalSourceFPGA::run_buffer_monitor_process()
{ {
buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status(); buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status();
std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms)); std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms));
std::unique_lock<std::mutex> lock(buffer_monitor_mutex); std::lock_guard<std::mutex> lock(buffer_monitor_mutex);
if (enable_ovf_check_buffer_monitor_active_ == false) if (enable_ovf_check_buffer_monitor_active_ == false)
{ {
enable_ovf_check_buffer_monitor_active = false; enable_ovf_check_buffer_monitor_active = false;
} }
lock.unlock();
} }
} }

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@ -1,6 +1,6 @@
/*! /*!
* \file fmcomms5_signal_source_fpga.h * \file fmcomms5_signal_source_fpga.h
* \brief signal source for the Analog Devices FMCOMMS5 directly connected * \brief Signal source for the Analog Devices FMCOMMS5 directly connected
* to the FPGA accelerators. * to the FPGA accelerators.
* This source implements only the AD9361 control. It is NOT compatible with * This source implements only the AD9361 control. It is NOT compatible with
* conventional SDR acquisition and tracking blocks. * conventional SDR acquisition and tracking blocks.
@ -67,7 +67,6 @@ private:
const std::string default_dump_filename = std::string("FPGA_buffer_monitor_dump.dat"); const std::string default_dump_filename = std::string("FPGA_buffer_monitor_dump.dat");
const std::string default_rf_port_select = std::string("A_BALANCED"); const std::string default_rf_port_select = std::string("A_BALANCED");
const std::string default_gain_mode = std::string("slow_attack"); const std::string default_gain_mode = std::string("slow_attack");
const double default_tx_attenuation_db = -10.0;
const double default_manual_gain_rx1 = 64.0; const double default_manual_gain_rx1 = 64.0;
const double default_manual_gain_rx2 = 64.0; const double default_manual_gain_rx2 = 64.0;
const uint64_t default_bandwidth = 12500000; const uint64_t default_bandwidth = 12500000;
@ -78,13 +77,14 @@ private:
const uint32_t buffer_monitor_period_ms = 1000; const uint32_t buffer_monitor_period_ms = 1000;
// buffer overflow and buffer monitoring initial delay // buffer overflow and buffer monitoring initial delay
const uint32_t buffer_monitoring_initial_delay_ms = 2000; const uint32_t buffer_monitoring_initial_delay_ms = 2000;
// sample block size when running in post-processing mode
const int sample_block_size = 16384;
const int32_t switch_to_real_time_mode = 2; const int32_t switch_to_real_time_mode = 2;
void run_dynamic_bit_selection_process(); void run_dynamic_bit_selection_process();
void run_buffer_monitor_process(); void run_buffer_monitor_process();
mutable std::mutex dynamic_bit_selection_mutex;
mutable std::mutex buffer_monitor_mutex;
std::thread thread_dynamic_bit_selection; std::thread thread_dynamic_bit_selection;
std::thread thread_buffer_monitor; std::thread thread_buffer_monitor;
@ -92,9 +92,6 @@ private:
std::shared_ptr<Fpga_dynamic_bit_selection> dynamic_bit_selection_fpga; std::shared_ptr<Fpga_dynamic_bit_selection> dynamic_bit_selection_fpga;
std::shared_ptr<Fpga_buffer_monitor> buffer_monitor_fpga; std::shared_ptr<Fpga_buffer_monitor> buffer_monitor_fpga;
std::mutex dynamic_bit_selection_mutex;
std::mutex buffer_monitor_mutex;
std::string gain_mode_rx1_; std::string gain_mode_rx1_;
std::string gain_mode_rx2_; std::string gain_mode_rx2_;
std::string rf_port_select_; std::string rf_port_select_;

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@ -19,9 +19,8 @@
#include "gnss_sdr_string_literals.h" #include "gnss_sdr_string_literals.h"
#include "gnss_sdr_valve.h" #include "gnss_sdr_valve.h"
#include <gnuradio/blocks/copy.h> #include <gnuradio/blocks/copy.h>
#include <string> #include <cstdlib>
#include <unordered_set> #include <unordered_set>
#include <vector>
#if USE_GLOG_AND_GFLAGS #if USE_GLOG_AND_GFLAGS
#include <glog/logging.h> #include <glog/logging.h>
@ -59,7 +58,6 @@ IONGSMSSignalSource::IONGSMSSignalSource(const ConfigurationInterface* configura
: SignalSourceBase(configuration, role, "ION_GSMS_Signal_Source"s), : SignalSourceBase(configuration, role, "ION_GSMS_Signal_Source"s),
stream_ids_(parse_comma_list(configuration->property(role + ".streams"s, ""s))), stream_ids_(parse_comma_list(configuration->property(role + ".streams"s, ""s))),
metadata_filepath_(configuration->property(role + ".metadata_filename"s, "../data/example_capture_metadata.sdrx"s)), metadata_filepath_(configuration->property(role + ".metadata_filename"s, "../data/example_capture_metadata.sdrx"s)),
timestamp_clock_offset_ms_(configuration->property(role + ".timestamp_clock_offset_ms"s, 0.0)),
in_streams_(in_streams), in_streams_(in_streams),
out_streams_(out_streams) out_streams_(out_streams)
{ {
@ -88,6 +86,7 @@ IONGSMSSignalSource::IONGSMSSignalSource(const ConfigurationInterface* configura
} }
} }
void IONGSMSSignalSource::load_metadata() void IONGSMSSignalSource::load_metadata()
{ {
try try
@ -117,6 +116,7 @@ void IONGSMSSignalSource::load_metadata()
} }
} }
std::vector<IONGSMSFileSource::sptr> IONGSMSSignalSource::make_stream_sources(const std::vector<std::string>& stream_ids) const std::vector<IONGSMSFileSource::sptr> IONGSMSSignalSource::make_stream_sources(const std::vector<std::string>& stream_ids) const
{ {
std::vector<IONGSMSFileSource::sptr> sources{}; std::vector<IONGSMSFileSource::sptr> sources{};
@ -180,6 +180,7 @@ std::vector<IONGSMSFileSource::sptr> IONGSMSSignalSource::make_stream_sources(co
return sources; return sources;
} }
void IONGSMSSignalSource::connect(gr::top_block_sptr top_block) void IONGSMSSignalSource::connect(gr::top_block_sptr top_block)
{ {
std::size_t cumulative_index = 0; std::size_t cumulative_index = 0;

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@ -15,8 +15,8 @@
*/ */
#ifndef GNSS_SDR_ION_METADATA_STANDARD_SIGNAL_SOURCE_H #ifndef GNSS_SDR_ION_GSMS_SIGNAL_SOURCE_H
#define GNSS_SDR_ION_METADATA_STANDARD_SIGNAL_SOURCE_H #define GNSS_SDR_ION_GSMS_SIGNAL_SOURCE_H
#include "configuration_interface.h" #include "configuration_interface.h"
#include "file_source_base.h" #include "file_source_base.h"
@ -73,7 +73,6 @@ private:
gnss_shared_ptr<Gnss_Sdr_Timestamp> timestamp_block_; gnss_shared_ptr<Gnss_Sdr_Timestamp> timestamp_block_;
std::string timestamp_file_; std::string timestamp_file_;
double timestamp_clock_offset_ms_;
uint32_t in_streams_; uint32_t in_streams_;
uint32_t out_streams_; uint32_t out_streams_;
@ -82,4 +81,4 @@ private:
/** \} */ /** \} */
/** \} */ /** \} */
#endif // GNSS_SDR_ION_METADATA_STANDARD_SIGNAL_SOURCE_H #endif // GNSS_SDR_ION_GSMS_SIGNAL_SOURCE_H

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@ -140,13 +140,11 @@ MAX2771EVKITSignalSourceFPGA::MAX2771EVKITSignalSourceFPGA(const ConfigurationIn
} }
} }
std::vector<uint32_t> MAX2771EVKITSignalSourceFPGA::setup_regs(void) std::vector<uint32_t> MAX2771EVKITSignalSourceFPGA::setup_regs(void)
{ {
std::vector<uint32_t> register_values = std::vector<uint32_t>(MAX2771_NUM_REGS); auto register_values = std::vector<uint32_t>(MAX2771_NUM_REGS);
uint32_t LNA_mode = (LNA_active_) ? 0x0 : 0x2; uint32_t LNA_mode = (LNA_active_) ? 0x0 : 0x2;
uint32_t Filter_Bandwidth; uint32_t Filter_Bandwidth;
switch (bandwidth_) switch (bandwidth_)
@ -376,10 +374,10 @@ bool MAX2771EVKITSignalSourceFPGA::configure(std::vector<uint32_t> register_valu
return 0; return 0;
} }
MAX2771EVKITSignalSourceFPGA::~MAX2771EVKITSignalSourceFPGA() MAX2771EVKITSignalSourceFPGA::~MAX2771EVKITSignalSourceFPGA()
{ {
/* cleanup and exit */ // cleanup and exit
if (rf_shutdown_) if (rf_shutdown_)
{ {
chipen_ = false; chipen_ = false;
@ -392,7 +390,6 @@ MAX2771EVKITSignalSourceFPGA::~MAX2771EVKITSignalSourceFPGA()
return; return;
} }
if (configure(register_values)) if (configure(register_values))
{ {
std::cerr << "Error disabling the MAX2771 device " << '\n'; std::cerr << "Error disabling the MAX2771 device " << '\n';
@ -405,9 +402,10 @@ MAX2771EVKITSignalSourceFPGA::~MAX2771EVKITSignalSourceFPGA()
} }
// disable buffer overflow checking and buffer monitoring // disable buffer overflow checking and buffer monitoring
std::unique_lock<std::mutex> lock_buffer_monitor(buffer_monitor_mutex); {
enable_ovf_check_buffer_monitor_active_ = false; std::lock_guard<std::mutex> lock_buffer_monitor(buffer_monitor_mutex);
lock_buffer_monitor.unlock(); enable_ovf_check_buffer_monitor_active_ = false;
}
if (thread_buffer_monitor.joinable()) if (thread_buffer_monitor.joinable())
{ {
@ -426,12 +424,11 @@ void MAX2771EVKITSignalSourceFPGA::run_buffer_monitor_process()
{ {
buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status(); buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status();
std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms)); std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms));
std::unique_lock<std::mutex> lock(buffer_monitor_mutex); std::lock_guard<std::mutex> lock(buffer_monitor_mutex);
if (enable_ovf_check_buffer_monitor_active_ == false) if (enable_ovf_check_buffer_monitor_active_ == false)
{ {
enable_ovf_check_buffer_monitor_active = false; enable_ovf_check_buffer_monitor_active = false;
} }
lock.unlock();
} }
} }

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@ -53,7 +53,6 @@ public:
std::vector<uint32_t> setup_regs(void); std::vector<uint32_t> setup_regs(void);
inline size_t item_size() override inline size_t item_size() override
{ {
return item_size_; return item_size_;
@ -130,14 +129,13 @@ private:
bool configure(std::vector<uint32_t> register_values); bool configure(std::vector<uint32_t> register_values);
void run_buffer_monitor_process(); void run_buffer_monitor_process();
mutable std::mutex buffer_monitor_mutex;
std::thread thread_buffer_monitor; std::thread thread_buffer_monitor;
std::shared_ptr<Fpga_buffer_monitor> buffer_monitor_fpga; std::shared_ptr<Fpga_buffer_monitor> buffer_monitor_fpga;
std::shared_ptr<Fpga_spidev> spidev_fpga; std::shared_ptr<Fpga_spidev> spidev_fpga;
std::mutex buffer_monitor_mutex;
uint64_t freq_; // frequency of local oscillator uint64_t freq_; // frequency of local oscillator
uint64_t sample_rate_; uint64_t sample_rate_;

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@ -87,7 +87,7 @@ ad936x_iio_source_sptr ad936x_iio_make_source_sptr(
void ad936x_iio_source::ad9361_channel_demux_and_record(ad936x_iio_samples *samples_in, int nchannels, std::vector<std::fstream> *files_out) void ad936x_iio_source::ad9361_channel_demux_and_record(ad936x_iio_samples *samples_in, int nchannels, std::vector<std::fstream> *files_out)
{ {
int32_t current_byte = 0; uint32_t current_byte = 0;
int16_t ch = 0; int16_t ch = 0;
// std::cout << "nbytes: " << samples_in->n_bytes << " nsamples: " << samples_in->n_samples << " nch: " << nchannels << "\n"; // std::cout << "nbytes: " << samples_in->n_bytes << " nsamples: " << samples_in->n_samples << " nch: " << nchannels << "\n";
while (current_byte < samples_in->n_bytes) while (current_byte < samples_in->n_bytes)

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@ -18,6 +18,8 @@
#include "gnuradio/block.h" #include "gnuradio/block.h"
#include <algorithm> #include <algorithm>
#include <cmath> #include <cmath>
#include <cstdlib>
#include <iostream>
#if USE_GLOG_AND_GFLAGS #if USE_GLOG_AND_GFLAGS
#include <glog/logging.h> #include <glog/logging.h>
@ -25,8 +27,6 @@
#include <absl/log/log.h> #include <absl/log/log.h>
#endif #endif
using namespace std::string_literals;
IONGSMSFileSource::IONGSMSFileSource( IONGSMSFileSource::IONGSMSFileSource(
const fs::path& metadata_filepath, const fs::path& metadata_filepath,
const GnssMetadata::File& file, const GnssMetadata::File& file,
@ -46,7 +46,10 @@ IONGSMSFileSource::IONGSMSFileSource(
if (!file_stream_.is_open()) if (!file_stream_.is_open())
{ {
LOG(ERROR) << "ion_gsms_file_source: Unable to open the samples file: " << (data_filepath).c_str(); LOG(WARNING) << "ION_GSMS_Signal_Source - Unable to open the samples file: " << (data_filepath).c_str();
std::cerr << "ION_GSMS_Signal_Source - Unable to open the samples file: " << (data_filepath).c_str() << std::endl;
std::cout << "GNSS-SDR program ended.\n";
exit(1);
} }
// Skip offset and block header // Skip offset and block header
@ -96,11 +99,13 @@ std::size_t IONGSMSFileSource::output_stream_item_size(std::size_t stream_index)
return output_stream_item_sizes_[stream_index]; return output_stream_item_sizes_[stream_index];
} }
std::size_t IONGSMSFileSource::output_stream_total_sample_count(std::size_t stream_index) const std::size_t IONGSMSFileSource::output_stream_total_sample_count(std::size_t stream_index) const
{ {
return output_stream_total_sample_counts_[stream_index]; return output_stream_total_sample_counts_[stream_index];
} }
gr::io_signature::sptr IONGSMSFileSource::make_output_signature(const GnssMetadata::Block& block, const std::vector<std::string>& stream_ids) gr::io_signature::sptr IONGSMSFileSource::make_output_signature(const GnssMetadata::Block& block, const std::vector<std::string>& stream_ids)
{ {
int nstreams = 0; int nstreams = 0;
@ -142,6 +147,7 @@ gr::io_signature::sptr IONGSMSFileSource::make_output_signature(const GnssMetada
item_sizes); item_sizes);
} }
int IONGSMSFileSource::work( int IONGSMSFileSource::work(
int noutput_items, int noutput_items,
gr_vector_const_void_star& input_items __attribute__((unused)), gr_vector_const_void_star& input_items __attribute__((unused)),

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@ -14,8 +14,8 @@
* ----------------------------------------------------------------------------- * -----------------------------------------------------------------------------
*/ */
#ifndef GNSS_SDR_ION_GNSS_SDR_METADATA_STANDARD_H #ifndef GNSS_SDR_ION_GSMS_H
#define GNSS_SDR_ION_GNSS_SDR_METADATA_STANDARD_H #define GNSS_SDR_ION_GSMS_H
#include "gnss_block_interface.h" #include "gnss_block_interface.h"
#include "gnss_sdr_filesystem.h" #include "gnss_sdr_filesystem.h"
@ -23,7 +23,6 @@
#include <gnuradio/block.h> #include <gnuradio/block.h>
#include <gnuradio/sync_block.h> #include <gnuradio/sync_block.h>
#include <cstddef> #include <cstddef>
#include <cstdio>
#include <fstream> #include <fstream>
#include <memory> #include <memory>
#include <string> #include <string>
@ -31,7 +30,7 @@
/** \addtogroup Signal_Source /** \addtogroup Signal_Source
* \{ */ * \{ */
/** \addtogroup Signal_Source_libs /** \addtogroup Signal_Source_gnuradio_blocks
* \{ */ * \{ */
class IONGSMSFileSource : public gr::sync_block class IONGSMSFileSource : public gr::sync_block
@ -72,4 +71,4 @@ private:
/** \} */ /** \} */
/** \} */ /** \} */
#endif // GNSS_SDR_ION_GNSS_SDR_METADATA_STANDARD_H #endif // GNSS_SDR_ION_GSMS_H

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@ -15,7 +15,7 @@ endif()
if(ENABLE_MAX2771) if(ENABLE_MAX2771)
set(OPT_SIGNAL_SOURCE_LIB_SOURCES ${OPT_SIGNAL_SOURCE_LIB_SOURCES} fpga_spidev.cc) set(OPT_SIGNAL_SOURCE_LIB_SOURCES ${OPT_SIGNAL_SOURCE_LIB_SOURCES} fpga_spidev.cc)
set(OPT_SIGNAL_SOURCE_LIB_HEADERS ${OPT_SIGNAL_SOURCE_LIB_SOURCES} fpga_spidev.h) set(OPT_SIGNAL_SOURCE_LIB_HEADERS ${OPT_SIGNAL_SOURCE_LIB_HEADERS} fpga_spidev.h)
endif() endif()
if(ENABLE_FPGA) if(ENABLE_FPGA)

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@ -1,6 +1,7 @@
/*! /*!
* \file ad936x_iio_custom.cc * \file ad936x_iio_custom.cc
* \brief A direct IIO custom front-end driver for the AD936x AD front-end family with special FPGA custom functionalities. * \brief A direct IIO custom front-end driver for the AD936x AD front-end
* family with special FPGA custom functionalities.
* \author Javier Arribas, jarribas(at)cttc.es * \author Javier Arribas, jarribas(at)cttc.es
* ----------------------------------------------------------------------------- * -----------------------------------------------------------------------------
* *

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@ -1,6 +1,7 @@
/*! /*!
* \file ad936x_iio_custom.h * \file ad936x_iio_custom.h
* \brief A direct IIO custom front-end driver for the AD936x AD front-end family with special FPGA custom functionalities. * \brief A direct IIO custom front-end driver for the AD936x AD front-end
* family with special FPGA custom functionalities.
* \author Javier Arribas, jarribas(at)cttc.es * \author Javier Arribas, jarribas(at)cttc.es
* ----------------------------------------------------------------------------- * -----------------------------------------------------------------------------
* *
@ -14,27 +15,27 @@
*/ */
#ifndef SRC_LIBS_ad936x_iio_custom_H_ #ifndef GNSS_SDR_AD936X_IIO_CUSTOM_H
#define SRC_LIBS_ad936x_iio_custom_H_ #define GNSS_SDR_AD936X_IIO_CUSTOM_H
#include "ad936x_iio_samples.h"
#include "concurrent_queue.h" #include "concurrent_queue.h"
#include "gnss_time.h" #include "gnss_time.h"
#include "pps_samplestamp.h" #include "pps_samplestamp.h"
#include <boost/atomic.hpp> #include <boost/atomic.hpp>
#include <iio.h>
#include <ad9361.h> // multichip sync and high level functions
#include <memory> #include <memory>
#include <string> #include <string>
#ifdef __APPLE__
#include <iio/iio.h>
#else
#include <iio.h>
#endif
#include "ad936x_iio_samples.h"
#include <ad9361.h> // multichip sync and high level functions
#include <thread> #include <thread>
#include <vector> #include <vector>
/** \addtogroup Signal_Source
* \{ */
/** \addtogroup Signal_Source_libs
* \{ */
class ad936x_iio_custom class ad936x_iio_custom
{ {
public: public:
@ -121,10 +122,7 @@ private:
struct iio_device *dds_dev; struct iio_device *dds_dev;
// stream // stream
uint64_t sample_rate_sps; uint64_t sample_rate_sps;
int debug_level; int debug_level;
int log_level; int log_level;
bool PPS_mode; bool PPS_mode;
@ -144,4 +142,6 @@ private:
std::thread capture_time_thread; std::thread capture_time_thread;
}; };
#endif /* SRC_LIBS_ad936x_iio_custom_H_ */ /** \} */
/** \} */
#endif // GNSS_SDR_AD936X_IIO_CUSTOM_H

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@ -15,17 +15,21 @@
*/ */
#ifndef SRC_LIBS_ad936x_iio_samples_H_ #ifndef GNSS_SDR_AD936X_IIO_SAMPLES_H
#define SRC_LIBS_ad936x_iio_samples_H_ #define GNSS_SDR_AD936X_IIO_SAMPLES_H
#define IIO_DEFAULTAD936XAPIFIFOSIZE_SAMPLES 32768 * 4 #define IIO_DEFAULTAD936XAPIFIFOSIZE_SAMPLES 32768 * 4
#define IIO_INPUTRAMFIFOSIZE 256 #define IIO_INPUTRAMFIFOSIZE 256
#include <memory> #include <memory>
#include <stdint.h> #include <stdint.h>
#include <vector> #include <vector>
/** \addtogroup Signal_Source
* \{ */
/** \addtogroup Signal_Source_libs
* \{ */
class ad936x_iio_samples class ad936x_iio_samples
{ {
public: public:
@ -37,4 +41,6 @@ public:
char buffer[IIO_DEFAULTAD936XAPIFIFOSIZE_SAMPLES * 4 * 4]; // max 16 bits samples per buffer (4 channels, 2-bytes per I + 2-bytes per Q) char buffer[IIO_DEFAULTAD936XAPIFIFOSIZE_SAMPLES * 4 * 4]; // max 16 bits samples per buffer (4 channels, 2-bytes per I + 2-bytes per Q)
}; };
/** \} */
/** \} */
#endif #endif

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@ -34,8 +34,8 @@ struct IONGSMSChunkUnpackingCtx
static constexpr uint8_t word_bitsize_ = sizeof(WT) * 8; static constexpr uint8_t word_bitsize_ = sizeof(WT) * 8;
const GnssMetadata::Chunk::WordShift word_shift_direction_; const GnssMetadata::Chunk::WordShift word_shift_direction_;
WT* iterator_; // Not owned by this class, MUST NOT destroy WT* iterator_ = nullptr; // Not owned by this class, MUST NOT destroy
WT current_word_; WT current_word_{};
uint8_t bitshift_ = 0; uint8_t bitshift_ = 0;
IONGSMSChunkUnpackingCtx( IONGSMSChunkUnpackingCtx(
@ -51,7 +51,10 @@ struct IONGSMSChunkUnpackingCtx
{ {
iterator_ = &data_buffer[data_buffer_word_count]; iterator_ = &data_buffer[data_buffer_word_count];
} }
advance_word(); // Initializes current_word_ if (iterator_)
{
advance_word(); // Initializes current_word_
}
} }
void advance_word() void advance_word()