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Code Issues Releases Wiki Activity

fix configuration options for the FPGA-based AD9361-based boards

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This commit is contained in:
Marc Majoral 2024-08-21 14:48:37 +02:00
parent 6836ac44fb
commit 1ac7e0ca1f
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GPG Key ID: 9D82A95A8E140375
5 changed files with 7 additions and 26 deletions
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17
src/algorithms/signal_source/adapters/adrv9361_z7035_signal_source_fpga.cc
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@ -51,6 +51,7 @@ Adrv9361z7035SignalSourceFPGA::Adrv9361z7035SignalSourceFPGA(const Configuration
gain_mode_rx1_(configuration->property(role + ".gain_mode_rx1", default_gain_mode)),
gain_mode_rx2_(configuration->property(role + ".gain_mode_rx2", default_gain_mode)),
rf_port_select_(configuration->property(role + ".rf_port_select", default_rf_port_select)),
filter_source_(configuration->property(role + ".filter_source", std::string("Off"))),
filter_filename_(configuration->property(role + ".filter_filename", filter_file_)),
rf_gain_rx1_(configuration->property(role + ".gain_rx1", default_manual_gain_rx1)),
rf_gain_rx2_(configuration->property(role + ".gain_rx2", default_manual_gain_rx2)),
@ -58,7 +59,6 @@ Adrv9361z7035SignalSourceFPGA::Adrv9361z7035SignalSourceFPGA(const Configuration
phase_dds_deg_(configuration->property(role + ".phase_dds_deg", 0.0)),
tx_attenuation_db_(configuration->property(role + ".tx_attenuation_db", default_tx_attenuation_db)),
freq0_(configuration->property(role + ".freq", 0)),
freq1_(configuration->property(role + ".freq1", static_cast<uint64_t>(GPS_L5_FREQ_HZ))),
sample_rate_(configuration->property(role + ".sampling_frequency", default_bandwidth)),
bandwidth_(configuration->property(role + ".bandwidth", default_bandwidth)),
freq_dds_tx_hz_(configuration->property(role + ".freq_dds_tx_hz", uint64_t(10000))),
@ -70,7 +70,6 @@ Adrv9361z7035SignalSourceFPGA::Adrv9361z7035SignalSourceFPGA(const Configuration
out_stream_(out_stream),
item_size_(sizeof(int8_t)),
enable_dds_lo_(configuration->property(role + ".enable_dds_lo", false)),
filter_auto_(configuration->property(role + ".filter_auto", false)),
quadrature_(configuration->property(role + ".quadrature", true)),
rf_dc_(configuration->property(role + ".rf_dc", true)),
bb_dc_(configuration->property(role + ".bb_dc", true)),
@ -98,15 +97,6 @@ Adrv9361z7035SignalSourceFPGA::Adrv9361z7035SignalSourceFPGA(const Configuration
freq0_ = configuration->property(role + ".freq0", static_cast<uint64_t>(GPS_L1_FREQ_HZ));
}
if (filter_auto_)
{
filter_source_ = configuration->property(role + ".filter_source", std::string("Auto"));
}
else
{
filter_source_ = configuration->property(role + ".filter_source", std::string("Off"));
}
switch_fpga = std::make_shared<Fpga_Switch>();
switch_fpga->set_switch_position(switch_to_real_time_mode);
@ -190,12 +180,15 @@ Adrv9361z7035SignalSourceFPGA::Adrv9361z7035SignalSourceFPGA(const Configuration
}
std::cout << "LO frequency : " << freq0_ << " Hz\n";
uint64_t freq1 = 0; // The local oscillator frequency of the ADRV9361-B is not used when using the ADRV9361-Z7035 board.
try
{
config_ad9361_rx_local(bandwidth_,
sample_rate_,
freq0_,
freq1_,
freq1,
rf_port_select_,
rx1_enable_,
rx2_enable_,

2
src/algorithms/signal_source/adapters/adrv9361_z7035_signal_source_fpga.h
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@ -107,7 +107,6 @@ private:
double tx_attenuation_db_;
uint64_t freq0_; // frequency of local oscillator for ADRV9361-A 0
uint64_t freq1_; // frequency of local oscillator for ADRV9361-B (if present)
uint64_t sample_rate_;
uint64_t bandwidth_;
uint64_t freq_dds_tx_hz_;
@ -122,7 +121,6 @@ private:
size_t item_size_;
bool enable_dds_lo_;
bool filter_auto_;
bool quadrature_;
bool rf_dc_;
bool bb_dc_;

11
src/algorithms/signal_source/adapters/fmcomms5_signal_source_fpga.cc
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@ -51,6 +51,7 @@ Fmcomms5SignalSourceFPGA::Fmcomms5SignalSourceFPGA(const ConfigurationInterface
gain_mode_rx1_(configuration->property(role + ".gain_mode_rx1", default_gain_mode)),
gain_mode_rx2_(configuration->property(role + ".gain_mode_rx2", default_gain_mode)),
rf_port_select_(configuration->property(role + ".rf_port_select", default_rf_port_select)),
filter_source_(configuration->property(role + ".filter_source", std::string("Off"))),
filter_filename_(configuration->property(role + ".filter_filename", filter_file_)),
rf_gain_rx1_(configuration->property(role + ".gain_rx1", default_manual_gain_rx1)),
rf_gain_rx2_(configuration->property(role + ".gain_rx2", default_manual_gain_rx2)),
@ -63,7 +64,6 @@ Fmcomms5SignalSourceFPGA::Fmcomms5SignalSourceFPGA(const ConfigurationInterface
in_stream_(in_stream),
out_stream_(out_stream),
item_size_(sizeof(int8_t)),
filter_auto_(configuration->property(role + ".filter_auto", false)),
quadrature_(configuration->property(role + ".quadrature", true)),
rf_dc_(configuration->property(role + ".rf_dc", true)),
bb_dc_(configuration->property(role + ".bb_dc", true)),
@ -86,15 +86,6 @@ Fmcomms5SignalSourceFPGA::Fmcomms5SignalSourceFPGA(const ConfigurationInterface
const uint32_t num_freq_bands = ((enable_rx1_band == true) and (enable_rx2_band == true)) ? 2 : 1;
if (filter_auto_)
{
filter_source_ = configuration->property(role + ".filter_source", std::string("Auto"));
}
else
{
filter_source_ = configuration->property(role + ".filter_source", std::string("Off"));
}
switch_fpga = std::make_shared<Fpga_Switch>();
switch_fpga->set_switch_position(switch_to_real_time_mode);

1
src/algorithms/signal_source/adapters/fmcomms5_signal_source_fpga.h
View File

@ -114,7 +114,6 @@ private:
size_t item_size_;
bool filter_auto_;
bool quadrature_;
bool rf_dc_;
bool bb_dc_;

2
src/algorithms/signal_source/libs/ad9361_manager.cc
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@ -349,7 +349,7 @@ bool config_ad9361_rx_local(uint64_t bandwidth_,
#ifndef LIBAD9361_VERSION_GREATER_THAN_01
if (filter_source_ == "Design")
{
std::cout << "Option filter_source=Design is not available in this version. Set to filter_source=Off\n";
std::cout << "Option filter_source=Design is not available in this version of libad9361. Set to filter_source=Off\n";
filter_source_ = std::string("Off");
}
if (Fpass_ != 0.0 or Fstop_ != 0.0)