2018-03-02 10:30:36 +00:00
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/*!
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* \file ad9361_fpga_signal_source.cc
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* \brief signal source for Analog Devices front-end AD9361 connected directly to FPGA accelerators.
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* This source implements only the AD9361 control. It is NOT compatible with conventional SDR acquisition and tracking blocks.
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* Please use the fmcomms2 source if conventional SDR acquisition and tracking is selected in the configuration file.
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* \author Javier Arribas, jarribas(at)cttc.es
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*
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* -------------------------------------------------------------------------
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*
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2019-07-26 10:38:20 +00:00
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* Copyright (C) 2010-2019 (see AUTHORS file for a list of contributors)
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2018-03-02 10:30:36 +00:00
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*
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* GNSS-SDR is a software defined Global Navigation
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* Satellite Systems receiver
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*
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* This file is part of GNSS-SDR.
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*
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* GNSS-SDR is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* GNSS-SDR is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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2018-05-13 20:49:11 +00:00
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* along with GNSS-SDR. If not, see <https://www.gnu.org/licenses/>.
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2018-03-02 10:30:36 +00:00
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*
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* -------------------------------------------------------------------------
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*/
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#include "ad9361_fpga_signal_source.h"
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#include "GPS_L1_CA.h"
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2018-03-27 12:24:07 +00:00
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#include "GPS_L2C.h"
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2018-12-09 21:00:09 +00:00
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#include "ad9361_manager.h"
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#include "configuration_interface.h"
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2018-03-02 10:30:36 +00:00
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#include <glog/logging.h>
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2019-09-13 06:56:37 +00:00
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#include <iio.h>
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2018-05-19 20:42:08 +00:00
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#include <exception>
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2019-09-28 19:59:05 +00:00
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#include <fcntl.h> // for open, O_WRONLY
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#include <fstream> // for std::ifstream
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2018-05-01 10:02:50 +00:00
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#include <iostream> // for cout, endl
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2019-10-01 21:44:07 +00:00
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#include <string> // for string manipulation
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2019-09-28 19:59:05 +00:00
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#include <unistd.h> // for write
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2018-12-10 18:29:00 +00:00
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#include <utility>
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2019-09-28 19:59:05 +00:00
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#include <vector>
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2018-03-02 10:30:36 +00:00
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2019-10-01 20:26:30 +00:00
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void run_DMA_process(const std::string &FreqBand, const std::string &Filename1, const std::string &Filename2, const bool &enable_DMA)
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2019-09-28 19:59:05 +00:00
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{
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const int MAX_INPUT_SAMPLES_TOTAL = 8192;
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int max_value = 0;
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int tx_fd; // DMA descriptor
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std::ifstream infile1;
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infile1.exceptions(std::ifstream::failbit | std::ifstream::badbit);
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try
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{
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infile1.open(Filename1, std::ios::binary);
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}
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catch (const std::ifstream::failure &e)
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{
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std::cerr << "Exception opening file " << Filename1 << std::endl;
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return;
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}
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std::ifstream infile2;
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infile2.exceptions(std::ifstream::failbit | std::ifstream::badbit);
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try
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{
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infile2.open(Filename2, std::ios::binary);
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}
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catch (const std::ifstream::failure &e)
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{
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// could not exist
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}
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// rx signal
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std::vector<int8_t> input_samples(MAX_INPUT_SAMPLES_TOTAL * 2);
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std::vector<int8_t> input_samples2(MAX_INPUT_SAMPLES_TOTAL * 2);
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std::vector<int8_t> input_samples_dma(MAX_INPUT_SAMPLES_TOTAL * 2 * 2);
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int nread_elements;
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int nread_elements2;
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int file_completed = 0;
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int num_transferred_bytes;
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//**************************************************************************
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// Open DMA device
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//**************************************************************************
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tx_fd = open("/dev/loop_tx", O_WRONLY);
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if (tx_fd < 0)
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{
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std::cout << "Cannot open loop device" << std::endl;
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return;
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}
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//**************************************************************************
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// Open input file
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//**************************************************************************
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int nsamples = 0;
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2019-10-01 20:26:30 +00:00
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while ((file_completed == 0) && (enable_DMA == true))
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2019-09-28 19:59:05 +00:00
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{
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unsigned int dma_index = 0;
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if (FreqBand == "L1")
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{
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try
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{
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infile1.read(reinterpret_cast<char *>(input_samples.data()), MAX_INPUT_SAMPLES_TOTAL * 2);
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}
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catch (const std::ifstream::failure &e)
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{
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std::cerr << "Exception reading file " << Filename1 << std::endl;
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}
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if (infile1)
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{
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nread_elements = MAX_INPUT_SAMPLES_TOTAL * 2;
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}
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else
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{
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nread_elements = 0;
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}
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nsamples += (nread_elements / 2);
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for (int index0 = 0; index0 < (nread_elements); index0 += 2)
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{
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// channel 1 (queue 1)
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input_samples_dma[dma_index] = 0;
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input_samples_dma[dma_index + 1] = 0;
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// channel 0 (queue 0)
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input_samples_dma[dma_index + 2] = input_samples[index0];
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input_samples_dma[dma_index + 3] = input_samples[index0 + 1];
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dma_index += 4;
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}
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}
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else if (FreqBand == "L2")
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{
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try
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{
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infile1.read(reinterpret_cast<char *>(input_samples.data()), MAX_INPUT_SAMPLES_TOTAL * 2);
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}
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catch (const std::ifstream::failure &e)
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{
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std::cerr << "Exception reading file " << Filename1 << std::endl;
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}
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if (infile1)
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{
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nread_elements = MAX_INPUT_SAMPLES_TOTAL * 2;
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}
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else
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{
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nread_elements = 0;
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}
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nsamples += (nread_elements / 2);
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for (int index0 = 0; index0 < (nread_elements); index0 += 2)
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{
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// channel 1 (queue 1)
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input_samples_dma[dma_index] = input_samples[index0];
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input_samples_dma[dma_index + 1] = input_samples[index0 + 1];
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// channel 0 (queue 0)
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input_samples_dma[dma_index + 2] = 0;
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input_samples_dma[dma_index + 3] = 0;
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dma_index += 4;
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}
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}
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else if (FreqBand == "L1L2")
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{
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try
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{
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infile1.read(reinterpret_cast<char *>(input_samples.data()), MAX_INPUT_SAMPLES_TOTAL * 2);
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}
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catch (const std::ifstream::failure &e)
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{
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std::cerr << "Exception reading file " << Filename1 << std::endl;
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}
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if (infile1)
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{
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nread_elements = MAX_INPUT_SAMPLES_TOTAL * 2;
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}
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else
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{
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nread_elements = 0;
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}
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try
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{
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infile2.read(reinterpret_cast<char *>(input_samples2.data()), MAX_INPUT_SAMPLES_TOTAL * 2);
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}
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catch (const std::ifstream::failure &e)
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{
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std::cerr << "Exception reading file " << Filename1 << std::endl;
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}
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if (infile2)
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{
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nread_elements2 = MAX_INPUT_SAMPLES_TOTAL * 2;
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}
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else
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{
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nread_elements2 = 0;
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}
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if (nread_elements > nread_elements2)
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{
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nread_elements = nread_elements2; // take the smallest
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}
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nsamples += (nread_elements / 2);
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for (int index0 = 0; index0 < (nread_elements); index0 += 2)
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{
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input_samples[index0] = input_samples[index0];
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input_samples[index0 + 1] = input_samples[index0 + 1];
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if (input_samples[index0] > max_value)
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{
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max_value = input_samples[index0];
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}
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else if (-input_samples[index0] > max_value)
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{
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max_value = -input_samples[index0];
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}
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if (input_samples[index0 + 1] > max_value)
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{
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max_value = input_samples[index0 + 1];
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}
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else if (-input_samples[index0 + 1] > max_value)
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{
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max_value = -input_samples[index0 + 1];
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}
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// channel 1 (queue 1)
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input_samples_dma[dma_index] = input_samples2[index0];
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input_samples_dma[dma_index + 1] = input_samples2[index0 + 1];
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// channel 0 (queue 0)
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input_samples_dma[dma_index + 2] = input_samples[index0];
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input_samples_dma[dma_index + 3] = input_samples[index0 + 1];
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dma_index += 4;
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}
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}
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if (nread_elements > 0)
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{
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num_transferred_bytes = nread_elements * 2;
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2019-10-01 21:44:07 +00:00
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int num_bytes_sent = write(tx_fd, input_samples_dma.data(), nread_elements * 2);
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if (num_bytes_sent != num_transferred_bytes)
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{
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std::cerr << "Error: DMA could not send all the required samples " << std::endl;
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}
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2019-09-28 19:59:05 +00:00
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}
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if (nread_elements != MAX_INPUT_SAMPLES_TOTAL * 2)
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{
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file_completed = 1;
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}
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}
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try
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{
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infile1.close();
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infile2.close();
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}
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catch (const std::ifstream::failure &e)
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{
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std::cerr << "Exception closing files " << Filename1 << " and " << Filename2 << std::endl;
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}
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}
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Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(ConfigurationInterface *configuration,
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const std::string &role, unsigned int in_stream, unsigned int out_stream,
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2019-07-16 15:41:12 +00:00
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std::shared_ptr<Concurrent_Queue<pmt::pmt_t>> queue) : role_(role), in_stream_(in_stream), out_stream_(out_stream), queue_(std::move(queue))
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2018-03-02 10:30:36 +00:00
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{
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freq_ = configuration->property(role + ".freq", GPS_L1_FREQ_HZ);
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2019-03-19 09:14:09 +00:00
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sample_rate_ = configuration->property(role + ".sampling_frequency", 12500000);
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bandwidth_ = configuration->property(role + ".bandwidth", 12500000);
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2018-03-02 10:30:36 +00:00
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rx1_en_ = configuration->property(role + ".rx1_enable", true);
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2019-03-19 09:14:09 +00:00
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rx2_en_ = configuration->property(role + ".rx2_enable", true);
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2018-03-02 10:30:36 +00:00
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buffer_size_ = configuration->property(role + ".buffer_size", 0xA0000);
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quadrature_ = configuration->property(role + ".quadrature", true);
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rf_dc_ = configuration->property(role + ".rf_dc", true);
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bb_dc_ = configuration->property(role + ".bb_dc", true);
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gain_mode_rx1_ = configuration->property(role + ".gain_mode_rx1", std::string("manual"));
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gain_mode_rx2_ = configuration->property(role + ".gain_mode_rx2", std::string("manual"));
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rf_gain_rx1_ = configuration->property(role + ".gain_rx1", 64.0);
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rf_gain_rx2_ = configuration->property(role + ".gain_rx2", 64.0);
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rf_port_select_ = configuration->property(role + ".rf_port_select", std::string("A_BALANCED"));
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filter_file_ = configuration->property(role + ".filter_file", std::string(""));
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filter_auto_ = configuration->property(role + ".filter_auto", true);
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samples_ = configuration->property(role + ".samples", 0);
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2018-05-01 10:02:50 +00:00
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enable_dds_lo_ = configuration->property(role + ".enable_dds_lo", false);
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freq_rf_tx_hz_ = configuration->property(role + ".freq_rf_tx_hz", GPS_L1_FREQ_HZ - GPS_L2_FREQ_HZ - 1000);
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freq_dds_tx_hz_ = configuration->property(role + ".freq_dds_tx_hz", 1000);
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scale_dds_dbfs_ = configuration->property(role + ".scale_dds_dbfs", -3.0);
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phase_dds_deg_ = configuration->property(role + ".phase_dds_deg", 0.0);
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tx_attenuation_db_ = configuration->property(role + ".tx_attenuation_db", 0.0);
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2018-03-27 12:24:07 +00:00
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2018-04-05 13:05:46 +00:00
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// turn switch to A/D position
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2018-08-29 16:20:41 +00:00
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std::string default_device_name = "/dev/uio1";
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2018-04-05 13:05:46 +00:00
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std::string device_name = configuration->property(role + ".devicename", default_device_name);
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2019-09-28 19:59:05 +00:00
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switch_position = configuration->property(role + ".switch_position", 0);
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2019-02-22 21:34:15 +00:00
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switch_fpga = std::make_shared<Fpga_Switch>(device_name);
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2018-04-05 13:05:46 +00:00
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switch_fpga->set_switch_position(switch_position);
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2019-09-28 19:59:05 +00:00
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item_size_ = sizeof(gr_complex);
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std::cout << "Sample rate: " << sample_rate_ << " Sps" << std::endl;
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if (switch_position == 0) // Inject file(s) via DMA
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{
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2019-10-01 21:44:07 +00:00
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enable_DMA_ = true;
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2019-09-28 19:59:05 +00:00
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std::string empty_string;
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filename_rx1 = configuration->property(role + ".filename_rx1", empty_string);
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filename_rx2 = configuration->property(role + ".filename_rx2", empty_string);
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int l1_band = configuration->property("Channels_1C.count", 0) +
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2019-10-01 21:13:28 +00:00
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configuration->property("Channels_1B.count", 0);
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int l2_band = configuration->property("Channels_L5.count", 0) +
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configuration->property("Channels_5X.count", 0) +
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configuration->property("Channels_2S.count", 0);
|
2019-09-28 19:59:05 +00:00
|
|
|
|
|
|
|
if (l1_band != 0)
|
|
|
|
{
|
|
|
|
freq_band = "L1";
|
|
|
|
}
|
|
|
|
if (l2_band != 0 && l1_band == 0)
|
|
|
|
{
|
|
|
|
freq_band = "L2";
|
|
|
|
}
|
|
|
|
if (l1_band != 0 && l2_band != 0)
|
|
|
|
{
|
|
|
|
freq_band = "L1L2";
|
|
|
|
}
|
|
|
|
|
2019-10-01 20:26:30 +00:00
|
|
|
thread_file_to_dma = std::thread([&] { run_DMA_process(freq_band, filename_rx1, filename_rx2, enable_DMA_); });
|
2019-09-28 19:59:05 +00:00
|
|
|
}
|
|
|
|
if (switch_position == 2) // Real-time via AD9361
|
|
|
|
{
|
2019-10-06 17:07:24 +00:00
|
|
|
// some basic checks
|
|
|
|
if ((rf_port_select_ != "A_BALANCED") and (rf_port_select_ != "B_BALANCED") and (rf_port_select_ != "A_N") and (rf_port_select_ != "B_N") and (rf_port_select_ != "B_P") and (rf_port_select_ != "C_N") and (rf_port_select_ != "C_P") and (rf_port_select_ != "TX_MONITOR1") and (rf_port_select_ != "TX_MONITOR2") and (rf_port_select_ != "TX_MONITOR1_2"))
|
|
|
|
{
|
|
|
|
std::cout << "Configuration parameter rf_port_select should take one of these values:" << std::endl;
|
|
|
|
std::cout << " A_BALANCED, B_BALANCED, A_N, B_N, B_P, C_N, C_P, TX_MONITOR1, TX_MONITOR2, TX_MONITOR1_2" << std::endl;
|
|
|
|
std::cout << "Error: provided value rf_port_select=" << rf_port_select_ << " is not among valid values" << std::endl;
|
|
|
|
std::cout << " This parameter has been set to its default value rf_port_select=A_BALANCED" << std::endl;
|
|
|
|
rf_port_select_ = std::string("A_BALANCED");
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((gain_mode_rx1_ != "manual") and (gain_mode_rx1_ != "slow_attack") and (gain_mode_rx1_ != "fast_attack") and (gain_mode_rx1_ != "hybrid"))
|
|
|
|
{
|
|
|
|
std::cout << "Configuration parameter gain_mode_rx1 should take one of these values:" << std::endl;
|
|
|
|
std::cout << " manual, slow_attack, fast_attack, hybrid" << std::endl;
|
|
|
|
std::cout << "Error: provided value gain_mode_rx1=" << gain_mode_rx1_ << " is not among valid values" << std::endl;
|
|
|
|
std::cout << " This parameter has been set to its default value gain_mode_rx1=manual" << std::endl;
|
|
|
|
gain_mode_rx1_ = std::string("manual");
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((gain_mode_rx2_ != "manual") and (gain_mode_rx2_ != "slow_attack") and (gain_mode_rx2_ != "fast_attack") and (gain_mode_rx2_ != "hybrid"))
|
|
|
|
{
|
|
|
|
std::cout << "Configuration parameter gain_mode_rx2 should take one of these values:" << std::endl;
|
|
|
|
std::cout << " manual, slow_attack, fast_attack, hybrid" << std::endl;
|
|
|
|
std::cout << "Error: provided value gain_mode_rx2=" << gain_mode_rx2_ << " is not among valid values" << std::endl;
|
|
|
|
std::cout << " This parameter has been set to its default value gain_mode_rx2=manual" << std::endl;
|
|
|
|
gain_mode_rx2_ = std::string("manual");
|
|
|
|
}
|
|
|
|
|
2019-09-28 19:59:05 +00:00
|
|
|
std::cout << "LO frequency : " << freq_ << " Hz" << std::endl;
|
|
|
|
config_ad9361_rx_local(bandwidth_,
|
|
|
|
sample_rate_,
|
|
|
|
freq_,
|
|
|
|
rf_port_select_,
|
|
|
|
gain_mode_rx1_,
|
|
|
|
gain_mode_rx2_,
|
|
|
|
rf_gain_rx1_,
|
2019-10-06 17:07:24 +00:00
|
|
|
rf_gain_rx2_,
|
|
|
|
quadrature_,
|
|
|
|
rf_dc_,
|
|
|
|
bb_dc_);
|
2019-09-28 19:59:05 +00:00
|
|
|
|
|
|
|
// LOCAL OSCILLATOR DDS GENERATOR FOR DUAL FREQUENCY OPERATION
|
|
|
|
if (enable_dds_lo_ == true)
|
|
|
|
{
|
|
|
|
config_ad9361_lo_local(bandwidth_,
|
|
|
|
sample_rate_,
|
|
|
|
freq_rf_tx_hz_,
|
|
|
|
tx_attenuation_db_,
|
|
|
|
freq_dds_tx_hz_,
|
|
|
|
scale_dds_dbfs_);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (switch_position != 0 && switch_position != 2)
|
|
|
|
{
|
|
|
|
std::cout << "SignalSource.switch_position configuration parameter must be either 0: read from file(s) via DMA, or 2: read from AD9361" << std::endl;
|
|
|
|
}
|
2018-06-03 20:43:53 +00:00
|
|
|
if (in_stream_ > 0)
|
|
|
|
{
|
|
|
|
LOG(ERROR) << "A signal source does not have an input stream";
|
|
|
|
}
|
|
|
|
if (out_stream_ > 1)
|
|
|
|
{
|
|
|
|
LOG(ERROR) << "This implementation only supports one output stream";
|
|
|
|
}
|
2018-03-02 10:30:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
Ad9361FpgaSignalSource::~Ad9361FpgaSignalSource()
|
|
|
|
{
|
|
|
|
/* cleanup and exit */
|
2019-10-01 20:26:30 +00:00
|
|
|
|
2019-10-01 21:44:07 +00:00
|
|
|
// std::cout<<"* AD9361 Disabling streaming channels\n";
|
2019-08-18 20:16:13 +00:00
|
|
|
// if (rx0_i) { iio_channel_disable(rx0_i); }
|
|
|
|
// if (rx0_q) { iio_channel_disable(rx0_q); }
|
2018-03-27 12:24:07 +00:00
|
|
|
|
2019-10-01 21:44:07 +00:00
|
|
|
enable_DMA_ = false; // disable the DMA
|
2019-10-01 20:26:30 +00:00
|
|
|
|
2018-03-27 12:24:07 +00:00
|
|
|
if (enable_dds_lo_)
|
2018-05-01 10:02:50 +00:00
|
|
|
{
|
2018-05-19 20:42:08 +00:00
|
|
|
try
|
|
|
|
{
|
|
|
|
ad9361_disable_lo_local();
|
|
|
|
}
|
2019-09-28 19:59:05 +00:00
|
|
|
catch (const std::exception &e)
|
2018-05-19 20:42:08 +00:00
|
|
|
{
|
2018-05-19 22:15:22 +00:00
|
|
|
LOG(WARNING) << "Problem closing the Ad9361FpgaSignalSource: " << e.what();
|
2018-05-19 20:42:08 +00:00
|
|
|
}
|
2018-05-01 10:02:50 +00:00
|
|
|
}
|
2019-09-28 19:59:05 +00:00
|
|
|
if (switch_position == 0) // read samples from a file via DMA
|
|
|
|
{
|
|
|
|
if (thread_file_to_dma.joinable())
|
|
|
|
{
|
|
|
|
thread_file_to_dma.join();
|
|
|
|
}
|
|
|
|
}
|
2018-05-01 10:02:50 +00:00
|
|
|
// std::cout<<"* AD9361 Destroying context\n";
|
2019-08-18 20:16:13 +00:00
|
|
|
// if (ctx) { iio_context_destroy(ctx); }
|
2018-03-02 10:30:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void Ad9361FpgaSignalSource::connect(gr::top_block_sptr top_block)
|
|
|
|
{
|
2018-05-19 19:36:17 +00:00
|
|
|
if (top_block)
|
|
|
|
{ /* top_block is not null */
|
|
|
|
};
|
2018-03-02 10:30:36 +00:00
|
|
|
DLOG(INFO) << "AD9361 FPGA source nothing to connect";
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void Ad9361FpgaSignalSource::disconnect(gr::top_block_sptr top_block)
|
|
|
|
{
|
2018-05-19 19:36:17 +00:00
|
|
|
if (top_block)
|
|
|
|
{ /* top_block is not null */
|
|
|
|
};
|
2018-03-02 10:30:36 +00:00
|
|
|
DLOG(INFO) << "AD9361 FPGA source nothing to disconnect";
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
gr::basic_block_sptr Ad9361FpgaSignalSource::get_left_block()
|
|
|
|
{
|
|
|
|
LOG(WARNING) << "Trying to get signal source left block.";
|
|
|
|
return gr::basic_block_sptr();
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
gr::basic_block_sptr Ad9361FpgaSignalSource::get_right_block()
|
|
|
|
{
|
|
|
|
return gr::basic_block_sptr();
|
|
|
|
}
|