2018-04-05 13:05:46 +00:00
|
|
|
/*!
|
|
|
|
* \file fpga_switch.cc
|
|
|
|
* \brief Switch that connects the HW accelerator queues to the analog front end or the DMA.
|
|
|
|
* \authors <ul>
|
|
|
|
* <li> Marc Majoral, 2017. mmajoral(at)cttc.cat
|
|
|
|
* <li> Javier Arribas, 2015. jarribas(at)cttc.es
|
|
|
|
* </ul>
|
|
|
|
*
|
|
|
|
* Class that controls a switch in the FPGA
|
|
|
|
*
|
|
|
|
*
|
|
|
|
* -------------------------------------------------------------------------
|
|
|
|
*
|
2018-05-13 20:49:11 +00:00
|
|
|
* Copyright (C) 2010-2018 (see AUTHORS file for a list of contributors)
|
2018-04-05 13:05:46 +00:00
|
|
|
*
|
|
|
|
* GNSS-SDR is a software defined Global Navigation
|
|
|
|
* Satellite Systems receiver
|
|
|
|
*
|
|
|
|
* This file is part of GNSS-SDR.
|
|
|
|
*
|
|
|
|
* GNSS-SDR is free software: you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License as published by
|
|
|
|
* the Free Software Foundation, either version 3 of the License, or
|
|
|
|
* (at your option) any later version.
|
|
|
|
*
|
|
|
|
* GNSS-SDR is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
* GNU General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU General Public License
|
2018-05-13 20:49:11 +00:00
|
|
|
* along with GNSS-SDR. If not, see <https://www.gnu.org/licenses/>.
|
2018-04-05 13:05:46 +00:00
|
|
|
*
|
|
|
|
* -------------------------------------------------------------------------
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "fpga_switch.h"
|
|
|
|
#include <glog/logging.h>
|
2018-05-01 08:16:30 +00:00
|
|
|
#include <fcntl.h> // for open, O_RDWR, O_SYNC
|
|
|
|
#include <iostream> // for cout, endl
|
|
|
|
#include <sys/mman.h> // for mmap
|
2018-04-05 13:05:46 +00:00
|
|
|
|
|
|
|
|
|
|
|
// constants
|
2018-05-01 08:16:30 +00:00
|
|
|
const size_t PAGE_SIZE = 0x10000;
|
|
|
|
const unsigned int TEST_REGISTER_TRACK_WRITEVAL = 0x55AA;
|
2018-04-05 13:05:46 +00:00
|
|
|
|
|
|
|
fpga_switch::fpga_switch(std::string device_name)
|
|
|
|
{
|
|
|
|
if ((d_device_descriptor = open(device_name.c_str(), O_RDWR | O_SYNC)) == -1)
|
|
|
|
{
|
|
|
|
LOG(WARNING) << "Cannot open deviceio" << device_name;
|
|
|
|
}
|
2018-05-01 08:16:30 +00:00
|
|
|
d_map_base = reinterpret_cast<volatile unsigned *>(mmap(nullptr, PAGE_SIZE,
|
2018-04-30 17:53:20 +00:00
|
|
|
PROT_READ | PROT_WRITE, MAP_SHARED, d_device_descriptor, 0));
|
2018-04-05 13:05:46 +00:00
|
|
|
|
2018-04-30 17:53:20 +00:00
|
|
|
if (d_map_base == reinterpret_cast<void *>(-1))
|
2018-04-05 13:05:46 +00:00
|
|
|
{
|
|
|
|
LOG(WARNING) << "Cannot map the FPGA switch module into tracking memory";
|
2018-05-01 08:16:30 +00:00
|
|
|
std::cout << "Could not map switch memory." << std::endl;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
std::cout << "Switch memory successfully mapped." << std::endl;
|
2018-04-05 13:05:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// sanity check : check test register
|
|
|
|
unsigned writeval = TEST_REGISTER_TRACK_WRITEVAL;
|
|
|
|
unsigned readval;
|
|
|
|
readval = fpga_switch::fpga_switch_test_register(writeval);
|
|
|
|
if (writeval != readval)
|
|
|
|
{
|
|
|
|
LOG(WARNING) << "Test register sanity check failed";
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
LOG(INFO) << "Test register sanity check success !";
|
|
|
|
}
|
|
|
|
|
|
|
|
DLOG(INFO) << "Switch FPGA class created";
|
|
|
|
}
|
|
|
|
|
2018-04-30 17:53:20 +00:00
|
|
|
|
2018-04-05 13:05:46 +00:00
|
|
|
fpga_switch::~fpga_switch()
|
|
|
|
{
|
|
|
|
close_device();
|
|
|
|
}
|
|
|
|
|
2018-04-30 17:53:20 +00:00
|
|
|
|
2018-04-05 13:05:46 +00:00
|
|
|
void fpga_switch::set_switch_position(int switch_position)
|
|
|
|
{
|
|
|
|
d_map_base[0] = switch_position;
|
|
|
|
}
|
|
|
|
|
2018-04-30 17:53:20 +00:00
|
|
|
|
2018-04-05 13:05:46 +00:00
|
|
|
unsigned fpga_switch::fpga_switch_test_register(
|
2018-04-30 17:53:20 +00:00
|
|
|
unsigned writeval)
|
2018-04-05 13:05:46 +00:00
|
|
|
{
|
|
|
|
unsigned readval;
|
|
|
|
// write value to test register
|
|
|
|
d_map_base[3] = writeval;
|
|
|
|
// read value from test register
|
|
|
|
readval = d_map_base[3];
|
|
|
|
// return read value
|
|
|
|
return readval;
|
|
|
|
}
|
|
|
|
|
2018-04-30 17:53:20 +00:00
|
|
|
|
2018-04-05 13:05:46 +00:00
|
|
|
void fpga_switch::close_device()
|
|
|
|
{
|
2018-04-30 17:53:20 +00:00
|
|
|
unsigned *aux = const_cast<unsigned *>(d_map_base);
|
|
|
|
if (munmap(static_cast<void *>(aux), PAGE_SIZE) == -1)
|
2018-04-05 13:05:46 +00:00
|
|
|
{
|
2018-05-01 08:16:30 +00:00
|
|
|
std::cout << "Failed to unmap memory uio" << std::endl;
|
2018-04-05 13:05:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
close(d_device_descriptor);
|
|
|
|
}
|